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1404 Messages
Mon Jan 03 2000 - 06:43:49 PST:Starting Thu Apr 20 2000 - 11:25:12 PDT:Ending

SubjectAuthorDate
Re: [SI-LIST] : Chassis hole opening and frequenciesErik DanielMon Jan 03 2000 - 06:33:55 PST
Re: [SI-LIST] : Input switching threshold & CPCID. C. SessionsMon Jan 03 2000 - 08:39:30 PST
RE: [SI-LIST] : Input switching threshold & CPCIAbe RiaziMon Jan 03 2000 - 09:43:13 PST
Re: [SI-LIST] : Input switching threshold & CPCIAdrian ShinerMon Jan 03 2000 - 13:06:46 PST
[SI-LIST] : OPENING SI EngineerJOACHIM MUELLERTue Jan 04 2000 - 06:39:56 PST
Re: [SI-LIST] : Input switching threshold & CPCID. C. SessionsTue Jan 04 2000 - 09:44:51 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesDouglas McKeanTue Jan 04 2000 - 10:02:14 PST
RE: [SI-LIST] : Chassis hole opening and frequenciesNadolny, JimTue Jan 04 2000 - 10:47:16 PST
RE: [SI-LIST] : Input switching threshold & CPCIPeterson, James F (FL51)Tue Jan 04 2000 - 11:09:56 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesRon MillerTue Jan 04 2000 - 12:22:14 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesAdrian ShinerTue Jan 04 2000 - 11:31:30 PST
Re: [SI-LIST] : Input switching threshold & CPCIAdrian ShinerTue Jan 04 2000 - 11:23:24 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesJay ChesavageTue Jan 04 2000 - 13:23:28 PST
Re: [SI-LIST] : Input switching threshold & CPCIAdrian ShinerTue Jan 04 2000 - 13:35:29 PST
Re: [SI-LIST] : Input switching threshold & CPCID. C. SessionsTue Jan 04 2000 - 13:45:46 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesD. C. SessionsTue Jan 04 2000 - 13:51:01 PST
RE: [SI-LIST] : Chassis hole opening and frequenciesChan, Michael Tue Jan 04 2000 - 14:25:36 PST
RE: [SI-LIST] : Input switching threshold & CPCIVolk, Andrew MTue Jan 04 2000 - 14:34:51 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesD. C. SessionsTue Jan 04 2000 - 14:56:39 PST
Re: [SI-LIST] : Input switching threshold & CPCID. C. SessionsTue Jan 04 2000 - 15:08:58 PST
[SI-LIST] : Re: OPENING: Signal Integrity Engineer, Juniper NetworksHeinz BlennemannTue Jan 04 2000 - 15:26:47 PST
[SI-LIST] : SI Manager positionHank ZaudererTue Jan 04 2000 - 17:03:03 PST
Re: [SI-LIST] : SI Manager positionDan BostanTue Jan 04 2000 - 18:30:47 PST
Re: [SI-LIST] : SI Manager position[email protected]Tue Jan 04 2000 - 18:41:01 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesDaren McClearnonTue Jan 04 2000 - 19:54:02 PST
RE: [SI-LIST] : Input switching threshold & CPCIAbe RiaziTue Jan 04 2000 - 22:57:25 PST
[SI-LIST] : What's your favourite Screwy SI Concept?Andrew PhillipsWed Jan 05 2000 - 05:17:07 PST
RE: [SI-LIST] : Input switching threshold & CPCIIngraham, AndrewWed Jan 05 2000 - 06:18:28 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?[email protected]Wed Jan 05 2000 - 08:32:16 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Lee RitcheyWed Jan 05 2000 - 09:25:08 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Larry SmithWed Jan 05 2000 - 09:25:53 PST
Re: [SI-LIST] : Input switching threshold & CPCID. C. SessionsWed Jan 05 2000 - 09:13:47 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Doug BrooksWed Jan 05 2000 - 09:46:32 PST
RE: [SI-LIST] : Input switching threshold & CPCIIngraham, AndrewWed Jan 05 2000 - 09:52:09 PST
RE: [SI-LIST] : Input switching threshold & CPCIAbe RiaziWed Jan 05 2000 - 10:27:01 PST
Re: [SI-LIST] : Input switching threshold & CPCID. C. SessionsWed Jan 05 2000 - 11:25:41 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesAdrian ShinerWed Jan 05 2000 - 11:50:13 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesAdrian ShinerWed Jan 05 2000 - 11:40:07 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Adrian ShinerWed Jan 05 2000 - 11:57:35 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesAdrian ShinerWed Jan 05 2000 - 11:33:44 PST
[SI-LIST] : low ESR decoupling capacitorsLarry SmithWed Jan 05 2000 - 12:19:33 PST
[SI-LIST] : Update on SI manager position...Hank ZaudererWed Jan 05 2000 - 12:24:55 PST
Re: [SI-LIST] : low ESR decoupling capacitorsD. C. SessionsWed Jan 05 2000 - 13:00:37 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Douglas McKeanWed Jan 05 2000 - 13:39:59 PST
Re: [SI-LIST] : low ESR decoupling capacitorsLarry SmithWed Jan 05 2000 - 13:46:08 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Dr. Edward P. SayreWed Jan 05 2000 - 14:19:28 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?[email protected]Wed Jan 05 2000 - 15:22:05 PST
[SI-LIST] : What's your favorite Screwy SI Concept? : low ESR decoupling capacitors[email protected]Wed Jan 05 2000 - 15:48:34 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Jon PowellWed Jan 05 2000 - 16:12:49 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesJay ChesavageThu Jan 06 2000 - 05:40:48 PST
RE: [SI-LIST] : Input switching threshold & CPCIIngraham, AndrewThu Jan 06 2000 - 08:21:08 PST
RE: [SI-LIST] : Input switching threshold & CPCIIngraham, AndrewThu Jan 06 2000 - 08:32:42 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Doug SmithThu Jan 06 2000 - 10:27:43 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Jon PowellThu Jan 06 2000 - 10:49:53 PST
Re: [SI-LIST] : low ESR decoupling capacitorsAdrian ShinerThu Jan 06 2000 - 11:10:02 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept? : low ESR decoupling capacitorsAdrian ShinerThu Jan 06 2000 - 11:12:48 PST
Re: [SI-LIST] : Input switching threshold & CPCID. C. SessionsThu Jan 06 2000 - 11:09:59 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Haller, RobertThu Jan 06 2000 - 11:35:27 PST
RE: [SI-LIST] : low ESR decoupling capacitors[email protected]Thu Jan 06 2000 - 11:32:56 PST
Re: [SI-LIST] : Input switching threshold & CPCIMatt (boomer) RussellThu Jan 06 2000 - 11:36:57 PST
Re: [SI-LIST] : low ESR decoupling capacitorsD. C. SessionsThu Jan 06 2000 - 11:42:28 PST
Re: [SI-LIST] : Input switching threshold & CPCID. C. SessionsThu Jan 06 2000 - 12:23:28 PST
RE: [SI-LIST] : What's your favorite Screwy SI Concept?Muranyi, ArpadThu Jan 06 2000 - 12:46:53 PST
RE: [SI-LIST] : Input switching threshold & CPCIIngraham, AndrewThu Jan 06 2000 - 12:56:07 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Lee RitcheyThu Jan 06 2000 - 14:57:10 PST
[SI-LIST] : Job Posting: Agilent Technologies (formerly HP) Fiber-Optics App lications EngineersLATOURRETTE,JEFF (HP-SanJose,ex1)Thu Jan 06 2000 - 19:15:33 PST
[SI-LIST] : questions about Spicelink/Ansoft toolsTeddy ChouThu Jan 06 2000 - 19:25:47 PST
[SI-LIST] : Method of measuring characteristics of a capacitorDoug SmithFri Jan 07 2000 - 10:56:10 PST
RE: [SI-LIST] : What's your favorite Screwy SI Concept?Dave HooverThu Jan 06 2000 - 12:42:55 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacFri Jan 07 2000 - 12:34:55 PST
RE: [SI-LIST] : What's your favorite Screwy SI Concept?Chan, Michael Fri Jan 07 2000 - 13:21:30 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacFri Jan 07 2000 - 15:32:11 PST
Re: [SI-LIST] : Method of measuring characteristics of a capacitoradd automationFri Jan 07 2000 - 15:57:04 PST
RE: [SI-LIST] : Input switching threshold & CPCIAbe RiaziFri Jan 07 2000 - 17:13:14 PST
RE: [SI-LIST] : Method of measuring characteristics of a capacito rCruz, JoseSat Jan 08 2000 - 05:48:01 PST
Re: [SI-LIST] : Method of measuring characteristics of a capacitorDouglas C. SmithSat Jan 08 2000 - 12:38:45 PST
[SI-LIST] : si-list archivesRay AndersonSat Jan 08 2000 - 13:20:28 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Lee RitcheySat Jan 08 2000 - 16:53:06 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacSat Jan 08 2000 - 19:36:14 PST
[SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)Ingraham, AndrewSat Jan 08 2000 - 20:23:33 PST
Re: [SI-LIST] : low ESR decoupling capacitorsAdrian ShinerFri Jan 07 2000 - 12:52:53 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Jay ChesavageSun Jan 09 2000 - 01:25:21 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacSun Jan 09 2000 - 15:18:39 PST
[SI-LIST] : 20-H RULE CONTINUEDWMASun Jan 09 2000 - 17:57:55 PST
RE: [SI-LIST] : Clamp diodes in modelsAbe RiaziSun Jan 09 2000 - 23:54:29 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Bradley S HensonMon Jan 10 2000 - 07:55:54 PST
Re: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)Bradley S HensonMon Jan 10 2000 - 08:02:29 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Lee RitcheyMon Jan 10 2000 - 08:53:57 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Lee RitcheyMon Jan 10 2000 - 08:52:17 PST
Re: [SI-LIST] : 20-H RULE CONTINUEDLee RitcheyMon Jan 10 2000 - 09:05:05 PST
[SI-LIST] : Clamp diodes in models (was Input switchingthreshold & CPCI)David HaedgeMon Jan 10 2000 - 09:09:57 PST
[SI-LIST] : Santa Clara Valley EMC Meeting Notice 11Jan2000Hans MellbergMon Jan 10 2000 - 09:48:02 PST
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)Tom DagostinoMon Jan 10 2000 - 10:23:11 PST
RE: [SI-LIST] : Physcially-small far-end LVDS terminations?Joel KolstadMon Jan 10 2000 - 10:51:39 PST
RE: [SI-LIST] : Signal traces without reference planeStephanie GoedeckeMon Jan 10 2000 - 10:57:22 PST
[SI-LIST] : DesignCon 2000Mayer, MikeMon Jan 10 2000 - 11:04:23 PST
RE: [SI-LIST] : Chassis hole opening and frequenciesMayer, MikeMon Jan 10 2000 - 11:05:55 PST
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)Bradley S HensonMon Jan 10 2000 - 11:06:05 PST
RE: [SI-LIST] : Chassis hole opening and frequenciesRay WaughMon Jan 10 2000 - 11:08:35 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Chris HeardMon Jan 10 2000 - 11:10:31 PST
[SI-LIST] : positions availableJon PowellMon Jan 10 2000 - 11:14:54 PST
RE: [SI-LIST] : What's your favorite Screwy SI Concept?PRDEWASTHALEEMon Jan 10 2000 - 11:20:17 PST
Re: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)Matt (boomer) RussellMon Jan 10 2000 - 11:20:34 PST
[SI-LIST] : STTL3 bus terminationsYann NouryMon Jan 10 2000 - 11:24:29 PST
RE: [SI-LIST] : FCAL DB9 cable shieldJeremy StoverMon Jan 10 2000 - 11:27:34 PST
[SI-LIST] : backward Xtalk?Long WangMon Jan 10 2000 - 11:30:04 PST
Re:[SI-LIST] : questions about Spicelink/Ansoft toolsNirmal JainMon Jan 10 2000 - 11:32:40 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacMon Jan 10 2000 - 11:34:26 PST
Re: [SI-LIST] : DesignCon 2000D. C. SessionsMon Jan 10 2000 - 11:35:00 PST
RE: [SI-LIST] : Clamp diodes in models (was Input switchingthresh old & CPCI)Muranyi, ArpadMon Jan 10 2000 - 11:37:04 PST
Re: [SI-LIST] : Clamp diodes in models (was Input switchingthreshold & CPCI)[email protected]Mon Jan 10 2000 - 11:50:36 PST
RE: [SI-LIST] : Physcially-small far-end LVDS terminations?Greim, MichaelMon Jan 10 2000 - 11:58:50 PST
[SI-LIST] : message foul-upRay AndersonMon Jan 10 2000 - 12:02:39 PST
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)Larry SmithMon Jan 10 2000 - 12:07:43 PST
Re: [SI-LIST] : DesignCon 2000Ron MillerMon Jan 10 2000 - 12:11:33 PST
RE: [SI-LIST] : Chassis hole opening and frequenciesLATOURRETTE,JEFF (HP-SanJose,ex1)Mon Jan 10 2000 - 12:14:23 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Kim HelliwellMon Jan 10 2000 - 13:16:42 PST
RE: [SI-LIST] : FCAL DB9 cable shieldRavinder AjmaniMon Jan 10 2000 - 13:20:47 PST
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)[email protected]Mon Jan 10 2000 - 13:22:20 PST
RE: [SI-LIST] : Physcially-small far-end LVDS terminations?Tom DagostinoMon Jan 10 2000 - 11:56:20 PST
Re: [SI-LIST] : STTL3 bus terminationsD. C. SessionsMon Jan 10 2000 - 14:00:01 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Harris, GeorgeMon Jan 10 2000 - 14:18:35 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Fred BalistreriMon Jan 10 2000 - 14:01:05 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?D. C. SessionsMon Jan 10 2000 - 14:19:36 PST
RE: [SI-LIST] : Chassis hole opening and frequenciesJian ZhengMon Jan 10 2000 - 14:29:43 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Chris HeardMon Jan 10 2000 - 14:35:08 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Mark RandolMon Jan 10 2000 - 14:53:46 PST
RE: [SI-LIST] : Clamp diodes in models (was Input switchingthresh old & CPCI)WAUGH,RAY (HP-SanJose,ex1)Mon Jan 10 2000 - 15:27:47 PST
[SI-LIST] : Clamp diodes in modelsWAUGH,RAY (HP-SanJose,ex1)Mon Jan 10 2000 - 16:03:45 PST
Re: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)Scott McMorrowMon Jan 10 2000 - 16:24:58 PST
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)Tom DagostinoMon Jan 10 2000 - 15:50:53 PST
Re: [SI-LIST] : Chassis hole opening and frequenciesMichael VrbanacMon Jan 10 2000 - 17:16:06 PST
Re: [SI-LIST] : backward Xtalk?Nirmal JainMon Jan 10 2000 - 17:33:02 PST
RE: [SI-LIST] : Chassis hole opening and frequenciesLATOURRETTE,JEFF (HP-SanJose,ex1)Mon Jan 10 2000 - 13:08:11 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Aubrey Keith SparkmanMon Jan 10 2000 - 19:34:04 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Michael VrbanacMon Jan 10 2000 - 20:49:39 PST
[SI-LIST] : Blind Matable DB-9 connector for Fibre-ChannelDoug PiperMon Jan 10 2000 - 22:18:51 PST
Re: [SI-LIST] : Signal traces without reference planeLee RitcheyTue Jan 11 2000 - 07:54:12 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Lee RitcheyTue Jan 11 2000 - 08:09:10 PST
Re: [SI-LIST] : Physcially-small far-end LVDS terminations?Lee RitcheyTue Jan 11 2000 - 08:19:12 PST
[SI-LIST] : Re:Santa Clara Valley EMC Meeting Notice 11Jan2000Hans MellbergTue Jan 11 2000 - 08:21:10 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Lee RitcheyTue Jan 11 2000 - 08:30:32 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Doug SmithTue Jan 11 2000 - 14:46:24 PST
RE: [SI-LIST] : What's your favorite Screwy SI Concept?Grasso, Charles (Chaz)Tue Jan 11 2000 - 16:02:53 PST
RE: [SI-LIST] : What's your favorite Screwy SI Concept?Chan, Michael Tue Jan 11 2000 - 16:17:25 PST
RE: [SI-LIST] : What's your favorite Screwy SI Concept?Richard A. SchumacherTue Jan 11 2000 - 16:55:06 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacTue Jan 11 2000 - 21:09:13 PST
[SI-LIST] : re: [SI-LIST]: What's your favorite Screwy SI Concept?Michael VrbanacTue Jan 11 2000 - 21:32:19 PST
[SI-LIST] : Beta Field ExtractorChristian S. RodeWed Jan 12 2000 - 05:44:07 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?[email protected]Wed Jan 12 2000 - 06:25:06 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacWed Jan 12 2000 - 08:42:41 PST
[SI-LIST] : 20H RevisitedD. C. SessionsWed Jan 12 2000 - 09:00:29 PST
Re: [SI-LIST] : 20H RevisitedMichael VrbanacThu Jan 13 2000 - 09:08:17 PST
[SI-LIST] : High Speed Backplane Connector RecommendationsBruce W. MarlerThu Jan 13 2000 - 09:40:41 PST
Re: [SI-LIST] : 20H RevisitedSainath NimmagaddaThu Jan 13 2000 - 09:40:34 PST
Re: [SI-LIST] : 20H RevisitedRay AndersonThu Jan 13 2000 - 10:15:59 PST
Re: [SI-LIST] : 20H RevisitedMichael VrbanacThu Jan 13 2000 - 10:34:41 PST
Re: [SI-LIST] : 20H RevisitedMichael VrbanacThu Jan 13 2000 - 10:45:31 PST
[SI-LIST] : High Speed Backplane Connector RecommendationsmmunroeThu Jan 13 2000 - 11:30:55 PST
Re: [SI-LIST] : 20H RevisitedSainath NimmagaddaThu Jan 13 2000 - 11:45:09 PST
Re: [SI-LIST] : 20H RevisitedMichael VrbanacThu Jan 13 2000 - 13:59:22 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsJon KeebleThu Jan 13 2000 - 13:25:00 PST
RE: [SI-LIST] : 20H RevisitedAlderete, MichaelThu Jan 13 2000 - 14:39:50 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Doug McKeanThu Jan 13 2000 - 15:33:57 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsBruce W. MarlerThu Jan 13 2000 - 15:37:19 PST
Re: [SI-LIST] : 20H RevisitedSainath NimmagaddaThu Jan 13 2000 - 16:19:16 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Jian ZhengThu Jan 13 2000 - 16:32:30 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsBruce W. MarlerThu Jan 13 2000 - 16:43:05 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?[email protected]Thu Jan 13 2000 - 16:45:04 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Doug McKeanThu Jan 13 2000 - 17:14:35 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsRon MillerThu Jan 13 2000 - 17:12:46 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?[email protected]Thu Jan 13 2000 - 17:31:39 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Ron MillerThu Jan 13 2000 - 18:15:29 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Doug McKeanThu Jan 13 2000 - 18:50:29 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationssweirThu Jan 13 2000 - 18:56:08 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?John HowardThu Jan 13 2000 - 11:25:05 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationssweirThu Jan 13 2000 - 19:23:23 PST
RE: [SI-LIST] : questions about Spicelink/Ansoft toolsTeddy ChouFri Jan 14 2000 - 01:47:41 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsJon KeebleFri Jan 14 2000 - 03:23:30 PST
RE: [SI-LIST] : High Speed Backplane Connector RecommendationsJohn EllisFri Jan 14 2000 - 04:38:53 PST
[SI-LIST] : XTK vs ICX[email protected]Fri Jan 14 2000 - 05:16:15 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Bradley S HensonFri Jan 14 2000 - 06:42:54 PST
Re: [SI-LIST] : XTK vs ICXLaurence MichaelsFri Jan 14 2000 - 06:58:06 PST
RE: [SI-LIST] : What's your favorite Screwy SI Concept?Alderete, MichaelFri Jan 14 2000 - 07:01:10 PST
RE: [SI-LIST] : XTK vs ICXChan, Michael Fri Jan 14 2000 - 07:29:37 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Lee RitcheyFri Jan 14 2000 - 08:53:12 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Lee RitcheyFri Jan 14 2000 - 08:55:41 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsLee RitcheyFri Jan 14 2000 - 08:54:00 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Tom DagostinoFri Jan 14 2000 - 09:12:13 PST
[SI-LIST] : SimulationsDoug SmithFri Jan 14 2000 - 09:30:05 PST
[SI-LIST] : Signal integrity engineersRon MosherFri Jan 14 2000 - 09:28:55 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Jian ZhengFri Jan 14 2000 - 09:58:54 PST
RE: [SI-LIST] : XTK vs ICXDan BostanFri Jan 14 2000 - 10:02:42 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Jeff SeegerFri Jan 14 2000 - 10:05:19 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?[email protected]Fri Jan 14 2000 - 10:20:15 PST
Re: [SI-LIST] : 20H RevisitedMichael VrbanacFri Jan 14 2000 - 10:31:36 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsRon MillerFri Jan 14 2000 - 10:34:57 PST
[SI-LIST] : Zo Variance From Plating Thickness VariationDave HooverFri Jan 14 2000 - 10:48:32 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Jian ZhengFri Jan 14 2000 - 11:10:25 PST
[SI-LIST] : Does anyone have a model for a Meritec PCI connector?Tom PelcFri Jan 14 2000 - 11:18:59 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationssweirFri Jan 14 2000 - 11:54:22 PST
Re: [SI-LIST] : SimulationsScott McMorrowFri Jan 14 2000 - 11:55:36 PST
[SI-LIST] : What's your favourite Screwy SI Concept and right angle bends?Hans MellbergFri Jan 14 2000 - 12:20:11 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Adrian ShinerThu Jan 13 2000 - 11:12:59 PST
Re: [SI-LIST] : SimulationsMichael VrbanacFri Jan 14 2000 - 12:55:57 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Doug McKeanFri Jan 14 2000 - 13:07:04 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Neven PischlFri Jan 14 2000 - 13:26:20 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacFri Jan 14 2000 - 13:50:21 PST
Re: [SI-LIST] : SimulationsScott McMorrowFri Jan 14 2000 - 13:53:06 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Jim FreemanFri Jan 14 2000 - 14:15:05 PST
[SI-LIST] : C and L measurements using a TDRRichard A. SchumacherFri Jan 14 2000 - 14:48:17 PST
RE: [SI-LIST] : Zo Variance From Plating Thickness VariationTom DagostinoFri Jan 14 2000 - 15:44:20 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsBruce W. MarlerFri Jan 14 2000 - 16:06:26 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?[email protected]Fri Jan 14 2000 - 16:08:10 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept and right angle bends?[email protected]Fri Jan 14 2000 - 16:09:53 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?ARNOLD,PETER (HP-Cupertino,ex3)Fri Jan 14 2000 - 16:37:45 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsRon MillerFri Jan 14 2000 - 16:40:46 PST
Re: [SI-LIST] : 20H RevisitedSainath NimmagaddaFri Jan 14 2000 - 17:34:03 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept? More on Bends/MitersLATOURRETTE,JEFF (HP-SanJose,ex1)Fri Jan 14 2000 - 18:11:29 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept? More on Bends/MitersChris ChengFri Jan 14 2000 - 19:36:11 PST
Re: [SI-LIST] : 20H RevisitedMichael VrbanacFri Jan 14 2000 - 20:35:45 PST
Re: [SI-LIST] : 20H Revisited[email protected]Fri Jan 14 2000 - 21:14:12 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsBruce W. MarlerSat Jan 15 2000 - 09:47:35 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Lee RitcheySat Jan 15 2000 - 12:13:46 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Lee RitcheySat Jan 15 2000 - 12:15:54 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Lee RitcheySat Jan 15 2000 - 12:18:11 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Scott McMorrowSat Jan 15 2000 - 12:33:43 PST
Re: [SI-LIST] : What's your favourite Screwy SI Concept?Scott McMorrowSat Jan 15 2000 - 12:36:30 PST
[SI-LIST] : width of the return pathEric BogatinSun Jan 16 2000 - 08:16:54 PST
Re: [SI-LIST] : width of the return pathNirmal JainSun Jan 16 2000 - 11:38:15 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Adrian ShinerSun Jan 16 2000 - 10:55:02 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Adrian ShinerSun Jan 16 2000 - 10:48:23 PST
Re: [SI-LIST] : High Speed Backplane Connector Recommendations[email protected]Sun Jan 16 2000 - 16:21:22 PST
Re: [SI-LIST] : What's your favorite Screwy SI Concept?Michael VrbanacSun Jan 16 2000 - 17:26:35 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?Chris HeardSun Jan 16 2000 - 17:37:22 PST
RE: [SI-LIST] : SimulationsAbe RiaziSun Jan 16 2000 - 18:46:04 PST
RE: [SI-LIST] : width of the return pathTeddy ChouSun Jan 16 2000 - 19:18:30 PST
[SI-LIST] : Excessive Posting Lengthadd automationSun Jan 16 2000 - 19:59:00 PST
Re: [SI-LIST] : SimulationsDouglas C. SmithSun Jan 16 2000 - 23:05:45 PST
RE: [SI-LIST] : What's your favourite Screwy SI Concept?[email protected]Mon Jan 17 2000 - 07:33:02 PST
Re: [SI-LIST] : High Speed Backplane Connector RecommendationsBruce W. MarlerMon Jan 17 2000 - 07:45:56 PST
RE: [SI-LIST] : XTK vs ICXWeston BealMon Jan 17 2000 - 08:46:24 PST
Re: [SI-LIST] : Excessive Posting LengthPatrick LawlerMon Jan 17 2000 - 08:51:17 PST
[SI-LIST] : receiver jitterChris ChengMon Jan 17 2000 - 16:51:26 PST
[SI-LIST] : [Fwd: TDNACal access]Ron MillerMon Jan 17 2000 - 17:19:58 PST
RE: [SI-LIST] : receiver jitterMarc HumphreysTue Jan 18 2000 - 06:50:02 PST
RE: [SI-LIST] : receiver jitterMuranyi, ArpadTue Jan 18 2000 - 08:23:07 PST
[SI-LIST] : minor si-list problem resolvedRay AndersonTue Jan 18 2000 - 14:45:45 PST
RE: [SI-LIST] : receiver jitterRoy LeventhalTue Jan 18 2000 - 15:02:54 PST
Re: [SI-LIST] : receiver jitterJonathan DowlingTue Jan 18 2000 - 17:57:18 PST
[SI-LIST] : BERT testerszanella, fabrizioWed Jan 19 2000 - 04:58:28 PST
RE: [SI-LIST] : minor si-list problem resolvedMuranyi, ArpadWed Jan 19 2000 - 08:43:42 PST
Re: [SI-LIST] : BERT testersBruce W. MarlerWed Jan 19 2000 - 08:44:41 PST
Re: [SI-LIST] : XTK vs ICXTadashi ARAIWed Jan 19 2000 - 10:10:28 PST
RE: [SI-LIST] : receiver jitterChris chengWed Jan 19 2000 - 10:12:11 PST
Re: [SI-LIST] : XTK vs ICXScott McMorrowWed Jan 19 2000 - 10:28:35 PST
RE: [SI-LIST] : receiver jitterJonathan DowlingWed Jan 19 2000 - 10:26:47 PST
Re: [SI-LIST] : BERT testersDoug McKeanWed Jan 19 2000 - 10:47:54 PST
Re: [SI-LIST] : receiver jitterScott McMorrowWed Jan 19 2000 - 10:50:04 PST
RE: [SI-LIST] : receiver jitterARNOLD,PETER (HP-Cupertino,ex3)Wed Jan 19 2000 - 11:21:27 PST
RE: [SI-LIST] : receiver jitterChan, Michael Wed Jan 19 2000 - 11:24:54 PST
Re: [SI-LIST] : receiver jitterD. C. SessionsWed Jan 19 2000 - 11:44:11 PST
RE: [SI-LIST] : receiver jitterTom DagostinoWed Jan 19 2000 - 11:43:05 PST
[SI-LIST] : New Experimental si-list-digest serviceRay AndersonWed Jan 19 2000 - 11:46:17 PST
Re: [SI-LIST] : receiver jitterD. C. SessionsWed Jan 19 2000 - 11:52:24 PST
Re: [SI-LIST] : receiver jitterD. C. SessionsWed Jan 19 2000 - 11:57:14 PST
Re: [SI-LIST] : receiver jitterJim FreemanWed Jan 19 2000 - 12:00:35 PST
RE: [SI-LIST] : receiver jitterChris ChengWed Jan 19 2000 - 12:55:29 PST
RE: [SI-LIST] : XTK vs ICXJames F. PetersonWed Jan 19 2000 - 13:08:52 PST
RE: [SI-LIST] : receiver jitterMellitz, RichardWed Jan 19 2000 - 13:17:45 PST
RE: [SI-LIST] : receiver jitterChris ChengWed Jan 19 2000 - 13:28:53 PST
RE: [SI-LIST] : receiver jitterChan, Michael Wed Jan 19 2000 - 13:31:49 PST
Re: [SI-LIST] : receiver jitterJim FreemanWed Jan 19 2000 - 14:37:48 PST
Re: [SI-LIST] : receiver jitterbgrossmaWed Jan 19 2000 - 15:14:27 PST
Re: [SI-LIST] : **error**: internal timestep too smallDmitri KuznetsovWed Jan 19 2000 - 15:59:34 PST
RE: [SI-LIST] : **error**: internal timestep too smallMellitz, RichardWed Jan 19 2000 - 16:26:14 PST
Re: [SI-LIST] : **error**: internal timestep too smallFred BalistreriWed Jan 19 2000 - 16:20:14 PST
Re: [SI-LIST] : **error**: internal timestep too smallKim HelliwellWed Jan 19 2000 - 17:05:45 PST
Re: [SI-LIST] : **error**: internal timestep too smallKim HelliwellWed Jan 19 2000 - 17:13:06 PST
RE: [SI-LIST] : XTK vs ICX�L�·�Wed Jan 19 2000 - 17:37:03 PST
RE: [SI-LIST] : receiver jitterChris ChengWed Jan 19 2000 - 18:04:47 PST
[SI-LIST] : differential trace model (was: receiver jitter)[email protected]Wed Jan 19 2000 - 20:45:08 PST
Re: [SI-LIST] : receiver jitterMike LaBonteThu Jan 20 2000 - 05:55:19 PST
RE: [SI-LIST] : **error**: internal timestep too smallzanella, fabrizioThu Jan 20 2000 - 06:14:01 PST
Re: [SI-LIST] : BERT testers[email protected]Wed Jan 19 2000 - 11:45:04 PST
RE: [SI-LIST] : **error**: internal timestep too smallMuranyi, ArpadThu Jan 20 2000 - 08:54:39 PST
Re: [SI-LIST] : **error**: internal timestep too smallKim HelliwellThu Jan 20 2000 - 10:15:51 PST
RE: [SI-LIST] : **error**: internal timestep too smallMuranyi, ArpadThu Jan 20 2000 - 12:18:42 PST
Re: [SI-LIST] : receiver jitterAdrian ShinerThu Jan 20 2000 - 11:37:11 PST
RE: [SI-LIST] : **error**: internal timestep too smallZabinski, PatrickThu Jan 20 2000 - 12:46:45 PST
Re: [SI-LIST] : **error**: internal timestep too smallKim HelliwellThu Jan 20 2000 - 13:03:26 PST
RE: [SI-LIST] : **error**: internal timestep too small[email protected]Thu Jan 20 2000 - 13:04:33 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Stephen PetersThu Jan 20 2000 - 13:05:12 PST
RE: [SI-LIST] : **error**: internal timestep too smallMellitz, RichardThu Jan 20 2000 - 13:38:05 PST
Re: [SI-LIST] : **error**: internal timestep too smallKim HelliwellThu Jan 20 2000 - 13:41:00 PST
[SI-LIST] : 10 layer board stackup[email protected]Thu Jan 20 2000 - 14:22:31 PST
Re: [SI-LIST] : 10 layer board stackupRon MillerThu Jan 20 2000 - 14:43:13 PST
RE: [SI-LIST] : modeling languages (was: receiver jitter)Muranyi, ArpadThu Jan 20 2000 - 17:35:26 PST
Re: [SI-LIST] : 10 layer board stackupLee RitcheyThu Jan 20 2000 - 17:48:48 PST
RE: [SI-LIST] : 10 layer board stackupDunbar, TonyThu Jan 20 2000 - 18:06:57 PST
RE: [SI-LIST] : 10 layer board stackupCusanelli, TonyFri Jan 21 2000 - 05:33:11 PST
RE: [SI-LIST] : XTK vs ICXzanella, fabrizioFri Jan 21 2000 - 05:29:46 PST
Re: [SI-LIST] : **error**: internal timestep too small[email protected]Fri Jan 21 2000 - 06:59:33 PST
RE: [SI-LIST] : 10 layer board stackupGrasso, Charles (Chaz)Fri Jan 21 2000 - 07:53:35 PST
RE: [SI-LIST] : **error**: internal timestep too smallMuranyi, ArpadFri Jan 21 2000 - 07:57:26 PST
RE: [SI-LIST] : **error**: internal timestep too smallChan, Michael Fri Jan 21 2000 - 08:15:02 PST
Re: [SI-LIST] : **error**: internal timestep too smallKim HelliwellFri Jan 21 2000 - 08:38:42 PST
RE: [SI-LIST] : 10 layer board stackup[email protected]Fri Jan 21 2000 - 08:48:58 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Jim FreemanFri Jan 21 2000 - 09:24:36 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)C. KumarFri Jan 21 2000 - 10:32:42 PST
RE: [SI-LIST] : 10 layer board stackupJohns DanielFri Jan 21 2000 - 10:48:24 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Kim HelliwellFri Jan 21 2000 - 11:03:49 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)C. KumarFri Jan 21 2000 - 11:44:58 PST
RE: [SI-LIST] : modeling languages (was: receiver jitter)Muranyi, ArpadFri Jan 21 2000 - 11:59:36 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Jim FreemanFri Jan 21 2000 - 12:20:20 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)C. KumarFri Jan 21 2000 - 12:40:33 PST
RE: [SI-LIST] : modeling languages (was: receiver jitter)Muranyi, ArpadFri Jan 21 2000 - 12:39:07 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Fred BalistreriFri Jan 21 2000 - 12:30:34 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Kim HelliwellFri Jan 21 2000 - 13:07:05 PST
Re: [SI-LIST] : 10 layer board stackupDoug McKeanFri Jan 21 2000 - 13:36:42 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Fred BalistreriFri Jan 21 2000 - 13:35:26 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Jim FreemanFri Jan 21 2000 - 14:35:33 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Fred BalistreriFri Jan 21 2000 - 16:19:29 PST
[SI-LIST] : Email slip upFred BalistreriFri Jan 21 2000 - 16:39:36 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Jim FreemanFri Jan 21 2000 - 17:39:23 PST
[SI-LIST] : Distance between Power and Ground planesdavid gil donateMon Jan 24 2000 - 01:57:49 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)D. C. SessionsMon Jan 24 2000 - 07:43:39 PST
Re: [SI-LIST] : Distance between Power and Ground planesLee RitcheyMon Jan 24 2000 - 07:57:46 PST
RE: [SI-LIST] : Distance between Power and Ground planesClewell, Craig WMon Jan 24 2000 - 10:00:52 PST
Re: [SI-LIST] : Distance between Power and Ground planesDoug McKeanMon Jan 24 2000 - 11:22:53 PST
RE: [SI-LIST] : modeling languages (was: receiver jitter)Chris ChengMon Jan 24 2000 - 14:02:33 PST
Re: [SI-LIST] : modeling languages (was: receiver jitter)Fred BalistreriMon Jan 24 2000 - 14:29:29 PST
[SI-LIST] : Field Extractor + SimulatorChristian S. RodeTue Jan 25 2000 - 15:10:04 PST
[SI-LIST] : Re: Field Extractor + SimulatorChristian S. RodeTue Jan 25 2000 - 16:14:42 PST
[SI-LIST] : Decoupling capacitor resonanceChris BobekTue Jan 25 2000 - 17:42:02 PST
Re: [SI-LIST] : Decoupling capacitor resonanceRon MillerTue Jan 25 2000 - 18:10:12 PST
RE: [SI-LIST] : IDE bus questionFarrokh MottahedinTue Jan 25 2000 - 11:54:36 PST
Re: [SI-LIST] : Decoupling capacitor resonanceDavid InstoneWed Jan 26 2000 - 02:11:41 PST
[SI-LIST] :PECL spec?Ronnen LovingerWed Jan 26 2000 - 02:33:50 PST
RE: [SI-LIST] :PECL spec?Zabinski, PatrickWed Jan 26 2000 - 04:44:34 PST
RE: [SI-LIST] : Decoupling capacitor resonancePeterson, James F (FL51)Wed Jan 26 2000 - 05:38:20 PST
RE: [SI-LIST] : Decoupling capacitor resonanceGreim, MichaelWed Jan 26 2000 - 06:11:32 PST
Re: [SI-LIST] : Decoupling capacitor resonanceRoy LeventhalWed Jan 26 2000 - 07:29:40 PST
[SI-LIST] : Workshop on Signal Propagation on InterconnectsSPI WorkshopWed Jan 26 2000 - 07:51:26 PST
Re: [SI-LIST] : Decoupling capacitor resonanceRay AndersonWed Jan 26 2000 - 10:27:49 PST
Re: [SI-LIST] : Decoupling capacitor resonanceRon MillerWed Jan 26 2000 - 10:56:26 PST
Re: [SI-LIST] : Decoupling capacitor resonanceChris BobekWed Jan 26 2000 - 11:42:36 PST
RE: [SI-LIST] : Decoupling capacitor resonanceChris ChengWed Jan 26 2000 - 11:58:01 PST
Re: [SI-LIST] : Decoupling capacitor resonanceRoy LeventhalWed Jan 26 2000 - 12:00:18 PST
Re: [SI-LIST] : Frequency dependence and all that jazzArani SinhaWed Jan 26 2000 - 12:02:03 PST
[SI-LIST] : PCB layout in pull up/down resistorsMarko PulliWed Jan 26 2000 - 12:10:49 PST
[SI-LIST] : Another capacitor questionBrent DeWittWed Jan 26 2000 - 13:03:42 PST
Re: [SI-LIST] : Another capacitor questionRay AndersonWed Jan 26 2000 - 13:28:50 PST
[SI-LIST] : Job Opening- Intel OregonGardiner, ScottWed Jan 26 2000 - 17:37:34 PST
Re: [SI-LIST] : Decoupling capacitor resonanceRay AndersonWed Jan 12 2000 - 05:59:50 PST
Re: [SI-LIST] : Another capacitor questionDavid InstoneThu Jan 27 2000 - 01:51:20 PST
RE: [SI-LIST] : Another capacitor questionDan SwansonThu Jan 27 2000 - 04:38:53 PST
Re: [SI-LIST] : Another capacitor questionRon MillerThu Jan 27 2000 - 09:57:56 PST
Re: [SI-LIST] : Another capacitor questionRay AndersonThu Jan 27 2000 - 10:33:32 PST
Re: [SI-LIST] : Another capacitor questionDoug BrooksThu Jan 27 2000 - 11:17:23 PST
[SI-LIST] : Power Plane for Internal Device Power?phelan, tonyThu Jan 27 2000 - 11:35:46 PST
Re: [SI-LIST] : Another capacitor questionRay AndersonThu Jan 27 2000 - 11:46:48 PST
RE: [SI-LIST] : Another capacitor questionDan SwansonThu Jan 27 2000 - 11:56:40 PST
Re: [SI-LIST] : Power Plane for Internal Device Power?Scott McMorrowThu Jan 27 2000 - 12:03:47 PST
Re: [SI-LIST] : Another capacitor questionMark RandolThu Jan 27 2000 - 12:10:29 PST
Re: [SI-LIST] : Power Plane for Internal Device Power?D. C. SessionsThu Jan 27 2000 - 12:18:52 PST
Re: [SI-LIST] : Power Plane for Internal Device Power?Bradley S HensonThu Jan 27 2000 - 12:56:22 PST
Re: [SI-LIST] : Power Plane for Internal Device Power?Lee RitcheyThu Jan 27 2000 - 14:16:10 PST
Re: [SI-LIST] : Power Plane for Internal Device Power?D. C. SessionsThu Jan 27 2000 - 14:29:06 PST
[SI-LIST] : Questions abt Power Distribution SystemChang, Isaac Yew BengThu Jan 27 2000 - 23:50:26 PST
RE: [SI-LIST] : Power Plane for Internal Device Power?Peterson, James F (FL51)Fri Jan 28 2000 - 04:19:58 PST
Re: [SI-LIST] : Questions abt Power Distribution SystemIstvan NOVAKFri Jan 28 2000 - 04:06:29 PST
Re: [SI-LIST] : Questions abt Power Distribution SystemRay AndersonFri Jan 28 2000 - 10:41:14 PST
[SI-LIST] : EUROPEAN IBIS SUMMIT MEETING ANNOUNCEMENTBob RossFri Jan 28 2000 - 13:09:02 PST
[SI-LIST] : Announcement and Call for Papers (EPEP '00)Ray AndersonFri Jan 28 2000 - 15:13:28 PST
[SI-LIST] : Looking for shielded Din 41612 compatible connectorGreim, MichaelTue Feb 01 2000 - 07:43:35 PST
[SI-LIST] : LVDS questionsTom ZimmermanTue Feb 01 2000 - 12:13:01 PST
Re: [SI-LIST] : LVDS questionsD. C. SessionsTue Feb 01 2000 - 12:39:18 PST
[SI-LIST] : Signal Integrity simulation toolsRoberts, ChrisWed Feb 02 2000 - 05:34:06 PST
[SI-LIST] : How to find the archives (was Re: Signal Integrity simulation tools)Laurence MichaelsWed Feb 02 2000 - 08:02:48 PST
Re: [SI-LIST] : LVDS questionsTom ZimmermanWed Feb 02 2000 - 08:57:27 PST
RE: [SI-LIST] : LVDS questionsStephen PetersWed Feb 02 2000 - 09:59:56 PST
[SI-LIST] : LVDS signal observationChristopher wilsonWed Feb 02 2000 - 10:05:33 PST
FW: [SI-LIST] : Looking for shielded Din 41612 compatible connector[email protected]Wed Feb 02 2000 - 09:43:23 PST
RE: [SI-LIST] : LVDS signal observationTom DagostinoWed Feb 02 2000 - 10:38:52 PST
Re: [SI-LIST] : LVDS signal observationBradley S HensonWed Feb 02 2000 - 10:51:28 PST
RE: [SI-LIST] : LVDS signal observationDegerstrom, Michael J.Wed Feb 02 2000 - 11:55:45 PST
Re: [SI-LIST] : LVDS signal observationBruce W. MarlerWed Feb 02 2000 - 12:25:21 PST
RE: [SI-LIST] : LVDS questionsDegerstrom, Michael J.Wed Feb 02 2000 - 12:44:52 PST
[SI-LIST] : SI Speaker FeedbackKevin HansenWed Feb 02 2000 - 12:54:03 PST
Re: [SI-LIST] : LVDS signal observation[email protected]Wed Feb 02 2000 - 12:52:24 PST
[SI-LIST] : 20H rule: a theory?Abd ul-Rahman LomaxWed Feb 02 2000 - 13:27:35 PST
[SI-LIST] : si-list FAQRay AndersonWed Feb 02 2000 - 13:25:55 PST
RE: [SI-LIST] : LVDS signal observation[email protected]Wed Feb 02 2000 - 13:39:33 PST
Re: [SI-LIST] : si-list FAQSainath NimmagaddaWed Feb 02 2000 - 14:06:35 PST
RE: [SI-LIST] : si-list FAQWon ChangWed Feb 02 2000 - 14:21:47 PST
RE: [SI-LIST] : si-list FAQWeston BealWed Feb 02 2000 - 15:30:07 PST
[SI-LIST] : SSN and Power Plane Bounce, 8th February PresentationHans MellbergWed Feb 02 2000 - 17:14:10 PST
[SI-LIST] : environment effects of radiofrequency radiationWang LinWed Feb 02 2000 - 19:03:49 PST
Re: [SI-LIST] : LVDS signal observationgreg kimballWed Feb 02 2000 - 21:03:22 PST
RE: [SI-LIST] : 20H rule: a theory?Jeremy PlunkettWed Jan 12 2000 - 12:24:15 PST
[SI-LIST] : Possible FAQ TopicsRay AndersonWed Jan 12 2000 - 13:16:32 PST
R:[SI-LIST] : LVDS signal observationVigliarolo RobertoThu Feb 03 2000 - 01:11:49 PST
Re: [SI-LIST] : SSN and Power Plane Bounce, 8th February PresentationLee RitcheyThu Feb 03 2000 - 09:02:46 PST
RE: [SI-LIST] : environment effects of radiofrequency radiationIngraham, AndrewThu Feb 03 2000 - 09:16:14 PST
RE: [SI-LIST] : Possible FAQ TopicsFarrokh MottahedinThu Feb 03 2000 - 09:20:39 PST
[SI-LIST] : High-Speed Materials {[DC] & SI-List}Alderete, MichaelThu Feb 03 2000 - 09:49:24 PST
RE: [SI-LIST] : High-Speed Materials {[DC] & SI-List}Zabinski, Patrick J.Thu Feb 03 2000 - 10:16:16 PST
Re: [SI-LIST] : Possible FAQ TopicsMike MayerThu Feb 03 2000 - 10:49:26 PST
Re: [SI-LIST] : Possible FAQ Topics[email protected]Thu Feb 03 2000 - 11:10:36 PST
[SI-LIST] : Coplanar Transmission LineRoy LeventhalThu Feb 03 2000 - 10:58:26 PST
[SI-LIST] : Info about Xilinx Xchecker CablesJagdeep SinghThu Feb 03 2000 - 11:06:45 PST
Re: [SI-LIST] : High-Speed Materials {[DC] & SI-List}[email protected]Thu Feb 03 2000 - 11:07:44 PST
RE: [SI-LIST] : Coplanar Transmission LineDan SwansonThu Feb 03 2000 - 11:28:02 PST
Re: [SI-LIST] : Coplanar Transmission LineRay AndersonThu Feb 03 2000 - 11:34:49 PST
Re: [SI-LIST] : High-Speed Materials {[DC] & SI-List}E MontgomeryThu Feb 03 2000 - 11:40:01 PST
RE: [SI-LIST] : Coplanar Transmission LineZabinski, Patrick J.Thu Feb 03 2000 - 11:43:47 PST
RE: [SI-LIST] : Coplanar Transmission LineRoy LeventhalThu Feb 03 2000 - 11:49:43 PST
[SI-LIST] : interplanar capacitanceSpeer, EwartThu Feb 03 2000 - 11:48:46 PST
Re: [SI-LIST] : Coplanar Transmission LineRoy LeventhalThu Feb 03 2000 - 11:55:31 PST
RE: [SI-LIST] : Info about Xilinx Xchecker CablesPatterson, KenThu Feb 03 2000 - 12:12:27 PST
Re: [SI-LIST] : Coplanar Transmission LineVinu ArumughamThu Feb 03 2000 - 12:11:54 PST
RE: [SI-LIST] : Coplanar Transmission LineAlfredo MoncayoThu Feb 03 2000 - 12:22:45 PST
Re: [SI-LIST] : interplanar capacitanceRay AndersonThu Feb 03 2000 - 12:27:36 PST
RE: [SI-LIST] : Coplanar Transmission LineJian ZhengThu Feb 03 2000 - 12:38:48 PST
Re: [SI-LIST] : interplanar capacitancesweirThu Feb 03 2000 - 12:49:25 PST
RE: [SI-LIST] : Coplanar Transmission LineZabinski, Patrick J.Thu Feb 03 2000 - 12:49:20 PST
RE: [SI-LIST] : interplanar capacitanceGreim, MichaelThu Feb 03 2000 - 12:56:49 PST
Re: [SI-LIST] : Coplanar Transmission LineRay AndersonThu Feb 03 2000 - 12:52:23 PST
RE: [SI-LIST] : Coplanar Transmission LineDaniel, Erik S.Thu Feb 03 2000 - 13:02:08 PST
Re: [SI-LIST] : Coplanar Transmission LineRay AndersonThu Feb 03 2000 - 13:05:06 PST
Re: [SI-LIST] : Coplanar Transmission LineVinu ArumughamThu Feb 03 2000 - 13:39:52 PST
Re: [SI-LIST] : Coplanar Transmission LineRoy LeventhalThu Feb 03 2000 - 14:20:11 PST
[SI-LIST] : Embedded Capacitance Workshop a reminderGrasso, Charles (Chaz)Thu Feb 03 2000 - 15:26:02 PST
RE: [SI-LIST] : Coplanar Transmission LineWAUGH,RAY (HP-SanJose,ex1)Thu Feb 03 2000 - 15:33:42 PST
[SI-LIST] : ESR and bypass capsDoug BrooksThu Feb 03 2000 - 15:38:06 PST
Re: [SI-LIST] : Coplanar Transmission LineJohn HowardThu Feb 03 2000 - 08:52:42 PST
RE: [SI-LIST] : Coplanar Transmission LineJian ZhengThu Feb 03 2000 - 17:19:56 PST
Re: [SI-LIST] : Coplanar Transmission LineRon MillerThu Feb 03 2000 - 17:51:53 PST
Re: [SI-LIST] : Coplanar Transmission LineRon MillerThu Feb 03 2000 - 18:01:33 PST
Re: [SI-LIST] : Coplanar Transmission LineScott McMorrowThu Feb 03 2000 - 18:22:22 PST
RE: [SI-LIST] : Coplanar Transmission Line[email protected]Thu Feb 03 2000 - 18:24:34 PST
Re: [SI-LIST] : Coplanar Transmission LineChris PadillaThu Feb 03 2000 - 18:26:57 PST
Re: [SI-LIST] : Coplanar Transmission Line[email protected]Thu Feb 03 2000 - 20:34:32 PST
[SI-LIST] : EMC techniques on 2-layer boardWang LinThu Feb 03 2000 - 21:33:55 PST
RE: [SI-LIST] : High-Speed Materials {[DC] & SI-List}John PhillipsFri Feb 04 2000 - 01:51:19 PST
[SI-LIST] : Crossing clock domain boundaries in digital ASICs[email protected]Fri Feb 04 2000 - 02:13:01 PST
Re: [SI-LIST] : Coplanar Transmission LineRoy LeventhalFri Feb 04 2000 - 06:03:06 PST
RE: [SI-LIST] : interplanar capacitanceHarris, GeorgeThu Feb 03 2000 - 14:17:53 PST
Re: [SI-LIST] : Coplanar Transmission LineRoy LeventhalFri Feb 04 2000 - 07:11:41 PST
[SI-LIST] : Low EMI on Two layersFred DieckmannFri Feb 04 2000 - 07:21:45 PST
Re: [SI-LIST] : EMC techniques on 2-layer boardJohn HowardFri Feb 04 2000 - 00:10:05 PST
Re: [SI-LIST] : EMC techniques on 2-layer board[email protected]Fri Feb 04 2000 - 08:06:51 PST
RE: [SI-LIST] : Coplanar Transmission LineJian ZhengFri Feb 04 2000 - 08:20:46 PST
RE: [SI-LIST] : Coplanar Transmission LineJian ZhengFri Feb 04 2000 - 08:29:59 PST
RE: [SI-LIST] : Coplanar Transmission LineJian ZhengFri Feb 04 2000 - 08:40:07 PST
RE: [SI-LIST] : Coplanar Transmission LineJian ZhengFri Feb 04 2000 - 08:43:05 PST
RE: [SI-LIST] : Coplanar Transmission LineRoy LeventhalFri Feb 04 2000 - 09:05:45 PST
RE: [SI-LIST] : Coplanar Transmission LineE MontgomeryFri Feb 04 2000 - 09:41:16 PST
[SI-LIST] : Gigabit eithernet board.Nick DietzFri Feb 04 2000 - 09:47:55 PST
[SI-LIST] : Oooops....Ray AndersonFri Feb 04 2000 - 09:54:52 PST
RE: [SI-LIST] : Coplanar Transmission LineJian ZhengFri Feb 04 2000 - 10:11:52 PST
Re: [SI-LIST] : ESR and bypass capsLarry SmithFri Feb 04 2000 - 11:06:37 PST
RE: [SI-LIST] : Coplanar Transmission LineRoy LeventhalFri Feb 04 2000 - 10:24:25 PST
Re: [SI-LIST] : ESR and bypass capsRon MillerFri Feb 04 2000 - 11:43:31 PST
Re: [SI-LIST] : ESR and bypass capsDoug BrooksFri Feb 04 2000 - 11:52:55 PST
[SI-LIST] : RE:High-Speed MaterialsHans MellbergFri Feb 04 2000 - 12:28:35 PST
Re: [SI-LIST] : ESR and bypass capsRay AndersonFri Feb 04 2000 - 12:40:05 PST
[SI-LIST] : Power noise/ground bounce softwarezanella, fabrizioFri Feb 04 2000 - 12:37:52 PST
RE: [SI-LIST] : RE:High-Speed MaterialsFarrokh MottahedinFri Feb 04 2000 - 13:04:53 PST
Re: [SI-LIST] : Power noise/ground bounce softwareRon MillerFri Feb 04 2000 - 13:18:38 PST
Re: [SI-LIST] : ESR and bypass capsRay AndersonFri Feb 04 2000 - 13:28:44 PST
RE: [SI-LIST] : modeling languages (was: receiver jitter)Muranyi, ArpadFri Feb 04 2000 - 13:24:38 PST
RE: [SI-LIST] : Power noise/ground bounce softwareChan, Michael Fri Feb 04 2000 - 13:45:31 PST
RE: [SI-LIST] : Power noise/ground bounce software[email protected]Fri Feb 04 2000 - 14:14:48 PST
[SI-LIST] : Request for AMP Materials PaperDAmbrosia, John FFri Feb 04 2000 - 14:20:47 PST
Re: [SI-LIST] : ESR and bypass capsLarry SmithFri Feb 04 2000 - 15:37:18 PST
Re: [SI-LIST] : ESR and bypass capsRichard A. SchumacherFri Feb 04 2000 - 15:43:03 PST
Re: [SI-LIST] : ESR and bypass capsDoug BrooksFri Feb 04 2000 - 16:06:17 PST
Re: [SI-LIST] : Coplanar Transmission LineMark RandolFri Feb 04 2000 - 16:39:08 PST
RE: [SI-LIST] : Power noise/ground bounce softwareWinson YuFri Feb 04 2000 - 17:12:29 PST
Re: [SI-LIST] : ESR and bypass capsDoug BrooksFri Feb 04 2000 - 18:17:34 PST
Re: [SI-LIST] : ESR and bypass capsDouglas C. SmithFri Feb 04 2000 - 18:45:48 PST
Re: [SI-LIST] : ESR and bypass capsDouglas C. SmithFri Feb 04 2000 - 18:53:32 PST
Re: [SI-LIST] : ESR and bypass capsDouglas C. SmithSat Feb 05 2000 - 06:15:57 PST
Re: [SI-LIST] : ESR and bypass capsRay AndersonWed Jan 12 2000 - 15:54:46 PST
Re: [SI-LIST] : ESR and bypass capsDouglas C. SmithSun Feb 06 2000 - 18:53:49 PST
[SI-LIST] : DesignCon20000 paper postedIstvan NOVAKSun Feb 06 2000 - 20:53:59 PST
Re: [SI-LIST] : ESR and bypass capsIstvan NOVAKSun Feb 06 2000 - 21:16:05 PST
RE: [SI-LIST] : 10 layer board stackup RevisitedGary SteinkoglerSun Feb 06 2000 - 21:27:19 PST
Re: [SI-LIST] : ESR and bypass capsScott McMorrowSun Feb 06 2000 - 22:15:43 PST
[SI-LIST] : DSO Selection[email protected]Sun Feb 06 2000 - 23:50:58 PST
Re: [SI-LIST] : ESR and bypass caps[email protected]Mon Feb 07 2000 - 06:22:07 PST
Re: [SI-LIST] : DesignCon20000 paper postedRoy LeventhalMon Feb 07 2000 - 06:27:38 PST
RE: [SI-LIST] : ESR and bypass capsJohn PhillipsMon Feb 07 2000 - 06:53:30 PST
Re: [SI-LIST] : ESR and bypass capsLarry SmithMon Feb 07 2000 - 09:39:10 PST
Re: [SI-LIST] : ESR and bypass capsLarry SmithMon Feb 07 2000 - 10:21:52 PST
Re: [SI-LIST] : DesignCon20000 paper postedJim FreemanMon Feb 07 2000 - 11:04:13 PST
Re: [SI-LIST] : DesignCon20000 paper postedScott McMorrowMon Feb 07 2000 - 11:19:07 PST
Re: [SI-LIST] : ESR and bypass capsIstvan Novak - Board Design TechnologyMon Feb 07 2000 - 11:46:53 PST
Re: [SI-LIST] : ESR and bypass capsDoug BrooksMon Feb 07 2000 - 12:02:51 PST
Re: [SI-LIST] : DSO SelectionRon MillerMon Feb 07 2000 - 12:00:41 PST
Re: [SI-LIST] : Gigabit eithernet board.Dennis TomlinsonMon Feb 07 2000 - 12:31:49 PST
Re: [SI-LIST] : ESR and bypass capsRay AndersonMon Feb 07 2000 - 16:58:17 PST
RE: [SI-LIST] : Coplanar Transmission LineShawn CarpenterMon Feb 07 2000 - 20:16:55 PST
[SI-LIST] : correctionDouglas C. SmithMon Feb 07 2000 - 22:38:59 PST
[SI-LIST] : Training Suggestions WantedMayer, MikeTue Feb 08 2000 - 05:51:45 PST
Re: [SI-LIST] : Signal traces without reference planeHeiko DudekTue Feb 08 2000 - 07:35:36 PST
RE: [SI-LIST] : RE:High-Speed MaterialsHans MellbergTue Feb 08 2000 - 09:25:13 PST
Re: [SI-LIST] : Training Suggestions WantedLaurence MichaelsTue Feb 08 2000 - 10:03:51 PST
Re: [SI-LIST] : LVDS signal observationDoug SmithTue Feb 08 2000 - 10:25:24 PST
RE: [SI-LIST] : Training Suggestions WantedDunbar, TonyTue Feb 08 2000 - 10:22:56 PST
[SI-LIST] : Re:Training Suggestions WantedMackillop, William J.Tue Feb 08 2000 - 11:46:57 PST
RE: [SI-LIST] : DSO Selection[email protected]Tue Feb 08 2000 - 19:56:15 PST
Re: [SI-LIST] : Re:Training Suggestions WantedLaurence MichaelsWed Feb 09 2000 - 06:00:38 PST
Re: [SI-LIST] : LVDS signal observationBradley S HensonWed Feb 09 2000 - 07:13:27 PST
Re: [SI-LIST] : 10 layer board stackup RevisitedLee RitcheyWed Feb 09 2000 - 08:14:36 PST
Re: [SI-LIST] : 10 layer board stackup RevisitedScott McMorrowWed Feb 09 2000 - 08:42:28 PST
RE: [SI-LIST] : DSO SelectionTom DagostinoWed Feb 09 2000 - 14:02:54 PST
[SI-LIST] : LVDS signal observationChristopher B WilsonWed Feb 09 2000 - 17:50:38 PST
[SI-LIST] : bandwidth saving questionMatt KaufmannThu Feb 10 2000 - 14:42:51 PST
[SI-LIST] : si-list subscriber demographicsRay AndersonThu Feb 10 2000 - 14:48:40 PST
Re: [SI-LIST] : si-list subscriber demographicsChris PadillaThu Feb 10 2000 - 16:50:21 PST
RE: [SI-LIST] : Training Suggestions WantedChris ChengThu Feb 10 2000 - 17:10:09 PST
[SI-LIST] : Anyone on SI-list receiving UCE type spam?Peters, StephenThu Feb 10 2000 - 17:28:25 PST
Re: [SI-LIST] : Training Suggestions WantedJohn HowardThu Feb 10 2000 - 11:05:40 PST
[SI-LIST] : Capacitor Characterization VendorChang, Isaac Yew BengThu Feb 10 2000 - 19:58:56 PST
Re: [SI-LIST] : Training Suggestions Wanted[email protected]Thu Feb 10 2000 - 21:52:01 PST
[SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-adress inputsNetzler DirkThu Feb 10 2000 - 23:01:47 PST
RE: [SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-ad ress inputs�L�·�Fri Feb 11 2000 - 00:21:51 PST
[SI-LIST] : Looking for ibis reflector subscribing info......Greim, MichaelFri Feb 11 2000 - 04:44:47 PST
RE: [SI-LIST] : bandwidth saving questionClewell, Craig WFri Feb 11 2000 - 05:33:19 PST
Re: [SI-LIST] : Looking for ibis reflector subscribing info......Sunil KumarFri Feb 11 2000 - 05:59:40 PST
RE: [SI-LIST] : Anyone on SI-list receiving UCE type spam?Lund, SteveFri Feb 11 2000 - 05:53:00 PST
RE: [SI-LIST] : Anyone on SI-list receiving UCE type spam?Mayer, MikeFri Feb 11 2000 - 06:14:31 PST
[SI-LIST] : 3D data interchangeWitte, MarkusFri Feb 11 2000 - 07:17:13 PST
Re: [SI-LIST] : Training Suggestions WantedLee RitcheyFri Feb 11 2000 - 08:10:37 PST
Re: [SI-LIST] : Capacitor Characterization VendorJose RodriguezFri Feb 11 2000 - 09:50:54 PST
Re: [SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-adress inputsVinu ArumughamFri Feb 11 2000 - 10:12:18 PST
Re: [SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-adress inputsScott McMorrowSat Feb 12 2000 - 01:08:35 PST
[SI-LIST] : High Density Board to Board Connectors?Doug PiperMon Feb 14 2000 - 06:54:19 PST
RE: [SI-LIST] : High Density Board to Board Connectors?Clewell, Craig WMon Feb 14 2000 - 07:20:09 PST
RE: [SI-LIST] : High Density Board to Board Connectors?Zabinski, Patrick J.Mon Feb 14 2000 - 07:40:11 PST
RE: [SI-LIST] : monotonic signals at SDRAM-, SSRAM- and FEPROM-a dress inputsPeterson, James F (FL51)Mon Feb 14 2000 - 08:11:03 PST
RE: [SI-LIST] : High Density Board to Board Connectors?Clewell, Craig WMon Feb 14 2000 - 08:15:35 PST
Re: [SI-LIST] : monotonic signals at SDRAM-, SSRAM- and FEPROM-adress inputsScott McMorrowMon Feb 14 2000 - 08:48:39 PST
Re: [SI-LIST] : High Density Board to Board Connectors?[email protected]Mon Feb 14 2000 - 08:55:37 PST
Re: [SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-adress inputsD. C. SessionsMon Feb 14 2000 - 09:42:21 PST
RE: [SI-LIST] : monotonic signals at SDRAM-, SSRAM- and FEPROM-a dress inputsIngraham, AndrewMon Feb 14 2000 - 11:05:07 PST
[SI-LIST] :What do inputs do? monotonic signals at SDRAM-, SSRAM - and FEPROM-a dress inputsMellitz, RichardMon Feb 14 2000 - 19:45:21 PST
[SI-LIST] : PADS PowerPCB + SPECCTRA FST Circuit Fire SaleKevin DailyTue Feb 15 2000 - 12:02:03 PST
RE: [SI-LIST] : monotonic signals at SDRAM-, SSRAM- and FEPROM-a dress inputsPeterson, James F (FL51)Wed Feb 16 2000 - 12:44:39 PST
RE: [SI-LIST] : ESR and bypass caps[email protected]Wed Feb 16 2000 - 13:57:42 PST
RE: [SI-LIST] : ESR and bypass capsRay AndersonWed Feb 16 2000 - 14:52:24 PST
[SI-LIST] : IBIS EUROPEAN SUMMIT MEETING SECOND ANNOUNCEMENTBob RossWed Feb 16 2000 - 16:16:45 PST
[SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice.....Greim, MichaelThu Feb 17 2000 - 11:35:41 PST
Re: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice.....Scott McMorrowThu Feb 17 2000 - 11:53:43 PST
[SI-LIST] : CAD for SI, EMC. Hyperlynx experiences.Jose RodriguezThu Feb 17 2000 - 12:17:18 PST
Re: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice.....Ray AndersonThu Feb 17 2000 - 12:18:58 PST
RE: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice.....Mellitz, RichardThu Feb 17 2000 - 12:26:17 PST
RE: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice.....Zabinski, Patrick J.Thu Feb 17 2000 - 12:45:06 PST
Re: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice.....Scott McMorrowThu Feb 17 2000 - 12:49:33 PST
RE: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice.....Ray AndersonThu Feb 17 2000 - 13:25:10 PST
RE: [SI-LIST] : CAD for SI, EMC. Hyperlynx experiences.Mayer, MikeThu Feb 17 2000 - 13:35:27 PST
RE: [SI-LIST] : CAD for SI, EMC. Hyperlynx experiences.Chris RokusekThu Feb 17 2000 - 14:51:55 PST
[SI-LIST] : Position AvailableTim L. MichalkaThu Feb 17 2000 - 15:07:11 PST
[SI-LIST] : Where for art thou Tantalum Caps?Chris PadillaThu Feb 17 2000 - 15:06:50 PST
RE: [SI-LIST] : Where for art thou Tantalum Caps?Scott BrennemanThu Feb 17 2000 - 15:45:15 PST
[SI-LIST] : Other ways of transmitting differential signalling besides edge coupled traces or broad side coupled tracesSalvador AguinagaThu Feb 17 2000 - 16:29:32 PST
Re: [SI-LIST] : Other ways of transmitting differential signalling besides edgecoupled traces or broad side coupled tracesBob LewandowskiThu Feb 17 2000 - 18:56:47 PST
Re: [SI-LIST] : Where for art thou Tantalum Caps?[email protected]Thu Feb 17 2000 - 20:20:31 PST
RE: [SI-LIST] : Where for art thou Tantalum Caps?Cruz, JoseThu Feb 17 2000 - 17:31:31 PST
[SI-LIST] : Power / Ground simulation�L�·�Thu Feb 17 2000 - 21:16:26 PST
[SI-LIST] : problem with crystalyaserhThu Feb 17 2000 - 23:21:00 PST
�ظ�: [SI-LIST] : Power / Ground simulationrachild.chenFri Feb 18 2000 - 00:24:31 PST
Re: [SI-LIST] : problem with crystalsweirFri Feb 18 2000 - 02:08:52 PST
Re: [SI-LIST] : Other ways of transmitting differential signalling besides edgecoupled traces or broad side coupled traces[email protected]Fri Feb 18 2000 - 06:30:53 PST
RE: [SI-LIST] : Power / Ground simulationIngraham, AndrewFri Feb 18 2000 - 07:49:11 PST
Re: [SI-LIST] : Where for art thou Tantalum Caps?[email protected]Fri Feb 18 2000 - 10:34:08 PST
[SI-LIST] : measuring radiationyaserhSat Feb 19 2000 - 07:29:12 PST
[SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationAbe RiaziSat Feb 19 2000 - 08:37:19 PST
Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationS. WeirSat Feb 19 2000 - 14:18:45 PST
Re: [SI-LIST] : measuring radiationS. WeirSat Feb 19 2000 - 13:40:56 PST
[SI-LIST] : SI Design Engineer Position at Stratus (pre-IPO) in Maynard, MAMango, SteveSun Feb 20 2000 - 06:08:38 PST
RE: [SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationAbe RiaziSun Feb 20 2000 - 08:48:00 PST
RE: [SI-LIST] : Power / Ground simulation�L�·�Sun Feb 20 2000 - 18:50:47 PST
RE: [SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationS. WeirSun Feb 20 2000 - 21:38:36 PST
Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationScott McMorrowSun Feb 20 2000 - 23:48:29 PST
Re: [SI-LIST] : LVDS signal observationDavid InstoneMon Feb 21 2000 - 02:30:29 PST
Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationRoy LeventhalMon Feb 21 2000 - 07:56:53 PST
RE: [SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationAbe RiaziMon Feb 21 2000 - 11:03:07 PST
[SI-LIST] : Stack upIulian UngureanuMon Feb 21 2000 - 11:23:09 PST
Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationScott McMorrowMon Feb 21 2000 - 12:08:58 PST
[SI-LIST] : ESR and Bypass Caps, revisited and revisedDoug BrooksMon Feb 21 2000 - 15:12:59 PST
Re: [SI-LIST] : Stack upDoug McKeanMon Feb 21 2000 - 15:51:40 PST
Re: [SI-LIST] : Stack upsweirMon Feb 21 2000 - 17:09:13 PST
[SI-LIST] : Ibis questionMichael KurtenTue Feb 22 2000 - 02:11:19 PST
Re: [SI-LIST] : Stack upLee RitcheyTue Feb 22 2000 - 07:46:59 PST
RE: [SI-LIST] : Stack upIulian UngureanuTue Feb 22 2000 - 09:47:53 PST
Re: [SI-LIST] : Stack upsweirTue Feb 22 2000 - 13:18:39 PST
[SI-LIST] : Anyone interested in Howard's book (will trade for Poon's book)Sage GundersonTue Feb 22 2000 - 13:46:09 PST
Re: [SI-LIST] : Anyone interested in Howard's book (will trade for Poon's book)Doug BrooksTue Feb 22 2000 - 14:12:02 PST
[SI-LIST] : SI POSITIONClewell, Craig WTue Feb 22 2000 - 12:17:41 PST
[SI-LIST] : Searching XTK utils.Tadashi ARAIWed Feb 23 2000 - 03:03:13 PST
Re: [SI-LIST] : Stack upLee RitcheyWed Feb 23 2000 - 07:51:22 PST
Re: [SI-LIST] : Stack upScott McMorrowWed Feb 23 2000 - 10:23:57 PST
RE: [SI-LIST] : Searching XTK utils.Abe RiaziWed Feb 23 2000 - 10:59:49 PST
RE: [SI-LIST] : Searching XTK utils.Joe SochaWed Feb 23 2000 - 12:01:43 PST
Re: [SI-LIST] : Stack upsweirWed Feb 23 2000 - 12:37:05 PST
[SI-LIST] : stripline PCB board shrinkage?C DeibeleWed Feb 23 2000 - 12:48:23 PST
Re: [SI-LIST] : stripline PCB board shrinkage?Ray AndersonWed Feb 23 2000 - 13:27:46 PST
Re: [SI-LIST] : stripline PCB board shrinkage?C DeibeleWed Feb 23 2000 - 14:15:23 PST
Re: [SI-LIST] : stripline PCB board shrinkage?Bob LewandowskiWed Feb 23 2000 - 15:50:12 PST
Re: [SI-LIST] : Stack upDoug McKeanWed Feb 23 2000 - 16:54:15 PST
Re: [SI-LIST] : Searching XTK utils.Richard KuoWed Feb 23 2000 - 17:13:26 PST
RE: [SI-LIST] : stripline PCB board shrinkage?Dan SwansonThu Feb 24 2000 - 04:31:06 PST
Re: [SI-LIST] : stripline PCB board shrinkage?C DeibeleThu Feb 24 2000 - 07:06:31 PST
Re: [SI-LIST] : Stack upLee RitcheyThu Feb 24 2000 - 08:22:27 PST
[SI-LIST] : SI opening at EMC!zanella, fabrizioThu Feb 24 2000 - 08:32:08 PST
RE: [SI-LIST] :What do inputs do? monotonic signals at SDRAM-, SSRAM - and FEPROM-a dress inputsJonathan DowlingThu Feb 24 2000 - 09:09:27 PST
[SI-LIST] : Hopefully not a controversial question ...Doug McKeanThu Feb 24 2000 - 11:05:18 PST
RE: [SI-LIST] : Stack upRonald E. NikelThu Feb 24 2000 - 11:21:56 PST
Re: [SI-LIST] : Hopefully not a controversial question ...[email protected]Thu Feb 24 2000 - 11:57:54 PST
RE: [SI-LIST] : Hopefully not a controversial question ...[email protected]Thu Feb 24 2000 - 12:15:36 PST
[SI-LIST] : Crosstalk graphsRoy LeventhalThu Feb 24 2000 - 12:28:48 PST
Re: [SI-LIST] : Hopefully not a controversial question ...Doug McKeanThu Feb 24 2000 - 13:55:29 PST
Re: [SI-LIST] : Hopefully not a controversial question ...[email protected]Thu Feb 24 2000 - 14:11:04 PST
Re: [SI-LIST] : Searching XTK utils.Brad GriffinWed Feb 23 2000 - 00:43:25 PST
RE: [SI-LIST] : High Speed Design by Rules of Thumb vs. SimulationSteve TingWed Feb 23 2000 - 00:50:46 PST
RE: [SI-LIST] : Hopefully not a controversial question ...George BorkowiczFri Feb 25 2000 - 06:36:04 PST
[SI-LIST] : Bulk CapacitanceCruz, JoseFri Feb 25 2000 - 10:45:02 PST
Re: [SI-LIST] : Bulk CapacitanceRay AndersonFri Feb 25 2000 - 11:08:01 PST
RE: [SI-LIST] : Bulk CapacitanceChang, Martin MFri Feb 25 2000 - 11:42:18 PST
[SI-LIST] : OpportunitiesRon MillerFri Feb 25 2000 - 11:49:45 PST
[SI-LIST] : Fast edge termination choiceShayle HirschmanFri Feb 25 2000 - 06:34:27 PST
RE: [SI-LIST] : Fast edge termination choiceKowal, KeithFri Feb 25 2000 - 13:04:53 PST
[SI-LIST] : Zener used to clamp Vcc?Chris BobekFri Feb 25 2000 - 14:20:16 PST
RE: [SI-LIST] : Fast edge termination choiceIngraham, AndrewFri Feb 25 2000 - 14:19:54 PST
Re: [SI-LIST] : Fast edge termination choiceD. C. SessionsFri Feb 25 2000 - 14:32:21 PST
RE: [SI-LIST] : Zener used to clamp Vcc?WAUGH,RAY (HP-SanJose,ex1)Fri Feb 25 2000 - 14:45:42 PST
RE: [SI-LIST] : Fast edge termination choiceShayle HirschmanFri Feb 25 2000 - 08:49:25 PST
Re: [SI-LIST] : Zener used to clamp Vcc?Vinu ArumughamFri Feb 25 2000 - 14:56:31 PST
[SI-LIST] : Re: OpportunitiesRon MillerFri Feb 25 2000 - 15:42:34 PST
RE: [SI-LIST] : Re: Opportunities[email protected]Fri Feb 25 2000 - 16:05:44 PST
RE: [SI-LIST] : Zener used to clamp Vcc?Tom DagostinoFri Feb 25 2000 - 16:14:46 PST
Re: [SI-LIST] : Re: OpportunitiesScott McMorrowFri Feb 25 2000 - 17:13:55 PST
[SI-LIST] : Opinions on SI CAE toolsEli FernaldFri Feb 25 2000 - 15:26:39 PST
Re: [SI-LIST] : Re: OpportunitiesBob LewandowskiFri Feb 25 2000 - 17:39:13 PST
Re: [SI-LIST] : Re: Opportunities[email protected]Fri Feb 25 2000 - 18:10:18 PST
RE: [SI-LIST] : Opinions on SI CAE tools[email protected]Fri Feb 25 2000 - 18:48:26 PST
RE: [SI-LIST] : Fast edge termination choicePeterson, James F (FL51)Sat Feb 26 2000 - 07:42:16 PST
Re: [SI-LIST] : Re: OpportunitiesRay AndersonWed Feb 23 2000 - 03:55:58 PST
[SI-LIST] : Max Zo of Flat Flexible CablePeter BaxterSat Feb 26 2000 - 13:54:43 PST
Re: [SI-LIST] : Max Zo of Flat Flexible CableScott McMorrowSat Feb 26 2000 - 14:51:09 PST
Re: [SI-LIST] : Max Zo of Flat Flexible CableRonald MillerSat Feb 26 2000 - 18:55:00 PST
R:[SI-LIST] : Zener used to clamp Vcc?Vigliarolo RobertoMon Feb 28 2000 - 03:07:21 PST
RE: [SI-LIST] : Hopefully not a controversial question ...Grasso, Charles (Chaz)Mon Feb 28 2000 - 07:56:27 PST
RE: [SI-LIST] : Max Zo of Flat Flexible CableJohn EllisMon Feb 28 2000 - 08:10:34 PST
RE: [SI-LIST] : Opinions on SI CAE toolsWeston BealMon Feb 28 2000 - 09:06:01 PST
RE: [SI-LIST] : Re: Opportunities - Keep them coming!!Grasso, Charles (Chaz)Mon Feb 28 2000 - 09:51:07 PST
Re: [SI-LIST] : Max Zo of Flat Flexible CableRon MillerMon Feb 28 2000 - 11:27:28 PST
Re: [SI-LIST] : Re: OpportunitiesRay AndersonMon Feb 28 2000 - 11:43:13 PST
[SI-LIST] : Frequency or time domain for component characterizationKai KeskinenMon Feb 28 2000 - 12:09:12 PST
RE: [SI-LIST] : Max Zo of Flat Flexible CableDoug PiperMon Feb 28 2000 - 11:51:27 PST
Re: [SI-LIST] : Frequency or time domain for component characterizationRay AndersonMon Feb 28 2000 - 13:20:02 PST
RE: [SI-LIST] : Zener used to clamp Vcc?Tom DagostinoMon Feb 28 2000 - 14:57:16 PST
Re: [SI-LIST] : Frequency or time domain for component characterizationSteve CoreyMon Feb 28 2000 - 15:19:10 PST
[SI-LIST] : Opportunities at Serverworks (skip the previous)Jeremy PlunkettMon Feb 28 2000 - 15:44:44 PST
[SI-LIST] : Software scope, VOMDoug BrooksMon Feb 28 2000 - 16:22:11 PST
Re: [SI-LIST] : Frequency or time domain for componentcharacterizationRon MillerMon Feb 28 2000 - 16:54:58 PST
[SI-LIST] : A excellent SI Engineer position in Chinarachild.chenMon Feb 28 2000 - 17:26:56 PST
Re: [SI-LIST] : Frequency or time domain for componentcharacterizationAubrey Keith SparkmanMon Feb 28 2000 - 18:37:57 PST
Re: [SI-LIST] : Frequency or time domain for component characterizationc deibeleMon Feb 28 2000 - 18:36:59 PST
RE: [SI-LIST] : A excellent SI Engineer position in ChinaJeremy PlunkettMon Feb 28 2000 - 18:47:00 PST
Re: [SI-LIST] : Frequency or time domain for component characterizationScott McMorrowMon Feb 28 2000 - 19:47:26 PST
[SI-LIST] : �ظ�: [SI-LIST] : A excellent SI Enginer position in Chinrachild.chenMon Feb 28 2000 - 22:22:30 PST
[SI-LIST] : (urgent) SI tool demandDevrim FidanciTue Feb 29 2000 - 00:12:36 PST
Re: [SI-LIST] : (urgent) SI tool demandScott McMorrowTue Feb 29 2000 - 00:34:09 PST
R:[SI-LIST] : Zener used to clamp Vcc?Vigliarolo RobertoTue Feb 29 2000 - 01:24:22 PST
RE: [SI-LIST] : Frequency or time domain for component characterization[email protected]Tue Feb 29 2000 - 03:31:41 PST
[SI-LIST] : LVDS drive LCD[email protected]Tue Feb 29 2000 - 05:19:46 PST
RE: [SI-LIST] : Frequency or time domain for component characteri zation[email protected]Tue Feb 29 2000 - 06:58:30 PST
Re: [SI-LIST] : Frequency or time domain for component characterizationC DeibeleTue Feb 29 2000 - 07:20:07 PST
Re: [SI-LIST] : Frequency or time domain for component characterizationScott McMorrowTue Feb 29 2000 - 08:55:07 PST
Re: [SI-LIST] : Frequency or time domain for component characterizationScott McMorrowTue Feb 29 2000 - 10:41:12 PST
[SI-LIST] : What is the IEEE 802.3 (Gigabit Ethernet) reflector adr?Loren KoehlerTue Feb 29 2000 - 11:00:52 PST
FW: [SI-LIST] : Training Suggestions WantedMichael O'ShaughnessyTue Feb 29 2000 - 11:43:48 PST
RE: [SI-LIST] : Frequency or time domain for component characteri zationGeorge BorkowiczTue Feb 29 2000 - 11:57:47 PST
RE: [SI-LIST] : What is the IEEE 802.3 (Gigabit Ethernet) reflect or adr?Farrokh MottahedinTue Feb 29 2000 - 15:08:46 PST
[SI-LIST] : How to measure differential pattern on test coupon?�B�n�dTue Feb 29 2000 - 23:33:53 PST
AW: [SI-LIST] : How to measure differential pattern on test coupo n?John, Hans-JoergWed Mar 01 2000 - 01:15:06 PST
[SI-LIST] : 2MM Connectors Standards CommitteeDoug PiperWed Mar 01 2000 - 07:14:51 PST
Re: [SI-LIST] : 2MM Connectors Standards Committee[email protected]Wed Mar 01 2000 - 09:08:25 PST
[SI-LIST] : Adding inductors to ground?Chris BobekWed Mar 01 2000 - 14:14:49 PST
[SI-LIST] : spice directional coupler modelRay AndersonWed Mar 01 2000 - 14:38:31 PST
RE: [SI-LIST] : Adding inductors to ground?Zabinski, Patrick J.Wed Mar 01 2000 - 15:15:02 PST
Re: [SI-LIST] : Adding inductors to ground?Vinu ArumughamWed Mar 01 2000 - 15:35:14 PST
RE: [SI-LIST] : Adding inductors to ground?Giri GopalanWed Mar 01 2000 - 15:58:29 PST
Re: [SI-LIST] : Crosstalk graphsDoug McKeanWed Mar 01 2000 - 16:06:34 PST
Re: [SI-LIST] : Adding inductors to ground?Scott McMorrowWed Mar 01 2000 - 16:15:24 PST
[SI-LIST] : ACCEL's "signal integrity" toolAndy PetersWed Mar 01 2000 - 17:02:44 PST
RE: [SI-LIST] : Adding inductors to ground?sweirWed Mar 01 2000 - 17:21:52 PST
Re: [SI-LIST] : Adding inductors to ground?D. C. SessionsWed Mar 01 2000 - 17:48:08 PST
RE: [SI-LIST] : How to measure differential pattern on test coupo n?�B�n�dWed Mar 01 2000 - 18:10:16 PST
[SI-LIST] : HSPICE: Delay and invert a differential signal w.r.t to another.Vipul BadoniThu Mar 02 2000 - 00:02:57 PST
Re: [SI-LIST] : HSPICE: Delay and invert a differential signal w.r.t to another.A. D. ShripadarajThu Mar 02 2000 - 01:29:21 PST
Re: [SI-LIST] : How to measure differential pattern on test coupo n?David InstoneThu Mar 02 2000 - 02:18:19 PST
AW: [SI-LIST] : How to measure differential pattern on test coupo n?Ulrich MusslerThu Mar 02 2000 - 03:36:20 PST
[SI-LIST] : FYI: SPICE coupled w element bug in 99.4Greim, MichaelThu Mar 02 2000 - 04:41:01 PST
Re: [SI-LIST] : ACCEL's "signal integrity" toolMikhail MatusovThu Mar 02 2000 - 06:45:02 PST
Re: [SI-LIST] : ACCEL's "signal integrity" tool[email protected]Thu Mar 02 2000 - 07:20:14 PST
Re: [SI-LIST] : ACCEL's "signal integrity" toolMatthias MansfeldThu Mar 02 2000 - 08:15:18 PST
[SI-LIST] : HSplotPeterson, George WThu Mar 02 2000 - 09:16:29 PST
Re: [SI-LIST] : Adding inductors to ground?Vinu ArumughamThu Mar 02 2000 - 10:35:22 PST
RE: [SI-LIST] : Adding inductors to ground?Ray AndersonThu Mar 02 2000 - 11:12:22 PST
Re: [SI-LIST] : How to measure differential pattern on test coupon?Bob LewandowskiThu Mar 02 2000 - 11:36:31 PST
Re: [SI-LIST] : Adding inductors to ground?bgrossmaThu Mar 02 2000 - 11:41:17 PST
RE: [SI-LIST] : Adding inductors to ground?Istvan Novak - Board Design TechnologyThu Mar 02 2000 - 11:56:49 PST
[SI-LIST] : Re: Differential measurementsFred BalistreriThu Mar 02 2000 - 13:05:00 PST
Re: [SI-LIST] : Adding inductors to ground?D. C. SessionsThu Mar 02 2000 - 13:45:15 PST
Re: [SI-LIST] : How to measure differential pattern on testcoupon?Ron MillerThu Mar 02 2000 - 16:07:52 PST
Re: [SI-LIST] : Adding inductors to ground?Ritchey LeeThu Mar 02 2000 - 17:46:33 PST
Re: [SI-LIST] : Adding inductors to ground?Lum Wee MeiFri Mar 03 2000 - 01:14:48 PST
[SI-LIST] : PCB fabrication technology - what's new?Andrew PhillipsFri Mar 03 2000 - 05:30:09 PST
RE: [SI-LIST] : Adding inductors to ground?Mayer, MikeFri Mar 03 2000 - 05:48:38 PST
[SI-LIST] : Islands of PowerKeith AmundsenFri Mar 03 2000 - 06:49:01 PST
Re: [SI-LIST] : Islands of PowerD. C. SessionsFri Mar 03 2000 - 08:07:11 PST
Re: [SI-LIST] : PCB fabrication technology - what's new?Shawn X. ArnoldFri Mar 03 2000 - 08:47:44 PST
Re: [SI-LIST] : Adding inductors to ground?Chris BobekFri Mar 03 2000 - 08:49:54 PST
RE: [SI-LIST] : Adding inductors to ground?[email protected]Fri Mar 03 2000 - 08:58:55 PST
RE: [SI-LIST] : PCB fabrication technology - what's new?Kai KeskinenFri Mar 03 2000 - 08:00:52 PST
RE: [SI-LIST] : Adding inductors to ground?Martin thompsonFri Mar 03 2000 - 09:08:19 PST
RE: [SI-LIST] : Adding inductors to ground?Larry SmithFri Mar 03 2000 - 09:55:16 PST
RE: [SI-LIST] : Adding inductors to ground?Ray AndersonFri Mar 03 2000 - 12:22:47 PST
[SI-LIST] : Opinions on Americom HF Digital Design course?gacrowellFri Mar 03 2000 - 14:57:42 PST
Re: [SI-LIST] : Crosstalk graphsRitchey LeeFri Mar 03 2000 - 16:07:50 PST
Re: [SI-LIST] : ACCEL's "signal integrity" toolRitchey LeeFri Mar 03 2000 - 16:08:44 PST
Re: [SI-LIST] : Islands of PowerRitchey LeeFri Mar 03 2000 - 16:46:15 PST
Re: [SI-LIST] : Adding inductors to ground?Ritchey LeeFri Mar 03 2000 - 16:50:44 PST
Re: [SI-LIST] : Islands of PowerS. WeirSat Mar 04 2000 - 04:05:53 PST
RE: [SI-LIST] : Adding inductors to ground?S. WeirSat Mar 04 2000 - 04:16:06 PST
[SI-LIST] : SpectraQuest vs XTKShannon RosemanSat Mar 04 2000 - 23:15:28 PST
Re: [SI-LIST] : SpectraQuest vs XTKTadashi ARAISun Mar 05 2000 - 23:31:57 PST
R:[SI-LIST] : Adding inductors to ground?Vigliarolo RobertoMon Mar 06 2000 - 03:26:58 PST
Re: [SI-LIST] : Crosstalk graphsMike VenthamMon Mar 06 2000 - 06:17:05 PST
Re: [SI-LIST] : SpectraQuest vs XTKTodd WesterhoffMon Mar 06 2000 - 07:47:36 PST
RE: [SI-LIST] : SpectraQuest vs XTKLe, Dat (dle)Mon Mar 06 2000 - 10:57:39 PST
[SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?Alex LiMon Mar 06 2000 - 18:36:01 PST
RE: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?Greim, MichaelTue Mar 07 2000 - 05:28:51 PST
RE: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?Fred DehkordiTue Mar 07 2000 - 06:43:23 PST
AW: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?Netzler DirkTue Mar 07 2000 - 07:05:14 PST
RE: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?Greim, MichaelTue Mar 07 2000 - 07:09:18 PST
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?Shawn X. ArnoldTue Mar 07 2000 - 08:39:09 PST
[SI-LIST] : MPC860 IBIS modelDennis TomlinsonTue Mar 07 2000 - 09:03:45 PST
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?[email protected]Tue Mar 07 2000 - 09:17:42 PST
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?[email protected]Tue Mar 07 2000 - 09:40:48 PST
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?[email protected]Tue Mar 07 2000 - 10:14:33 PST
RE: [SI-LIST] : MPC860 IBIS modelMayer, MikeTue Mar 07 2000 - 10:16:36 PST
[SI-LIST] : Posting from multiple account addressesRay AndersonTue Mar 07 2000 - 10:27:31 PST
RE: [SI-LIST] : PCB fabrication technology - what's new?Gaines, WilliamTue Mar 07 2000 - 10:33:56 PST
[SI-LIST] : TDR system informationsubasTue Mar 07 2000 - 10:41:13 PST
Re: [SI-LIST] : SpectraQuest vs XTKS WeirTue Mar 07 2000 - 10:46:58 PST
Re: [SI-LIST] : ACCEL's "signal integrity" toolLukas LouwTue Mar 07 2000 - 10:52:07 PST
RE: [SI-LIST] : Software scope, VOMJon PowellTue Mar 07 2000 - 10:57:06 PST
Re: [SI-LIST] : MPC860 IBIS modelScott McMorrowTue Mar 07 2000 - 11:04:42 PST
Re: [SI-LIST] : Software scope, VOM, follow-up answerDoug BrooksTue Mar 07 2000 - 11:44:36 PST
RE: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?jwaldenTue Mar 07 2000 - 11:51:49 PST
RE: [SI-LIST] : ACCEL's "signal integrity" toolClewell, Craig WTue Mar 07 2000 - 12:38:07 PST
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?Abd ul-Rahman LomaxTue Mar 07 2000 - 12:58:40 PST
[SI-LIST] : Looking for Ultra3 SCSI LVDlink routing guidelines.......Greim, MichaelTue Mar 07 2000 - 13:30:08 PST
[SI-LIST] : factors affecting source synchronus timingKen WuTue Mar 07 2000 - 13:49:27 PST
[SI-LIST] : RE:Andy PetersTue Mar 07 2000 - 13:45:54 PST
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?Nirmal JainTue Mar 07 2000 - 13:58:46 PST
RE: [SI-LIST] :PCB Bd thkness'Dave HooverTue Mar 07 2000 - 14:10:22 PST
RE: [SI-LIST] :PCB Bd thkness'Chris PadillaTue Mar 07 2000 - 14:27:43 PST
Re: [SI-LIST] :PCB Bd thkness'Scott McMorrowTue Mar 07 2000 - 14:35:18 PST
Re: [SI-LIST] :PCB Bd thkness'[email protected]Tue Mar 07 2000 - 14:52:34 PST
RE: [SI-LIST] :PCB Bd thkness'[email protected]Tue Mar 07 2000 - 14:52:49 PST
RE: [SI-LIST] : SpectraQuest vs XTKScott BrennemanTue Mar 07 2000 - 15:12:28 PST
RE: [SI-LIST] :PCB Bd thkness'Scott BrennemanTue Mar 07 2000 - 15:09:59 PST
[SI-LIST] : Medium range capacitorsShayle HirschmanTue Mar 07 2000 - 10:20:37 PST
[SI-LIST] : Standard's LoreChris PadillaTue Mar 07 2000 - 17:25:08 PST
[SI-LIST] : IBIS EUROPEAN SUMMIT MEETING THIRD ANNOUNCEMENTBob RossTue Mar 07 2000 - 17:28:19 PST
RE: [SI-LIST] : SpectraQuest vs XTKChris ChengTue Mar 07 2000 - 17:36:50 PST
Re: [SI-LIST] : Medium range capacitorssweirTue Mar 07 2000 - 17:42:00 PST
Re: [SI-LIST] : Medium range capacitorsShayle HirschmanTue Mar 07 2000 - 12:44:27 PST
Re: [SI-LIST] :PCB Bd thkness'Lum Wee MeiTue Mar 07 2000 - 19:20:35 PST
Re: [SI-LIST] : Medium range capacitorssweirTue Mar 07 2000 - 19:21:50 PST
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ?David InstoneWed Mar 08 2000 - 01:55:56 PST
RE: [SI-LIST] :PCB Bd thkness'Killoy Richard-P29744Wed Mar 08 2000 - 07:32:19 PST
Re: [SI-LIST] :PCB Bd thkness'David InstoneWed Mar 08 2000 - 08:21:22 PST
Re: [SI-LIST] :PCB Bd thkness'Kim HelliwellWed Mar 08 2000 - 08:48:41 PST
Re: [SI-LIST] : Medium range capacitorsLarry SmithWed Mar 08 2000 - 08:59:46 PST
Re: [SI-LIST] : Medium range capacitorsShayle HirschmanWed Mar 08 2000 - 03:35:44 PST
[SI-LIST] : HatchDORIN OPREAWed Mar 08 2000 - 09:53:37 PST
Re: [SI-LIST] : Medium range capacitorssweirWed Mar 08 2000 - 10:20:34 PST
Re: [SI-LIST] : Hatch[email protected]Wed Mar 08 2000 - 12:05:15 PST
RE: [SI-LIST] : LVDS driving PCMLTom DagostinoThu Mar 09 2000 - 08:57:24 PST
RE: [SI-LIST] : why .062?Gaines, WilliamThu Mar 09 2000 - 08:41:17 PST
Re: [SI-LIST] : why .062?rbishopThu Mar 09 2000 - 07:32:44 PST
[SI-LIST] : RE: [IS-LIST] : why .062?Mayer, MikeThu Mar 09 2000 - 06:27:03 PST
RE: [SI-LIST] : Hi SI-gurus, One stupid question: Take a long (sa y 10 ft) long rod of perfect conductor (say copper) and connect one of i ts end to the +ve terminal of a battery through a switch. The other end of the battery is grounded to the earth. NowIngraham, AndrewThu Mar 09 2000 - 05:55:05 PST
[SI-LIST] : job opportunityPeterson, James F (FL51)Thu Mar 09 2000 - 04:53:04 PST
RE: [SI-LIST] : why .062?Cusanelli, TonyThu Mar 09 2000 - 03:08:27 PST
Re: [SI-LIST] : tracking/oversampling PLL architecturesDavid InstoneThu Mar 09 2000 - 01:56:24 PST
[SI-LIST] : Your experience with equivalent circuit modeling tools ...Christian SchusterThu Mar 09 2000 - 00:16:38 PST
Re: [SI-LIST] : LVDS driving PCMLsweirWed Mar 08 2000 - 20:55:23 PST
[SI-LIST] : Where can I get some design informations about CPCI?rachild.chenWed Mar 08 2000 - 19:31:14 PST
Re: [SI-LIST] : LVDS driving PCML[email protected]Wed Mar 08 2000 - 20:44:08 PST
[SI-LIST] : LVDS driving PCMLJulia NekrylovaWed Mar 08 2000 - 18:41:26 PST
[SI-LIST] : tracking/oversampling PLL architecturesOoi, Thien ErnWed Mar 08 2000 - 18:58:32 PST
Re: [SI-LIST] : Hi SI-gurus,One stupid questionBob LewandowskiWed Mar 08 2000 - 18:07:04 PST
[SI-LIST] : March 14, EMC Society Meeting Notice, "Shielding and Grounding for GHz Processors and Beyond"Hans MellbergThu Mar 09 2000 - 10:48:00 PST
Re: [SI-LIST] : Where can I get some design informations about CPCI?Shawn X. ArnoldThu Mar 09 2000 - 12:22:15 PST
Re: [SI-LIST] : why .062?Adrian ShinerThu Mar 09 2000 - 12:17:37 PST
Re: [SI-LIST] : RE: [IS-LIST] : why .062?Adrian ShinerThu Mar 09 2000 - 12:20:01 PST
Re: [SI-LIST] : Your experience with equivalent circuit modeling tools ...Dima SmolyanskyThu Mar 09 2000 - 13:34:44 PST
[SI-LIST] : RE: +AFs-SI-LIST+AF0- : Where can I get some design informations about CPCI?Keith AmundsenThu Mar 09 2000 - 13:57:31 PST
[SI-LIST] : ribbon cable modelsRehm, DennisThu Mar 09 2000 - 14:06:52 PST
Re: [SI-LIST] : Your experience with equivalent circuit modeling tools ...Ray AndersonThu Mar 09 2000 - 14:14:19 PST
Re: [SI-LIST] : ribbon cable modelsRay AndersonThu Mar 09 2000 - 14:23:45 PST
[SI-LIST] : Job opening at CiscoqzhaoThu Mar 09 2000 - 14:58:57 PST
Re: [SI-LIST] : why .062?[email protected]Thu Mar 09 2000 - 16:10:20 PST
[SI-LIST] : Sorry for HMTL/SOS for CPCIrachild.chenThu Mar 09 2000 - 17:07:33 PST
Re: [SI-LIST] : ribbon cable modelsTadashi ARAIFri Mar 10 2000 - 01:16:39 PST
[SI-LIST] : Now SI Engineer job positions is in Shenzhen Chinarachild.chenFri Mar 10 2000 - 01:36:11 PST
RE: [SI-LIST] : ribbon cable modelsClewell, Craig WFri Mar 10 2000 - 05:35:00 PST
Re: [SI-LIST] : Your experience with equivalent circuit modeling tools ...Christian SchusterFri Mar 10 2000 - 05:42:11 PST
RE: [SI-LIST] : ribbon cable modelsFasig, Jonathan L.Fri Mar 10 2000 - 05:50:24 PST
Re: [SI-LIST] :PCB Bd thkness'Ritchey LeeFri Mar 10 2000 - 08:02:47 PST
RE: [SI-LIST] : Your experience with equivalent circuit modeling tools ...Weston BealFri Mar 10 2000 - 09:01:44 PST
[SI-LIST] : Signal Integrity Positions at Lightsandamit agrawalFri Mar 10 2000 - 10:27:52 PST
RE: [SI-LIST] : Your experience with equivalent circuit modeling tools ...Ingraham, AndrewFri Mar 10 2000 - 10:32:12 PST
RE: [SI-LIST] : ribbon cable modelsKai KeskinenFri Mar 10 2000 - 10:33:37 PST
RE: [SI-LIST] : ribbon cable modelsDAmbrosia, John FFri Mar 10 2000 - 10:52:14 PST
RE: [SI-LIST] : Your experience with equivalent circuit modeling tools ...Tom DagostinoFri Mar 10 2000 - 12:02:21 PST
Re: [SI-LIST] : Your experience with equivalent circuit modeling tools ...Dima SmolyanskyFri Mar 10 2000 - 14:17:54 PST
RE: [SI-LIST] : tracking/oversampling PLL architecturesOoi, Thien ErnFri Mar 10 2000 - 17:29:09 PST
RE: [SI-LIST] : LVDS driving PCMLDegerstrom, Michael J.Fri Mar 10 2000 - 17:44:11 PST
[SI-LIST] : EPEP 2000 Call For PapersRay AndersonSun Mar 12 2000 - 11:16:32 PST
[SI-LIST] : trace width for clock routing- wider/narrower?�L�·�Sun Mar 12 2000 - 17:04:50 PST
Re: [SI-LIST] : trace width for clock routing- wider/narrower?S. WeirSun Mar 12 2000 - 17:29:08 PST
RE: [SI-LIST] : trace width for clock routing- wider/narrower?Weber ChuangSun Mar 12 2000 - 18:34:07 PST
[SI-LIST] : VTT supplyJeffSun Mar 12 2000 - 23:55:52 PST
Re: [SI-LIST] : VTT supplyS. WeirMon Mar 13 2000 - 00:21:22 PST
RE: [SI-LIST] : trace width for clock routing- wider/narrower?S. WeirMon Mar 13 2000 - 00:43:33 PST
Re: [SI-LIST] : VTT supply[email protected]Mon Mar 13 2000 - 02:14:05 PST
RE: [SI-LIST] : trace width for clock routing- wider/narrower?Greim, MichaelMon Mar 13 2000 - 05:06:42 PST
RE: [SI-LIST] : LVDS driving PCMLGreim, MichaelMon Mar 13 2000 - 05:21:27 PST
[SI-LIST] : 2 Layer Boards and Ground GridsSpencer, David HMon Mar 13 2000 - 06:45:31 PST
Re: [SI-LIST] : trace width for clock routing- wider/narrower?Ritchey LeeMon Mar 13 2000 - 08:05:36 PST
RE: [SI-LIST] : VTT supplyMuranyi, ArpadMon Mar 13 2000 - 08:19:09 PST
Re: [SI-LIST] : trace width for clock routing- wider/narrower?Vinu ArumughamMon Mar 13 2000 - 09:47:26 PST
Re: [SI-LIST] : trace width for clock routing- wider/narrower?Doug BrooksMon Mar 13 2000 - 10:28:52 PST
Re: [SI-LIST] : Software scope, VOMNorbert SeitzMon Mar 13 2000 - 10:38:40 PST
Re: [SI-LIST] : trace width for clock routing- wider/narrower?Gerald JohnsonMon Mar 13 2000 - 10:53:19 PST
RE: [SI-LIST] : VTT supplyChris ChengMon Mar 13 2000 - 11:07:32 PST
Re: [SI-LIST] : trace width for clock routing- wider/narrower?Scott McMorrowMon Mar 13 2000 - 11:27:31 PST
RE: [SI-LIST] : tracking/oversampling PLL architecturesKeith AmundsenMon Mar 13 2000 - 12:01:08 PST
RE: [SI-LIST] : tracking/oversampling PLL architecturesLyke James Civ AFRL/VSSEMon Mar 13 2000 - 12:26:41 PST
Re: [SI-LIST] : trace width for clock routing- wider/narrower?Doug BrooksMon Mar 13 2000 - 12:38:46 PST
RE: [SI-LIST] : trace width for clock routing- wider/narrower?�L�·�Mon Mar 13 2000 - 17:00:21 PST
[SI-LIST] : SSCsubasMon Mar 13 2000 - 23:09:02 PST
Re: [SI-LIST] : SSCsweirMon Mar 13 2000 - 23:55:11 PST
Re: [SI-LIST] : SSCKrishnan S RengarajanMon Mar 13 2000 - 23:55:59 PST
Re: [SI-LIST] : SSC[email protected]Tue Mar 14 2000 - 00:09:51 PST
Re: [SI-LIST] : SSCTadashi ARAITue Mar 14 2000 - 00:26:27 PST
RE: [SI-LIST] : tracking/oversampling PLL architecturesKeith AmundsenTue Mar 14 2000 - 07:35:21 PST
Re: [SI-LIST] : SSC[email protected]Tue Mar 14 2000 - 08:37:27 PST
[SI-LIST] : Board simulations, what should it include?Yehuda D. YizraeliTue Mar 14 2000 - 09:24:35 PST
RE: [SI-LIST] : SSCZhang, Michael TTue Mar 14 2000 - 09:29:57 PST
Re: [SI-LIST] : 2 Layer Boards and Ground Grids[email protected]Tue Mar 14 2000 - 09:28:21 PST
Re: [SI-LIST] : Board simulations, what should it include?James Antonellis - Sun BOS HardwareTue Mar 14 2000 - 10:24:18 PST
RE: [SI-LIST] : trace width for clock routing- wider/narrower?Grasso, Charles (Chaz)Tue Mar 14 2000 - 10:39:30 PST
[SI-LIST] : trace impedance[email protected]Tue Mar 14 2000 - 12:50:14 PST
RE: [SI-LIST] : SSCYu WangTue Mar 14 2000 - 13:16:05 PST
RE: [SI-LIST] : SSCZhang, Michael TTue Mar 14 2000 - 13:35:28 PST
Re: [SI-LIST] : SSC[email protected]Tue Mar 14 2000 - 15:14:49 PST
Re: [SI-LIST] : SSCKrishnan S RengarajanTue Mar 14 2000 - 19:56:52 PST
RE: [SI-LIST] : tracking/oversampling PLL architecturesJeffTue Mar 14 2000 - 22:24:30 PST
Re: [SI-LIST] : SSCJeffTue Mar 14 2000 - 22:49:01 PST
Re: [SI-LIST] : VTT supplyJeffTue Mar 14 2000 - 22:56:14 PST
RE: [SI-LIST] : VTT supplyJeffTue Mar 14 2000 - 23:09:49 PST
[SI-LIST] : CDM and HDM models ofJan VercammenWed Mar 15 2000 - 00:52:34 PST
Re: [SI-LIST] : CDM and HDM models ofKrishnan S RengarajanWed Mar 15 2000 - 03:19:18 PST
RE: [SI-LIST] : Your experience with equivalent circuit modeling tools ...zanella, fabrizioWed Mar 15 2000 - 10:55:43 PST
[SI-LIST] : Job Opening at Cisco in San Jose, CA - EMC Design EngineerNeven PischlWed Mar 15 2000 - 11:30:41 PST
Re: [SI-LIST] : Bad IBIS models!Kim HelliwellWed Mar 15 2000 - 14:24:37 PST
Re: [SI-LIST] : Bad IBIS models!Kim HelliwellWed Mar 15 2000 - 14:29:28 PST
Re: [SI-LIST] : Bad IBIS models!Roy LeventhalWed Mar 15 2000 - 14:35:27 PST
Re: [SI-LIST] : Bad IBIS models!Stephen NolanWed Mar 15 2000 - 14:36:07 PST
Re: [SI-LIST] : Bad IBIS models!Roy LeventhalWed Mar 15 2000 - 14:38:16 PST
Re: [SI-LIST] : Bad IBIS models!Roy LeventhalWed Mar 15 2000 - 14:43:26 PST
RE: [SI-LIST] : Bad IBIS models!Weston BealWed Mar 15 2000 - 15:08:23 PST
Re: [SI-LIST] : Bad IBIS models!Kim HelliwellWed Mar 15 2000 - 14:08:25 PST
Re: [SI-LIST] : Bad IBIS models!Kim HelliwellWed Mar 15 2000 - 14:03:03 PST
RE: [SI-LIST] : Bad IBIS models!Mayer, MikeWed Mar 15 2000 - 14:21:16 PST
Re: [SI-LIST] : Bad IBIS models!Scott McMorrowWed Mar 15 2000 - 14:09:17 PST
RE: [SI-LIST] : Bad IBIS models!Dan BostanWed Mar 15 2000 - 13:12:59 PST
Re: [SI-LIST] : Bad IBIS models!Bob PerlmanWed Mar 15 2000 - 13:33:40 PST
Re: [SI-LIST] : Bad IBIS models!Roy LeventhalWed Mar 15 2000 - 13:55:00 PST
Re: [SI-LIST] : Bad IBIS models!Scott McMorrowWed Mar 15 2000 - 14:03:22 PST
[SI-LIST] : Bad IBIS models!Kim HelliwellWed Mar 15 2000 - 12:53:59 PST
Re: [SI-LIST] : Bad IBIS models!Kim HelliwellWed Mar 15 2000 - 15:10:44 PST
RE: [SI-LIST] : Bad IBIS models!Weston BealWed Mar 15 2000 - 15:18:42 PST
Re: [SI-LIST] : Bad IBIS models!Brian YoungWed Mar 15 2000 - 15:42:47 PST
Re: [SI-LIST] : A basic questionBrian YoungFri Mar 17 2000 - 06:30:39 PST
RE: [SI-LIST] : A basic questionIngraham, AndrewFri Mar 17 2000 - 06:56:47 PST
RE: [SI-LIST] : A basic questionPeterson, James F (FL51)Fri Mar 17 2000 - 05:53:59 PST
Re: [SI-LIST] : A basic questionBrian YoungFri Mar 17 2000 - 06:19:27 PST
RE: [SI-LIST] : A basic questionZabinski, Patrick J.Fri Mar 17 2000 - 06:16:01 PST
Re: [SI-LIST] : A basic question[email protected]Fri Mar 17 2000 - 05:31:40 PST
RE: [SI-LIST] : A basic questionDaniel, Erik S.Fri Mar 17 2000 - 06:07:48 PST
RE: [SI-LIST] : A basic questionClewell, Craig WFri Mar 17 2000 - 05:39:10 PST
RE: [SI-LIST] : A basic questionDaniel, Erik S.Fri Mar 17 2000 - 05:55:48 PST
[SI-LIST] : A basic questionPeterson, James F (FL51)Fri Mar 17 2000 - 05:00:49 PST
RE: [SI-LIST] : A basic questionZabinski, Patrick J.Fri Mar 17 2000 - 05:31:50 PST
RE: [SI-LIST] : A basic questionPeterson, James F (FL51)Fri Mar 17 2000 - 05:51:24 PST
Re: [SI-LIST] : Ferrite beadsweirFri Mar 17 2000 - 05:05:45 PST
[SI-LIST] : Ferrite beadSunil KumarFri Mar 17 2000 - 00:19:40 PST
Re: [SI-LIST] : Bad IBIS models!Kim HelliwellThu Mar 16 2000 - 14:15:58 PST
Re: [SI-LIST] : Ferrite beadIstvan NOVAKFri Mar 17 2000 - 05:00:26 PST
Re: [SI-LIST] : Bad IBIS models!Tadashi ARAIThu Mar 16 2000 - 19:47:14 PST
Re: [SI-LIST] : Bad IBIS models!Richard G. MundenThu Mar 16 2000 - 21:43:15 PST
Re: [SI-LIST] : Bad IBIS models!Roy LeventhalThu Mar 16 2000 - 13:25:34 PST
Re: [SI-LIST] : Bad IBIS models!Brian YoungThu Mar 16 2000 - 13:08:51 PST
RE: [SI-LIST] : Bad IBIS models!Mayer, MikeThu Mar 16 2000 - 13:38:43 PST
RE: [SI-LIST] : Bad IBIS models!Mayer, MikeThu Mar 16 2000 - 12:43:46 PST
Re: [SI-LIST] : Bad IBIS models!Brian YoungThu Mar 16 2000 - 12:08:39 PST
RE: [SI-LIST] : SI Software for EMCKnighten, Jim LThu Mar 16 2000 - 10:50:29 PST
Re: [SI-LIST] : SI Software for EMC[email protected]Thu Mar 16 2000 - 09:51:18 PST
Re: [SI-LIST] : Bad IBIS models!Kim HelliwellThu Mar 16 2000 - 09:50:02 PST
RE: [SI-LIST] : SI Software for EMCWeston BealThu Mar 16 2000 - 09:41:06 PST
RE: [SI-LIST] : printed resistorsGaines, WilliamThu Mar 16 2000 - 09:45:07 PST
Re: [SI-LIST] : printed resistorsIstvan Novak - Board Design TechnologyThu Mar 16 2000 - 07:32:18 PST
[SI-LIST] : Position availableDennis TomlinsonThu Mar 16 2000 - 09:00:31 PST
Re: [SI-LIST] : Bad IBIS models!Brian YoungThu Mar 16 2000 - 07:33:37 PST
[SI-LIST] : SI Software for EMC[email protected]Thu Mar 16 2000 - 06:29:34 PST
Re: [SI-LIST] : Bad IBIS models!Roy LeventhalThu Mar 16 2000 - 07:05:20 PST
Re: [SI-LIST] : Bad IBIS models!Mike LaBonteThu Mar 16 2000 - 05:29:21 PST
Re: [SI-LIST] : Bad IBIS models!Mike LaBonteThu Mar 16 2000 - 05:54:32 PST
Re: [SI-LIST] : Bad IBIS models!Laurence MichaelsThu Mar 16 2000 - 06:47:33 PST
Re: [SI-LIST] : Bad IBIS models!Mike LaBonteThu Mar 16 2000 - 05:43:01 PST
Re: [SI-LIST] : Bad IBIS models!Tadashi ARAIWed Mar 15 2000 - 18:00:48 PST
[SI-LIST] : Program: Workshop on SIGNAL PROPAGATION ON INTERCONNECTSTreytnar DieterThu Mar 16 2000 - 01:34:04 PST
Re: [SI-LIST] : SSC[email protected]Wed Mar 15 2000 - 19:20:15 PST
RE: [SI-LIST] : Bad IBIS models!John PhillipsThu Mar 16 2000 - 01:32:38 PST
RE: [SI-LIST] : A basic question[email protected]Fri Mar 17 2000 - 08:06:20 PST
RE: [SI-LIST] : A basic question[email protected]Fri Mar 17 2000 - 08:15:07 PST
[SI-LIST] : Fast edges with limited plane capacitancemjsFri Mar 17 2000 - 08:29:33 PST
RE: [SI-LIST] : A basic questionJian ZhengFri Mar 17 2000 - 08:39:02 PST
Re: [SI-LIST] : A basic question[email protected]Fri Mar 17 2000 - 09:27:42 PST
FW: [SI-LIST] : A basic questionPeterson, James F (FL51)Fri Mar 17 2000 - 09:39:12 PST
RE: [SI-LIST] : A basic questionLarry SmithFri Mar 17 2000 - 09:42:02 PST
RE: [SI-LIST] : Bad IBIS models!Muranyi, ArpadFri Mar 17 2000 - 10:07:57 PST
RE: [SI-LIST] : Bad IBIS models!Muranyi, ArpadFri Mar 17 2000 - 10:15:00 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceLarry SmithFri Mar 17 2000 - 10:17:04 PST
Re: [SI-LIST] : Fast edges with limited plane capacitance[email protected]Fri Mar 17 2000 - 10:25:52 PST
RE: [SI-LIST] : Bad IBIS models!Muranyi, ArpadFri Mar 17 2000 - 10:32:08 PST
RE: [SI-LIST] : Bad IBIS models!Muranyi, ArpadFri Mar 17 2000 - 10:41:26 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceVinu ArumughamFri Mar 17 2000 - 10:50:36 PST
Re: [SI-LIST] : Fast edges with limited plane capacitance[email protected]Fri Mar 17 2000 - 10:51:38 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceDoug McKeanFri Mar 17 2000 - 11:02:36 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceVinu ArumughamFri Mar 17 2000 - 11:07:12 PST
RE: [SI-LIST] : Bad IBIS models!Muranyi, ArpadFri Mar 17 2000 - 11:07:45 PST
RE: [SI-LIST] : Fast edges with limited plane capacitanceMayer, MikeFri Mar 17 2000 - 11:11:55 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceRon MillerFri Mar 17 2000 - 11:13:44 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceRon MillerFri Mar 17 2000 - 11:18:42 PST
Re: [SI-LIST] : Fast edges with limited plane capacitance[email protected]Fri Mar 17 2000 - 11:21:51 PST
Re: [SI-LIST] : Bad IBIS models!Kim HelliwellFri Mar 17 2000 - 11:33:00 PST
RE: [SI-LIST] : Bad IBIS models!Tom DagostinoFri Mar 17 2000 - 11:51:56 PST
Re: [SI-LIST] : A basic questionamit agrawalFri Mar 17 2000 - 11:53:25 PST
RE: [SI-LIST] : Bad IBIS models!Bob PerlmanFri Mar 17 2000 - 11:48:12 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceFred BalistreriFri Mar 17 2000 - 11:37:21 PST
Re: [SI-LIST] : Fast edges with limited plane capacitance[email protected]Fri Mar 17 2000 - 12:17:08 PST
Re: [SI-LIST] : Bad IBIS models! - Business thoughtsAdrian ShinerFri Mar 17 2000 - 11:45:58 PST
Re: [SI-LIST] : A basic questionFred BalistreriFri Mar 17 2000 - 12:30:57 PST
RE: [SI-LIST] : Bad IBIS models!Mayer, MikeFri Mar 17 2000 - 12:46:38 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceDoug McKeanFri Mar 17 2000 - 12:47:57 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceLarry SmithFri Mar 17 2000 - 12:56:31 PST
[SI-LIST] : Fun With Stackups againLawrence ButcherFri Mar 17 2000 - 12:59:06 PST
RE: [SI-LIST] : Bad IBIS models!Muranyi, ArpadFri Mar 17 2000 - 13:03:39 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceLarry SmithFri Mar 17 2000 - 13:05:02 PST
RE: [SI-LIST] : GOOD IBIS models!Haller, RobertFri Mar 17 2000 - 13:12:11 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceLarry SmithFri Mar 17 2000 - 13:18:37 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceLarry SmithFri Mar 17 2000 - 13:23:13 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceDennis YarakFri Mar 17 2000 - 13:31:22 PST
Re: [SI-LIST] : Fast edges with limited plane capacitancemjsFri Mar 17 2000 - 13:54:24 PST
RE: [SI-LIST] : Fast edges with limited plane capacitanceChris ChengFri Mar 17 2000 - 15:07:35 PST
Re: [SI-LIST] : Fast edges with limited plane capacitancePaul ThompsonFri Mar 17 2000 - 15:11:23 PST
Re : [SI-LIST] : Bad IBIS models!Chris ChengFri Mar 17 2000 - 15:21:23 PST
Re: [SI-LIST] : SI Software for EMCDoug McKeanFri Mar 17 2000 - 15:41:05 PST
Re: [SI-LIST] : Bad IBIS models! - Business thoughtsMyra TorresFri Mar 17 2000 - 16:12:54 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceDoug McKeanFri Mar 17 2000 - 16:13:41 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceVinu ArumughamFri Mar 17 2000 - 17:53:21 PST
Re: [SI-LIST] : Fun With Stackups again[email protected]Sat Mar 18 2000 - 09:43:51 PST
[SI-LIST] : Lossy line modelAlex MarchSat Mar 18 2000 - 11:04:59 PST
[SI-LIST] : Spice to IBIS ConverterBaskerSat Mar 18 2000 - 11:08:09 PST
Re: [SI-LIST] : Fast edges with limited plane capacitance[email protected]Sat Mar 18 2000 - 12:25:58 PST
[SI-LIST] : Catching the CornersAbe RiaziSat Mar 18 2000 - 12:28:07 PST
[SI-LIST] : Catching the Corners: chain of synchronizing registersShayle HirschmanSat Mar 18 2000 - 07:31:03 PST
RE: [SI-LIST] : Bad IBIS models!Abe RiaziSat Mar 18 2000 - 12:57:24 PST
Re: [SI-LIST] : Catching the Corners: chain of synchronizing registersS. WeirSun Mar 19 2000 - 02:41:15 PST
Re: [SI-LIST] : Fast edges with limited plane capacitanceS. WeirSun Mar 19 2000 - 03:00:55 PST
RE: [SI-LIST] : Catching the CornersAbe RiaziSun Mar 19 2000 - 10:43:25 PST
[SI-LIST] : Unusual System GlitchsDouglas C. SmithSun Mar 19 2000 - 20:27:17 PST
[SI-LIST] : Daisy-ChainTham Kok TongMon Mar 20 2000 - 00:26:41 PST
Re: [SI-LIST] : Daisy-ChainS. WeirMon Mar 20 2000 - 00:47:45 PST
RE: [SI-LIST] : Lossy line modelClewell, Craig WMon Mar 20 2000 - 05:46:26 PST
Re: [SI-LIST] : Spice to IBIS ConverterFethi BellamineMon Mar 20 2000 - 06:27:05 PST
[SI-LIST] : Toward better model data...[email protected]Mon Mar 20 2000 - 06:53:46 PST
Re: [SI-LIST] : Daisy-ChainYu WangMon Mar 20 2000 - 07:00:57 PST
Re: [SI-LIST] : CDM and HDM models ofD. C. SessionsMon Mar 20 2000 - 07:00:42 PST
Re: [SI-LIST] : Bad IBIS models!D. C. SessionsMon Mar 20 2000 - 07:15:11 PST
Re: [SI-LIST] : Bad IBIS models!D. C. SessionsMon Mar 20 2000 - 07:23:02 PST
RE: [SI-LIST] : Bad IBIS models! GREAT POINTS DCLaFlamme, PeterMon Mar 20 2000 - 07:37:54 PST
Re: [SI-LIST] : Catching the Corners: chain of synchronizingregistersD. C. SessionsMon Mar 20 2000 - 08:16:24 PST
RE: [SI-LIST] : Spice to IBIS ConverterPeters, StephenMon Mar 20 2000 - 08:32:15 PST
RE: [SI-LIST] : Fast edges with limited plane capacitance[email protected]Mon Mar 20 2000 - 08:49:40 PST
Re: [SI-LIST] : Spice to IBIS ConverterFred BalistreriMon Mar 20 2000 - 08:39:28 PST
[SI-LIST] : SI Society ChapterFarrokh MottahedinMon Mar 20 2000 - 08:54:46 PST
[SI-LIST] : Signal Integrity Positions at AMD -- Austin, TXJonathan DowlingMon Mar 20 2000 - 09:09:19 PST
Re: [SI-LIST] : SI Society ChapterIstvan Novak - Board Design TechnologyMon Mar 20 2000 - 09:32:19 PST
Re: [SI-LIST] : Daisy-ChainJeff ReeveMon Mar 20 2000 - 09:28:09 PST
Re: [SI-LIST] : SI Society ChapterNeven PischlMon Mar 20 2000 - 09:42:12 PST
Re: [SI-LIST] : SI Society Chapter[email protected]Mon Mar 20 2000 - 09:59:20 PST
Re: [SI-LIST] : SI Society ChapterChris PadillaMon Mar 20 2000 - 10:10:19 PST
RE: [SI-LIST] : SI Society ChapterDenomme, Paul S.Mon Mar 20 2000 - 10:46:11 PST
RE: [SI-LIST] : SI Society ChapterGreim, MichaelMon Mar 20 2000 - 11:01:02 PST
RE: [SI-LIST] : SI Society ChapterClewell, Craig WMon Mar 20 2000 - 11:15:16 PST
Re: [SI-LIST] : SI Society ChapterEric B. LewisMon Mar 20 2000 - 11:17:02 PST
Re: [SI-LIST] : Daisy-ChainJim FreemanMon Mar 20 2000 - 11:22:21 PST
Re: [SI-LIST] : SI Society ChapterMuzahid HudaMon Mar 20 2000 - 11:25:26 PST
RE: [SI-LIST] : SI Society Chapter[email protected]Mon Mar 20 2000 - 11:42:17 PST
RE: [SI-LIST] : SI Society Chapterzanella, fabrizioMon Mar 20 2000 - 11:48:31 PST
RE: [SI-LIST] : SI Society ChapterPatterson, KenMon Mar 20 2000 - 11:51:49 PST
RE: [SI-LIST] : SI Society ChapterRay AndersonMon Mar 20 2000 - 12:13:05 PST
RE: [SI-LIST] : SI Society ChapterPeters, StephenMon Mar 20 2000 - 12:24:02 PST
Re: [SI-LIST] : Daisy-ChainS. WeirMon Mar 20 2000 - 12:44:52 PST
Re: [SI-LIST] : Catching the Corners: chain of synchronizingregistersS. WeirMon Mar 20 2000 - 12:51:16 PST
Re: [SI-LIST] : SI Society Chapter[email protected]Mon Mar 20 2000 - 12:47:32 PST
RE: [SI-LIST] : SI Society Chapter[email protected]Mon Mar 20 2000 - 12:49:04 PST
RE: [SI-LIST] : SI Society ChapterDenomme, Paul S.Mon Mar 20 2000 - 12:50:38 PST
[SI-LIST] : How to create IEEE SI Society Chapters ?Ray AndersonMon Mar 20 2000 - 13:11:54 PST
RE: [SI-LIST] : SI Society ChapterS. WeirMon Mar 20 2000 - 13:35:48 PST
Re: [SI-LIST] : SI Society ChapterKim HelliwellMon Mar 20 2000 - 14:15:58 PST
Re: [SI-LIST] : SI Society ChapterLum Wee MeiMon Mar 20 2000 - 15:25:40 PST
Re: [SI-LIST] : SI Society ChapterRoy LeventhalMon Mar 20 2000 - 15:35:35 PST
Re: [SI-LIST] : SI Society ChapterShawn X. ArnoldMon Mar 20 2000 - 18:17:49 PST
RE: [SI-LIST] : SI Society ChapterWeber ChuangMon Mar 20 2000 - 18:28:13 PST
RE: [SI-LIST] : SI Society Chapter[email protected]Mon Mar 20 2000 - 21:47:58 PST
RE: [SI-LIST] : SI Society ChapterChang, Isaac Yew BengMon Mar 20 2000 - 22:03:26 PST
[SI-LIST] : how to combine multi components together with Orcad layoutYu WangTue Mar 21 2000 - 07:42:43 PST
RE: [SI-LIST] : how to combine multi components together with Orc ad layoutGaines, WilliamTue Mar 21 2000 - 09:01:50 PST
Re: [SI-LIST] : how to combine multi components together with Orcad layout[email protected]Tue Mar 21 2000 - 09:27:25 PST
RE: [SI-LIST] : how to combine multi components together with Orc ad layoutIulian UngureanuTue Mar 21 2000 - 09:56:45 PST
Re: [SI-LIST] : How to create IEEE SI Society Chapters ?Hans MellbergTue Mar 21 2000 - 11:05:28 PST
[SI-LIST] : In search of other lists.Norbert SeitzTue Mar 21 2000 - 11:44:29 PST
[SI-LIST] : meaning and value of C_compWeston BealTue Mar 21 2000 - 12:19:57 PST
Re: [SI-LIST] : meaning and value of C_compD. C. SessionsTue Mar 21 2000 - 12:53:40 PST
Re: [SI-LIST] : how to combine multi components together with Orcad layoutGiovanni DiBenedettoTue Mar 21 2000 - 13:24:53 PST
Re: [SI-LIST] : Fast edges with limited plane capacitance[email protected]Tue Mar 21 2000 - 13:53:16 PST
Re: [SI-LIST] : meaning and value of C_comp[email protected]Tue Mar 21 2000 - 14:13:11 PST
[SI-LIST] : SI FAQ ProposalRay AndersonTue Mar 21 2000 - 16:17:01 PST
Re: [SI-LIST] : SI FAQ Proposal[email protected]Tue Mar 21 2000 - 17:00:19 PST
Re: [SI-LIST] : SI FAQ ProposalShannon RosemanTue Mar 21 2000 - 21:05:26 PST
Re: [SI-LIST] : SI Society ChapterJeffTue Mar 21 2000 - 20:25:28 PST
Re: [SI-LIST] : SI FAQ ProposalIstvan NOVAKWed Mar 22 2000 - 05:19:51 PST
Re: [SI-LIST] : meaning and value of C_compMike LaBonteWed Mar 22 2000 - 06:09:46 PST
Re: [SI-LIST] : SI FAQ ProposalAndrew PhillipsWed Mar 22 2000 - 06:23:15 PST
[SI-LIST] : HSPICE Start Up conditionsKai KeskinenWed Mar 22 2000 - 07:45:53 PST
Re: [SI-LIST] : meaning and value of C_compD. C. SessionsWed Mar 22 2000 - 09:57:41 PST
Re: [SI-LIST] : SI FAQ ProposalRay AndersonWed Mar 22 2000 - 10:36:06 PST
Re: [SI-LIST] : In search of other lists.Doug McKeanWed Mar 22 2000 - 11:19:14 PST
RE: [SI-LIST] : HSPICE Start Up conditionsTom DagostinoWed Mar 22 2000 - 10:50:21 PST
RE: [SI-LIST] : HSPICE Start Up conditionsKai KeskinenWed Mar 22 2000 - 11:15:27 PST
[SI-LIST] : EUROPEAN IBIS SUMMIT MEETING AGENDABob RossWed Mar 22 2000 - 11:51:00 PST
Re: [SI-LIST] : HSPICE Start Up conditionsUmesh PainaikWed Mar 22 2000 - 12:16:32 PST
RE: [SI-LIST] : HSPICE Start Up conditionsIngraham, AndrewWed Mar 22 2000 - 12:42:52 PST
Re: [SI-LIST] : Daisy-ChainsweirWed Mar 22 2000 - 12:46:00 PST
Re: [SI-LIST] : SI FAQ ProposalD. C. SessionsWed Mar 22 2000 - 16:36:36 PST
Re: [SI-LIST] : HSPICE Start Up conditionsMike JenkinsWed Mar 22 2000 - 17:05:24 PST
RE: [SI-LIST] : SI FAQ ProposalMuranyi, ArpadWed Mar 22 2000 - 17:11:57 PST
[SI-LIST] : IEEE SI Chapter Action UpdateRay AndersonSat Mar 18 2000 - 12:50:14 PST
Re: [SI-LIST] : how to combine multi components together with Orcad layoutJon KeebleWed Mar 22 2000 - 20:22:49 PST
[SI-LIST] : Lab procedures for TDRKevin Dale KirmseWed Mar 22 2000 - 21:13:23 PST
AW: [SI-LIST] : Lab procedures for TDRUlrich MusslerThu Mar 23 2000 - 01:35:33 PST
RE: [SI-LIST] : HSPICE Start Up conditionsKai KeskinenThu Mar 23 2000 - 04:20:03 PST
RE: [SI-LIST] : Lab procedures for TDRFasig, Jonathan L.Thu Mar 23 2000 - 05:39:05 PST
RE: [SI-LIST] : SI FAQ ProposalMayer, MikeThu Mar 23 2000 - 05:55:21 PST
RE: [SI-LIST] : SI FAQ ProposalLiang, Hongbo (Subsidiary)Thu Mar 23 2000 - 06:26:05 PST
[SI-LIST] : Number of GND/Power pins in a connector ?Stuart AdamsThu Mar 23 2000 - 07:43:19 PST
RE: [SI-LIST] : Number of GND/Power pins in a connector ?Fokken, Gregg J.Thu Mar 23 2000 - 08:15:37 PST
RE: [SI-LIST] : Number of GND/Power pins in a connector ?[email protected]Thu Mar 23 2000 - 09:11:26 PST
Re: [SI-LIST] : SI FAQ ProposalRitchey LeeThu Mar 23 2000 - 09:25:49 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Scott McMorrowThu Mar 23 2000 - 10:55:34 PST
Re: [SI-LIST] : SI FAQ ProposalD. C. SessionsThu Mar 23 2000 - 11:01:57 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Jim FreemanThu Mar 23 2000 - 13:15:07 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Stuart AdamsThu Mar 23 2000 - 14:08:38 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Lum Wee MeiThu Mar 23 2000 - 15:18:50 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Jim FreemanThu Mar 23 2000 - 15:29:00 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Vinu ArumughamThu Mar 23 2000 - 16:27:07 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Jim FreemanThu Mar 23 2000 - 16:50:07 PST
[SI-LIST] : EMC Issue - servo amplifierLum Wee MeiThu Mar 23 2000 - 19:08:27 PST
[SI-LIST] : �ظ�: [SI-LIST] : SI Society Chapterachild.chenThu Mar 23 2000 - 23:39:57 PST
Re: [SI-LIST] : SI FAQ ProposalAndrew PhillipsFri Mar 24 2000 - 06:30:52 PST
Re: [SI-LIST] : how to combine multi components together with Orcad layoutYu WangFri Mar 24 2000 - 07:04:47 PST
RE: [SI-LIST] : EMC Issue - servo amplifierGaines, WilliamFri Mar 24 2000 - 07:40:02 PST
RE: [SI-LIST] : Number of GND/Power pins in a connector ?Gaines, WilliamFri Mar 24 2000 - 08:28:44 PST
Re: [SI-LIST] : Lab procedures for TDRBob LewandowskiFri Mar 24 2000 - 09:32:34 PST
RE: [SI-LIST] : EUROPEAN IBIS SUMMIT MEETING AGENDAChris HansenFri Mar 24 2000 - 09:36:54 PST
Re: [SI-LIST] : Fun With Stackups againDan IrishFri Mar 24 2000 - 09:41:54 PST
RE: [SI-LIST] : Number of GND/Power pins in a connector ?Nerheim, MaxFri Mar 24 2000 - 10:20:55 PST
RE: [SI-LIST] : Number of GND/Power pins in a connector ?Kai KeskinenFri Mar 24 2000 - 10:49:08 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Adrian ShinerFri Mar 24 2000 - 11:31:45 PST
RE: [SI-LIST] : Number of GND/Power pins in a connector ?Kai KeskinenFri Mar 24 2000 - 11:51:38 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Doug McKeanFri Mar 24 2000 - 12:44:32 PST
[SI-LIST] : Parallel Plate Capacitance for BypassHansen, ChrisFri Mar 24 2000 - 13:25:51 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassRon MillerFri Mar 24 2000 - 14:30:22 PST
RE: [SI-LIST] : Parallel Plate Capacitance for BypassKnighten, Jim LFri Mar 24 2000 - 14:44:40 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassRay AndersonFri Mar 24 2000 - 14:46:54 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassChris PadillaFri Mar 24 2000 - 14:54:08 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassRay AndersonFri Mar 24 2000 - 15:13:56 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassChris PadillaFri Mar 24 2000 - 15:25:39 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassBob LewandowskiFri Mar 24 2000 - 15:32:19 PST
Re: [SI-LIST] : EMC Issue - servo amplifierDoug McKeanFri Mar 24 2000 - 16:38:30 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?S. WeirFri Mar 24 2000 - 18:35:40 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassS. WeirFri Mar 24 2000 - 18:41:09 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassS. WeirFri Mar 24 2000 - 18:48:55 PST
[SI-LIST] : Any buffer suggestions?Robert StuartSat Mar 25 2000 - 00:12:27 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Adrian ShinerSat Mar 25 2000 - 04:27:13 PST
Re: [SI-LIST] : Any buffer suggestions?S. WeirSat Mar 25 2000 - 15:45:55 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?S. WeirSat Mar 25 2000 - 15:52:18 PST
Re: [SI-LIST] : Any buffer suggestions?Yu WangSat Mar 25 2000 - 20:08:21 PST
[SI-LIST] : SPICE models for LVDS and LVPECLAlex MarchSun Mar 26 2000 - 03:43:50 PST
RE: [SI-LIST] : SPICE models for LVDS and LVPECLP.R.DewasthaleeSun Mar 26 2000 - 05:39:03 PST
Re: [SI-LIST] : SI FAQ ProposalIstvan NOVAKSun Mar 26 2000 - 07:19:11 PST
[SI-LIST] : Analog ground connection on PCBoardsYehuda D. YizraeliSun Mar 26 2000 - 07:40:05 PST
Re: [SI-LIST] : Analog ground connection on PCBoardsAdrian ShinerSun Mar 26 2000 - 11:45:47 PST
RE: [SI-LIST] : Rambus patent posturing - what gives?X2Y ATTENUATORS, LLC.Mon Mar 27 2000 - 02:58:38 PST
RE: [SI-LIST] : Rambus patent posturing - what gives?Tom DagostinoMon Mar 27 2000 - 03:17:38 PST
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass[email protected]Mon Mar 27 2000 - 05:57:04 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Rick BrooksMon Mar 27 2000 - 07:44:00 PST
RE: [SI-LIST] : Number of GND/Power pins in a connector ?Nerheim, MaxMon Mar 27 2000 - 07:47:57 PST
Re: [SI-LIST] : Analog ground connection on PCBoardsDave GravesMon Mar 27 2000 - 10:22:26 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassRon MillerMon Mar 27 2000 - 10:39:10 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Jim LengMon Mar 27 2000 - 10:41:31 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassGerald JohnsonMon Mar 27 2000 - 11:01:33 PST
Re: [SI-LIST] : Rambus patent posturing - what gives?Adrian ShinerMon Mar 27 2000 - 11:13:36 PST
RE: [SI-LIST] : Parallel Plate Capacitance for BypassGreim, MichaelMon Mar 27 2000 - 11:23:28 PST
Re: [SI-LIST] : Number of GND/Power pins in a connector ?Adrian ShinerMon Mar 27 2000 - 11:25:54 PST
RE: [SI-LIST] : Parallel Plate Capacitance for BypassS. WeirMon Mar 27 2000 - 12:01:18 PST
RE: [SI-LIST] : Parallel Plate Capacitance for BypassGreim, MichaelMon Mar 27 2000 - 12:13:22 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassLarry SmithMon Mar 27 2000 - 17:05:14 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassRon MillerMon Mar 27 2000 - 19:32:34 PST
RE: [SI-LIST] : Number of GND/Power pins in a connector ?Bob DavisTue Mar 28 2000 - 00:06:04 PST
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass[email protected]Tue Mar 28 2000 - 07:36:15 PST
[SI-LIST] : Spice Consultants?Tony SweeneyTue Mar 28 2000 - 10:52:43 PST
[SI-LIST] : Signal Integrity Eng. Job Openings at Cisco, RTP, NCStephen HillaTue Mar 28 2000 - 10:55:09 PST
RE: [SI-LIST] : Parallel Plate Capacitance for BypassGrasso, Charles (Chaz)Tue Mar 28 2000 - 15:11:55 PST
RE: [SI-LIST] : Parallel Plate Capacitance for BypassDoug BrooksWed Mar 29 2000 - 10:12:29 PST
RE: [SI-LIST] : SPICE models for LVDS and LVPECLDegerstrom, Michael J.Wed Mar 29 2000 - 11:50:06 PST
[SI-LIST] : SI Position available, Intel, Chandler - AZNerheim, MaxWed Mar 29 2000 - 12:10:10 PST
Re: [SI-LIST] : Parallel Plate Capacitance for BypassJerry JohnsonWed Mar 29 2000 - 17:34:38 PST
[SI-LIST] : Differential LVPECL terminationramesh srinivasanThu Mar 30 2000 - 01:59:21 PST
[SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes[email protected]Thu Mar 30 2000 - 05:06:00 PST
Re: [SI-LIST] : Differential LVPECL terminationJim FreemanThu Mar 30 2000 - 13:16:13 PST
RE: [SI-LIST] : Production test of 10/100 ethernet conn ??Farrokh MottahedinThu Mar 30 2000 - 13:58:04 PST
RE: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Pl anesKnighten, Jim LThu Mar 30 2000 - 13:59:16 PST
[SI-LIST] : 0805 quad pack xtalk?[email protected]Thu Mar 30 2000 - 14:05:24 PST
[SI-LIST] : Coax connection to a CPW guideGuido HunzikerThu Mar 30 2000 - 14:08:14 PST
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power PlanesJohn HowardThu Mar 30 2000 - 06:39:57 PST
[SI-LIST] : Return path for stripline, two ground planes or one power and one ground?�L�·�Thu Mar 30 2000 - 16:59:38 PST
[SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypassrachild.chenThu Mar 30 2000 - 19:43:45 PST
[SI-LIST] : Signal Integrity Positionmaher musaThu Mar 30 2000 - 20:33:45 PST
[SI-LIST] : RE: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypass[email protected]Fri Mar 31 2000 - 01:04:34 PST
RE: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground?Dan SwansonFri Mar 31 2000 - 04:38:43 PST
Re: [SI-LIST] : Coax connection to a CPW guideWalt KreigerFri Mar 31 2000 - 04:45:09 PST
Re: [SI-LIST] : Signal Integrity PositionRoy LeventhalFri Mar 31 2000 - 05:33:34 PST
Re: [SI-LIST] : Signal Integrity Positionmaher musaFri Mar 31 2000 - 05:54:10 PST
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Harris, GeorgeFri Mar 31 2000 - 07:08:08 PST
Re: [SI-LIST] : Coax connection to a CPW guideHans MellbergFri Mar 31 2000 - 07:41:44 PST
Re: [SI-LIST] : Signal Integrity PositionKim HelliwellFri Mar 31 2000 - 07:54:30 PST
[SI-LIST] : RE: [SI-LIST] : RE: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for BypassDave HooverFri Mar 31 2000 - 08:10:02 PST
RE: [SI-LIST] : Signal Integrity PositionJones, Matthew SFri Mar 31 2000 - 08:15:22 PST
[SI-LIST] : Re: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for BypassChris PadillaFri Mar 31 2000 - 08:11:56 PST
Re: [SI-LIST] : Re: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for BypassJoel JorgensonFri Mar 31 2000 - 08:32:34 PST
RE: [SI-LIST] : Signal Integrity Position[email protected]Fri Mar 31 2000 - 08:37:36 PST
[SI-LIST] : Re: Signal Integrity PositionLaurence MichaelsFri Mar 31 2000 - 11:14:45 PST
[SI-LIST] : Re: [SI-LIST]: Parallel Plate Capacitance for Bypass (air breakdown)Charles R. PattonFri Mar 31 2000 - 15:23:56 PST
RE: [SI-LIST] : Coax connection to a CPW guideRay WaughFri Mar 31 2000 - 15:29:53 PST
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes[email protected]Fri Mar 31 2000 - 16:19:29 PST
Re: [SI-LIST] : Coax connection to a CPW guide[email protected]Fri Mar 31 2000 - 16:22:07 PST
Re: [SI-LIST] : Coax connection to a CPW guideMark RandolFri Mar 31 2000 - 16:24:42 PST
[SI-LIST] : via capacitanceSunil KumarThu Mar 30 2000 - 21:34:00 PST
Fw: [SI-LIST] : via capacitanceJon KeebleFri Mar 31 2000 - 18:40:23 PST
RE: [SI-LIST] : via capacitanceDunbar, TonySun Apr 02 2000 - 09:32:03 PDT
Re: Fw: [SI-LIST] : via capacitanceRay AndersonTue Mar 28 2000 - 00:17:53 PST
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Ingraham, AndrewSun Apr 02 2000 - 17:06:00 PDT
[SI-LIST] : HSPICE Control card for simulations with inductorsYehuda D. YizraeliSun Apr 02 2000 - 22:21:12 PDT
RE: [SI-LIST] : via capacitanceDan SwansonMon Apr 03 2000 - 04:57:18 PDT
RE: [SI-LIST] : Signal Integrity PositionPeterson, James F (FL51)Mon Apr 03 2000 - 05:42:51 PDT
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Larry SmithMon Apr 03 2000 - 10:00:04 PDT
[SI-LIST] : PLL clock buffer chips and the feedback loopAndy PetersMon Apr 03 2000 - 11:06:06 PDT
RE: [SI-LIST] : PLL clock buffer chips and the feedback loopPatterson, KenMon Apr 03 2000 - 11:35:01 PDT
Re: [SI-LIST] : PLL clock buffer chips and the feedback loopArrigo BenedettiMon Apr 03 2000 - 11:47:07 PDT
RE: [SI-LIST] : PLL clock buffer chips and the feedback loopChung, SinhMon Apr 03 2000 - 12:05:27 PDT
RE: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground?Mark NassMon Apr 03 2000 - 12:05:32 PDT
RE: [SI-LIST] : PLL clock buffer chips and the feedback loopChung, SinhMon Apr 03 2000 - 12:19:37 PDT
Re: [SI-LIST] : Return path for stripline, two ground planesor one power and one ground?Scott McMorrowMon Apr 03 2000 - 14:01:37 PDT
RE: [SI-LIST] : SI FAQ ProposalGrasso, Charles (Chaz)Tue Apr 04 2000 - 10:05:36 PDT
Re: [SI-LIST] : EUROPEAN IBIS SUMMIT MEETING AGENDABob RossTue Apr 04 2000 - 10:53:51 PDT
[SI-LIST] : Power Distribution DesignHansen, ChrisTue Apr 04 2000 - 10:57:20 PDT
Re: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground?Vinu ArumughamTue Apr 04 2000 - 11:57:25 PDT
Re: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground?Vinu ArumughamTue Apr 04 2000 - 12:10:55 PDT
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Chris ChengTue Apr 04 2000 - 12:25:54 PDT
Re: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Vinu ArumughamTue Apr 04 2000 - 12:45:51 PDT
[SI-LIST] : Field solverKim HelliwellTue Apr 04 2000 - 15:04:58 PDT
Re: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Larry SmithTue Apr 04 2000 - 15:09:03 PDT
Re: [SI-LIST] : Field solverNorbert SeitzTue Apr 04 2000 - 15:46:03 PDT
Re: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground?Vinu ArumughamTue Apr 04 2000 - 17:10:38 PDT
[SI-LIST] : PWR/GND grid effect on EMIIlya ZaverukhaTue Apr 04 2000 - 19:00:39 PDT
Re: [SI-LIST] : PWR/GND grid effect on EMI in 2-layer boardLawrence ButcherTue Apr 04 2000 - 20:04:13 PDT
RE: [SI-LIST] : PWR/GND grid effect on EMIBrent DeWittTue Apr 04 2000 - 20:24:00 PDT
Re: [SI-LIST] : PWR/GND grid effect on EMIsweirTue Apr 04 2000 - 20:33:02 PDT
RE: [SI-LIST] : PWR/GND grid effect on EMIBrent DeWittTue Apr 04 2000 - 20:43:21 PDT
RE: [SI-LIST] : Field solverDan SwansonWed Apr 05 2000 - 04:52:27 PDT
Re: [SI-LIST] : PWR/GND grid effect on EMI[email protected]Wed Apr 05 2000 - 08:39:45 PDT
Re: [SI-LIST] : Field solverMike VenthamWed Apr 05 2000 - 09:01:40 PDT
[SI-LIST] : Reflections on clock lineTham Kok TongWed Apr 05 2000 - 11:15:04 PDT
[SI-LIST] : re: [SI-LiST]: PLL clock buffer chips and the feedback loopAndy PetersWed Apr 05 2000 - 11:48:25 PDT
RE: [SI-LIST] : re: [SI-LiST]: PLL clock buffer chips and the fee dback loopJohn DrautWed Apr 05 2000 - 12:15:12 PDT
RE: [SI-LIST] : Reflections on clock lineHarris, GeorgeWed Apr 05 2000 - 13:06:33 PDT
Re: [SI-LIST] : Field solverArani SinhaWed Apr 05 2000 - 13:36:05 PDT
[SI-LIST] : [SI-LIST] SI toolsJeffrey J. CookWed Apr 05 2000 - 13:42:17 PDT
[SI-LIST] : Reflections on clock lineBob PerlmanWed Apr 05 2000 - 13:42:44 PDT
RE: [SI-LIST] : [SI-LIST] SI toolsDunbar, TonyWed Apr 05 2000 - 13:57:37 PDT
Re: [SI-LIST] : [SI-LIST] SI toolsLawrence MirabalWed Apr 05 2000 - 14:17:01 PDT
Re: [SI-LIST] : [SI-LIST] SI toolsScott McMorrowWed Apr 05 2000 - 14:23:35 PDT
[SI-LIST] : Summer intern positionMatt KaufmannWed Apr 05 2000 - 14:36:24 PDT
RE: [SI-LIST] : [SI-LIST] SI toolsChris ChengWed Apr 05 2000 - 15:13:53 PDT
RE: [SI-LIST] : Field solverChris ChengWed Apr 05 2000 - 15:32:04 PDT
RE: [SI-LIST] : [SI-LIST] SI toolsDoug BrooksWed Apr 05 2000 - 15:08:06 PDT
Re: [SI-LIST] : re: [SI-LiST]: PLL clock buffer chips and the feedback loopYu WangWed Apr 05 2000 - 21:09:46 PDT
Re: [SI-LIST] : Reflections on clock lineTadashi ARAIThu Apr 06 2000 - 04:37:39 PDT
RE: [SI-LIST] : PLL clock buffer chips and the feedback loopIngraham, AndrewThu Apr 06 2000 - 05:08:54 PDT
Re: [SI-LIST] : SI FAQ ProposalAndrew PhillipsThu Apr 06 2000 - 06:26:06 PDT
[SI-LIST] : Decoupling strategy on 622MHz devicesSteeve GaudreaultThu Apr 06 2000 - 10:19:21 PDT
[SI-LIST] : Low Inductance[email protected]Thu Apr 06 2000 - 10:38:10 PDT
RE: [SI-LIST] : Decoupling strategy on 622MHz devicesChris ChengThu Apr 06 2000 - 11:41:18 PDT
Re: [SI-LIST] : Reflections on clock lineVinu ArumughamThu Apr 06 2000 - 11:50:21 PDT
[SI-LIST] : a good SI/Layout bookChung, SinhThu Apr 06 2000 - 12:05:36 PDT
Re: [SI-LIST] : a good SI/Layout bookRay AndersonThu Apr 06 2000 - 12:26:38 PDT
Re: [SI-LIST] : a good SI/Layout bookPeter LuuThu Apr 06 2000 - 12:29:57 PDT
RE: [SI-LIST] : a good SI/Layout bookLisa DesandoliThu Apr 06 2000 - 12:26:52 PDT
Re: [SI-LIST] : Low InductanceLarry MillerThu Apr 06 2000 - 11:46:13 PDT
RE: [SI-LIST] : a good SI/Layout bookClewell, Craig WThu Apr 06 2000 - 13:15:31 PDT
Re: [SI-LIST] : a good SI/Layout book[email protected]Thu Apr 06 2000 - 13:27:46 PDT
RE: [SI-LIST] : PLL clock buffer chips and the feedback loopAndy PetersThu Apr 06 2000 - 13:25:02 PDT
RE: [SI-LIST] : PLL clock buffer chips and the feedback loopLynne GreenThu Apr 06 2000 - 13:50:59 PDT
RE: [SI-LIST] : PLL clock buffer chips and the feedback loopPeters, StephenThu Apr 06 2000 - 14:16:21 PDT
RE: [SI-LIST] : PLL clock buffer chips and the feedback loopAndy PetersThu Apr 06 2000 - 14:58:35 PDT
[SI-LIST] : routing problems[email protected]Thu Apr 06 2000 - 16:42:37 PDT
Re: [SI-LIST] : Decoupling strategy on 622MHz devicesD. C. SessionsThu Apr 06 2000 - 17:49:46 PDT
Re: [SI-LIST] : PLL clock buffer chips and the feedback loopRengarajan S KrishnanFri Apr 07 2000 - 09:11:09 PDT
[SI-LIST] : Pwr/Gnd NoisezhoujunFri Apr 07 2000 - 09:18:14 PDT
[SI-LIST] : ViPEC (Touchstone QPL clone)Ray AndersonFri Apr 07 2000 - 10:13:27 PDT
[SI-LIST] : Terminator location with larger BGA's[email protected]Fri Apr 07 2000 - 13:16:31 PDT
Re: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Vinu ArumughamFri Apr 07 2000 - 13:37:59 PDT
[SI-LIST] : BLVDS Hot SwapSteve AshFri Apr 07 2000 - 14:56:10 PDT
RE: [SI-LIST] : Terminator location with larger BGA'sRon MillerFri Apr 07 2000 - 15:34:41 PDT
RE: [SI-LIST] : Terminator location with larger BGA'sChris ChengFri Apr 07 2000 - 15:45:38 PDT
Re: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Larry SmithFri Apr 07 2000 - 15:54:10 PDT
Re: [SI-LIST] : Terminator location with larger BGA'sScott McMorrowFri Apr 07 2000 - 16:24:20 PDT
Re: [SI-LIST] : Terminator location with larger BGA'sD. C. SessionsFri Apr 07 2000 - 16:56:13 PDT
Re: [SI-LIST] : Terminator location with larger BGA'sScott McMorrowFri Apr 07 2000 - 18:00:22 PDT
Re: [SI-LIST] : Terminator location with larger BGA'sBob LewandowskiFri Apr 07 2000 - 18:52:17 PDT
Re: [SI-LIST] : Terminator location with larger BGA'sScott McMorrowFri Apr 07 2000 - 18:51:35 PDT
Re: [SI-LIST] : Terminator location with larger BGA'sScott McMorrowSat Apr 08 2000 - 23:42:36 PDT
[SI-LIST] : Printer PortPeter BaxterSun Apr 09 2000 - 15:23:25 PDT
Re: [SI-LIST] : Printer PortS. WeirSun Apr 09 2000 - 18:11:37 PDT
[SI-LIST] : ESD evenyt counterJan VercammenMon Apr 10 2000 - 05:55:46 PDT
Re: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for BypassRitchey LeeMon Apr 10 2000 - 09:13:04 PDT
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Tom DagostinoMon Apr 10 2000 - 09:17:48 PDT
Re: [SI-LIST] : via capacitanceRitchey LeeMon Apr 10 2000 - 09:15:36 PDT
RE: [SI-LIST] : Printer PortVolk, Andrew MMon Apr 10 2000 - 09:15:36 PDT
Re: Fw: [SI-LIST] : via capacitanceRitchey LeeMon Apr 10 2000 - 09:21:14 PDT
RE: [SI-LIST] : ESD evenyt counterFarrokh MottahedinMon Apr 10 2000 - 10:06:21 PDT
Re: Fw: [SI-LIST] : via capacitance[email protected]Mon Apr 10 2000 - 11:50:55 PDT
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of PowerPlanesDr. Edward P. SayreMon Apr 10 2000 - 11:19:21 PDT
RE: [SI-LIST] : via capacitanceRon MillerMon Apr 10 2000 - 13:40:27 PDT
Re: Fw: [SI-LIST] : via capacitance[email protected]Mon Apr 10 2000 - 15:58:22 PDT
RE: [SI-LIST] : HatchDave HooverMon Apr 10 2000 - 16:48:22 PDT
Re: [SI-LIST] : via capacitanceapanellaMon Apr 10 2000 - 20:46:40 PDT
Re: [SI-LIST] : ESD evenyt counterDouglas C. SmithMon Apr 10 2000 - 23:14:30 PDT
Re: [SI-LIST] : via capacitanceScott McMorrowTue Apr 11 2000 - 08:00:45 PDT
[SI-LIST] : Bulk Caps -> Inductor? -> PlanemjsTue Apr 11 2000 - 11:58:33 PDT
[SI-LIST] : Hi Mr. Peters, I'm sorry that you foind our applications notes so confusing. If you can point out some of the specific areas of ambiguity we will attempt to correct them. With respect to your specific question below, i.e., where do you bring the feedback from, this is actually quite simple. You bring it from which ever pin you want to to achieve the multiply or divide ratio you want. The CY7B991 does not have a fixed output for feedback requirements. This can come from any output pin, and can even come from an external divider. The selection of a feedback output path to use is documented in a number of application notes available from http://www.cypress.com/clock/appnotes.html Regards, Ed Grivna Cypress Semiconductor Data Communications Division > From: "Andy Peters" <[email protected]> > To: <[email protected]> > Subject: [SI-LIST] : PLL clock buffer chips and the feedback loop > Date: Mon, 3 Apr 2000 11:06:06 -0700 > MIME-Version: 1.0 > Content-Transfer-Encoding: 7bit > X-Priority: 3 (Normal) > X-MSMail-Priority: Normal > X-MimeOLE: Produced By Microsoft MimeOLE V4.72.2106.4 > Importance: Normal > > When using "zero-skew" PLL clock buffer chips (such as the Cypress > RoboClock), where do you bring the feedback from? Cypress' data sheets and > app notes are notoriously (and typically, I might add) unclear on this - > they simply indicate that it comes from "one of the outputs." > > For instance, my board has an FPGA that talks to four SDRAM devices. It > seems to me that one buffer output could drive the FPGA's clock pin (via > series termination) and four of the other outputs could drive the four SDRAM > clocks (again, through series terminations). Assume that my clock line > lengths are equal, to minimize board skew. Do I take the feedback from one > of the destination pins, and match the line length? Or is it sufficient to > simply connect one of the outputs to the feedback pin right at the chip? > > Are there any other vendors of these sorts of devices? Spread-spectrum > capability is not required. > > thanks, > > -andy > > ps: I sent a short e-mail to the sales-droids at Accel, asking some simple > questions about their signal integrity tool. Since they were apparently too > busy to bother replying, I am no longer considering their product. > > ----------------------------------------- > Andy Peters > Sr Electrical Engineer > National Optical Astronomy Observatories > 950 N Cherry Ave > Tucson, AZ 85719 > 520 318 8191 > [email protected] > > "Money is property; it is not speech." > -- Justice John Paul Stevens > > > **** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HERe: [SI-LIST] : PLL clock buffer chips and the feedback loopEd GrivnaTue Apr 11 2000 - 12:32:37 PDT
[SI-LIST] : IBIS question regards [Falling Waveform] / [Rising Waveform].Merav KassTue Apr 11 2000 - 12:35:28 PDT
[SI-LIST] : BLVDS Hot SwapFrancis ChiuTue Apr 11 2000 - 12:37:48 PDT
RE: [SI-LIST] : BLVDS Hot SwapSteve AshTue Apr 11 2000 - 13:29:39 PDT
Re: [SI-LIST] : Bulk Caps -> Inductor? -> PlaneNick DietzTue Apr 11 2000 - 13:44:34 PDT
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?Larry SmithTue Apr 11 2000 - 14:12:29 PDT
RE: [SI-LIST] : Bulk Caps -> Inductor? -> PlaneTom DagostinoTue Apr 11 2000 - 14:13:36 PDT
Re: [SI-LIST] : Bulk Caps -> Inductor? -> Plane[email protected]Tue Apr 11 2000 - 14:35:12 PDT
RE: [SI-LIST] : IBIS question regards [Falling Waveform] / [Rising Waveform].Chris RokusekTue Apr 11 2000 - 15:02:07 PDT
RE: [SI-LIST] : Bulk Caps -> Inductor? -> PlanemjsTue Apr 11 2000 - 15:01:06 PDT
RE: [SI-LIST] : IBIS question regards [Falling Waveform] / [Risin g Waveform].Peters, StephenTue Apr 11 2000 - 15:13:42 PDT
RE: [SI-LIST] : Bulk Caps -> Inductor? -> PlaneIngraham, AndrewTue Apr 11 2000 - 15:38:52 PDT
RE: [SI-LIST] : BLVDS Hot SwapFrancis ChiuTue Apr 11 2000 - 15:46:47 PDT
Re: [SI-LIST] : Bulk Caps -> Inductor? -> PlanesweirTue Apr 11 2000 - 17:33:32 PDT
Re: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for BypasseWed Apr 12 2000 - 02:12:36 PDT
Re: [SI-LIST] : Parallel Plate Capacitance for BypassAndrew PhillipsWed Apr 12 2000 - 02:27:08 PDT
[SI-LIST] : 18 layer stackup questioneWed Apr 12 2000 - 02:36:47 PDT
[SI-LIST] : Plane Modeling for big power board planeChang, Isaac Yew BengWed Apr 12 2000 - 03:09:09 PDT
Re: [SI-LIST] : Bulk Caps -> Inductor? -> Plane[email protected]Tue Apr 11 2000 - 13:53:23 PDT
[SI-LIST] : Information on FR-4 and other PCB dielectric materials[email protected]Wed Apr 12 2000 - 06:24:34 PDT
Re: [SI-LIST] : �ظ� [SI-LIST] : Parallel Plate Capacitance for Bypass[email protected]Wed Apr 12 2000 - 09:27:33 PDT
Re: [SI-LIST] : 18 layer stackup questionDave HooverWed Apr 12 2000 - 09:51:37 PDT
Re: [SI-LIST] : 18 layer stackup questionsweirWed Apr 12 2000 - 12:52:20 PDT
[SI-LIST] : on-chip decoupling capacitance[email protected]Wed Apr 12 2000 - 13:26:00 PDT
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground?[email protected]Wed Apr 12 2000 - 05:33:16 PDT
Re: [SI-LIST] : on-chip decoupling capacitancebgrossmaWed Apr 12 2000 - 16:43:23 PDT
Re: [SI-LIST] : Reflections on clock lineTham Kok TongWed Apr 12 2000 - 17:49:19 PDT
Re: [SI-LIST] : on-chip decoupling capacitanceJan VercammenThu Apr 13 2000 - 04:01:18 PDT
[SI-LIST] : board-level simulation for differential signalsDaniel WeiThu Apr 13 2000 - 04:45:28 PDT
[SI-LIST] : digital display interface[email protected]Thu Apr 13 2000 - 08:19:42 PDT
Re: [SI-LIST] : Bulk Caps -> Inductor? -> PlaneYu WangThu Apr 13 2000 - 08:15:58 PDT
RE: [SI-LIST] : board-level simulation for differential signalsWeston BealThu Apr 13 2000 - 09:23:32 PDT
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power PlanesScott McMorrowThu Apr 13 2000 - 10:48:15 PDT
Re: [SI-LIST] : on-chip decoupling capacitanceD. C. SessionsThu Apr 13 2000 - 11:16:44 PDT
RE: [SI-LIST] : board-level simulation for differential signalsMarc HumphreysThu Apr 13 2000 - 11:56:28 PDT
[SI-LIST] : 20-H Rule disclosureRay AndersonThu Apr 13 2000 - 11:58:44 PDT
RE: [SI-LIST] : 20-H Rule disclosureChan, Michael Thu Apr 13 2000 - 13:11:32 PDT
[SI-LIST] : �^��: [SI-LIST] : board-level simulation or differential signalDaniel WeiThu Apr 13 2000 - 19:24:16 PDT
RE: [SI-LIST] : board-level simulation for differential signalsWeber ChuangThu Apr 13 2000 - 20:04:10 PDT
RE: [SI-LIST] : board-level simulation for differential signalsDaniel WeiFri Apr 14 2000 - 00:08:37 PDT
Re: [SI-LIST] : Bulk Caps -> Inductor? -> PlaneSilvio ORSIFri Apr 14 2000 - 08:33:06 PDT
[SI-LIST] : Signal Integrity AE for XilinxVern DunbrackFri Apr 14 2000 - 12:33:04 PDT
[SI-LIST] : App note assumptionsMark GeddesFri Apr 14 2000 - 12:31:34 PDT
Re: [SI-LIST] : App note assumptionsRay AndersonFri Apr 14 2000 - 13:05:08 PDT
[SI-LIST] : BLVDS Hot Swap - ConnectorsDAmbrosia, John FFri Apr 14 2000 - 13:18:39 PDT
RE: [SI-LIST] : App note assumptionsChris ChengFri Apr 14 2000 - 13:29:17 PDT
[SI-LIST] : Dielectric Material ComparisonLisa DesandoliFri Apr 14 2000 - 14:40:37 PDT
Re: [SI-LIST] : Dielectric Material ComparisonFred RosenbergerFri Apr 14 2000 - 15:07:14 PDT
RE: [SI-LIST] : Dielectric Material ComparisonMark GeddesFri Apr 14 2000 - 15:32:21 PDT
Re: [SI-LIST] : BLVDS Hot Swap - ConnectorsFrancis ChiuFri Apr 14 2000 - 16:27:52 PDT
Re: [SI-LIST] : App note assumptionsS. WeirSat Apr 15 2000 - 00:55:13 PDT
Re: [SI-LIST] : board-level simulation for differential signalsARiaziSat Apr 15 2000 - 07:33:00 PDT
Re: [SI-LIST] : App note assumptionsMichael SchmittMon Apr 17 2000 - 00:07:38 PDT
RE: [SI-LIST] : Dielectric Material ComparisonClewell, Craig WMon Apr 17 2000 - 05:25:26 PDT
RE: [SI-LIST] : board-level simulation for differential signalsMarc HumphreysMon Apr 17 2000 - 06:35:54 PDT
RE: [SI-LIST] : App note assumptionsMark GeddesMon Apr 17 2000 - 07:53:57 PDT
[SI-LIST] : IBIS for SSTL_2Ronnen LovingerMon Apr 17 2000 - 08:31:46 PDT
[SI-LIST] : AC Coupling vs DC CouplingBryan RobbMon Apr 17 2000 - 09:45:25 PDT
[SI-LIST] : Question on propagation delay........Greim, MichaelMon Apr 17 2000 - 10:14:56 PDT
Re: [SI-LIST] : IBIS for SSTL_2D. C. SessionsMon Apr 17 2000 - 10:14:58 PDT
Re: [SI-LIST] : AC Coupling vs DC CouplingScott McMorrowMon Apr 17 2000 - 10:31:08 PDT
Re: [SI-LIST] : IBIS for SSTL_2Scott McMorrowMon Apr 17 2000 - 10:36:31 PDT
Re: [SI-LIST] : Question on propagation delay........Istvan Novak - Board Design TechnologyMon Apr 17 2000 - 11:09:19 PDT
[SI-LIST] : App Notes & PapersLynne GreenMon Apr 17 2000 - 11:23:39 PDT
[SI-LIST] : RE: App Notes & PapersLynne GreenMon Apr 17 2000 - 11:30:06 PDT
Re: [SI-LIST] : Question on propagation delay........Steve CoreyMon Apr 17 2000 - 11:53:04 PDT
RE: [SI-LIST] : AC Coupling vs DC CouplingGreim, MichaelMon Apr 17 2000 - 12:14:40 PDT
RE: [SI-LIST] : Question on propagation delay........Ingraham, AndrewMon Apr 17 2000 - 12:37:50 PDT
RE: [SI-LIST] : AC Coupling vs DC CouplingFarrokh MottahedinMon Apr 17 2000 - 12:36:29 PDT
[SI-LIST] : anybody fielding newbie questions??Robison Michael R CNINMon Apr 17 2000 - 13:13:01 PDT
RE: [SI-LIST] : Dielectric Material ComparisonNorman EbsaryMon Apr 17 2000 - 13:16:56 PDT
Re: [SI-LIST] : anybody fielding newbie questions??Dave HooverMon Apr 17 2000 - 13:33:27 PDT
Re: [SI-LIST] : anybody fielding newbie questions??[email protected]Mon Apr 17 2000 - 14:45:25 PDT
RE: [SI-LIST] : anybody fielding newbie questions??Peters, StephenMon Apr 17 2000 - 13:52:06 PDT
[SI-LIST] : HSPICE Vector File ProblemBradley S HensonMon Apr 17 2000 - 14:09:31 PDT
Re: [SI-LIST] : Question on propagation delay........Mike JenkinsMon Apr 17 2000 - 14:26:26 PDT
RE: [SI-LIST] : AC Coupling vs DC CouplingS. WeirMon Apr 17 2000 - 14:35:16 PDT
RE: [SI-LIST] : HSPICE Vector File ProblemMuranyi, ArpadMon Apr 17 2000 - 14:28:34 PDT
Re: [SI-LIST] : AC Coupling vs DC CouplingScott McMorrowMon Apr 17 2000 - 14:36:36 PDT
Re: [SI-LIST] : anybody fielding newbie questions??Eric AndersonMon Apr 17 2000 - 15:12:42 PDT
Re: [SI-LIST] : AC Coupling vs DC CouplingTony SweeneyMon Apr 17 2000 - 15:37:33 PDT
RE: [SI-LIST] : HSPICE Vector File ProblemBradley S HensonMon Apr 17 2000 - 16:15:28 PDT
Re: [SI-LIST] : board-level simulation for differential signalsJonathan DowlingMon Apr 17 2000 - 17:11:19 PDT
RE: [SI-LIST] : AC Coupling vs DC CouplingDegerstrom, Michael J.Mon Apr 17 2000 - 19:13:23 PDT
Re: [SI-LIST] : AC Coupling vs DC CouplingJosip PopovicTue Apr 18 2000 - 04:57:50 PDT
Re: [SI-LIST] : Dielectric Material Comparison[email protected]Tue Apr 18 2000 - 07:38:30 PDT
Re: [SI-LIST] : AC Coupling vs DC CouplingD. C. SessionsTue Apr 18 2000 - 10:24:57 PDT
RE: [SI-LIST] : AC Coupling vs DC CouplingChris ChengTue Apr 18 2000 - 13:25:26 PDT
[SI-LIST] : on-chip decoupling capacitance (and SI)Sandy TaylorTue Apr 18 2000 - 16:29:03 PDT
Re: [SI-LIST] : on-chip decoupling capacitance (and SI)D. C. SessionsTue Apr 18 2000 - 16:51:44 PDT
Re: [SI-LIST] : AC Coupling vs DC CouplingD. C. SessionsTue Apr 18 2000 - 17:41:05 PDT
RE: [SI-LIST] : on-chip decoupling capacitance (and SI)Zabinski, Patrick J.Wed Apr 19 2000 - 04:46:15 PDT
[SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power PlanesMaryWed Apr 19 2000 - 09:45:12 PDT
Re: [SI-LIST] : on-chip decoupling capacitance (and SI)D. C. SessionsWed Apr 19 2000 - 10:55:51 PDT
RE: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Pl anesNadolny, JimWed Apr 19 2000 - 11:05:34 PDT
RE: [SI-LIST] : on-chip decoupling capacitance (and SI)Zabinski, Patrick J.Wed Apr 19 2000 - 11:40:18 PDT
[SI-LIST] : Friendly reminder about message formattingRichard A. SchumacherWed Apr 19 2000 - 11:58:14 PDT
Re: [SI-LIST] : on-chip decoupling capacitance (and SI)D. C. SessionsWed Apr 19 2000 - 11:57:41 PDT
Re: [SI-LIST] : Friendly reminder about message formattingRay AndersonWed Apr 19 2000 - 12:21:27 PDT
RE: [SI-LIST] : on-chip decoupling capacitance (and SI)Chris ChengWed Apr 19 2000 - 12:29:04 PDT
Re: [SI-LIST] : on-chip decoupling capacitance (and SI)D. C. SessionsWed Apr 19 2000 - 13:00:28 PDT
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Pl anes[email protected]Wed Apr 19 2000 - 15:49:25 PDT
RE: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power PlanesChris RokusekWed Apr 19 2000 - 16:37:58 PDT
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Pl anes[email protected]Thu Apr 20 2000 - 10:33:01 PDT
[SI-LIST] : differential impedanceSean MurrayThu Apr 20 2000 - 11:18:31 PDT
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power PlanesRay AndersonThu Apr 20 2000 - 11:06:20 PDT
[SI-LIST] : SI position at Intel Folsom, CAMuranyi, ArpadThu Apr 20 2000 - 11:12:59 PDT


Last message date: Thu Apr 20 2000 - 11:25:12 PDT Archived on: Thu Apr 20 2000 - 11:36:16 PDT
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