RE: [SI-LIST] : Adding inductors to ground?

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From: Istvan Novak - Board Design Technology (inovak@pompom.east.sun.com)
Date: Thu Mar 02 2000 - 11:56:49 PST


Just to add something to Ray's good explanation: there are ferrite inductors
available from several vendors where the ferrite material is intentionally
lossy. This makes up for the decreasing mu at high frequencies, and tends to
suppress peaking. This kind of loss does not effect the DC resistance of the
inductor.

Istvan

        Date: Thu, 2 Mar 2000 11:12:22 -0800 (PST)
        From: Ray Anderson <raymonda@radium.eng.sun.com>
        Subject: RE: [SI-LIST] : Adding inductors to ground?
        To: si-list@silab.eng.sun.com
        MIME-Version: 1.0
        Content-MD5: PFlMaU/DDBGN40kZk9W9sQ==
        
        
        
        sweir wrote:
        
> The usual good intention of this is to keep noise from the planes out
of
> the PLL, not the other way around. The fear is that the VCO will get
> thrown off by PS noise. It can be more dangerous to use an inductor,
                                    ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> unless the filter is properly damped, than to use either a resistor or
          ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> direct connection. In either case, high quality bypass from the PLL
VCC to
> the PLL ground is very important. This is also one of the places
where
> judicious moating can be very useful.
>
        
        
        Good point. I was involved in fixing a design that someone messed up
        where they used one of the little integrated ferrite low pass filters
        to feed the PLL VCC pin on an ASIC.
        
        As it turns out, if you look at the attenuation curve in the vendor's
        data book, the low pass characteristic appears well behaved and as
        you might expect. The gotcha' is that the parts are characterized in
        a 50 ohm system. Well if you are feeding the filter from a power plane
        then the driving impedance is probably in the sub-ohm region and the
        load presented by the PLL is in the couple hundred ohm region. Grossly
        mismatching the little lpf part like that causes a real peaky response.
        The one I saw had a peak of around 20 dB. The end result was that there
        actually was more noise on the PLL VCC pin coming from the power plane
        than there was on the plane. The filter didn't attenuate the noise but
        it enhanced it.
        
        I've seen this effect also with badly designed discrete LC filters used
        in the same sort of applications. The cure is the judicious insertion of
        a small bit of resistance to damp the response. You need enough to
        tame the peaking but not enough to mess up DC conditions.
        
        
        -Ray
        
        
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Istvan Novak Sun Microsystems, Inc.
Istvan.Novak@Sun.Com Workgroup Servers, BDT Group,
                        One Network Drive, Burlington, MA 01803
                        Phone: (781) 442 0340

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