From: Harris, George (George.Harris@compaq.com)
Date: Mon Jan 10 2000 - 14:18:35 PST
I too have been following the favorite concept thread with a chuckle. Here
is what the tradeoffs are between the grounds or empty space between
1. Stripline (trace between two reference planes):
If the dielectric is thin compared to signal spacing, most of the
field will couple to the reference planes, and added ground will have little
effect. You can prove by spice simulation that an apparent improvement in
crosstalk of about 10% can be obtained, but lab experiments we performed did
not confirm it. The effect was too small to be measurable. Change in
impedance was too small to be measurable as well.
In order for this scheme to work on the module, you would have to
ground the added trace every inch or so, otherwise crosstalk induced in the
added trace might reflect from the shorted ends multiple times and possibly
couple back into the signal lines. At least that is what one prominent
proponent of this scheme used to recommend, however their application was
for surface etch, where it might be more justifiable.
(Sorry but I am bound to secrecy on that one -- NDA's, IP's and all that
As a practical consideration, this is not implementable because the size of
the pad/via combination would require spacing the etch so far apart, that
there would not be any measurable crosstalk anyway.
2. Microstrip (surface etch):
Just today I looked at the patents that Compaq obtained on using
interleaved grounds to control impedance of microstrip etch on a 2-sided pc
board (no reference planes). Under those conditions the interleaved ground
traces are very useful. I recommend that you peruse the patents referenced
in a recent si mail -- unfortunately I deleted my copy of the message. (US
patents 5,764,489 and 5,986,893).
3. The 20-H rule.
There was a message about it last year on the SI-list which actually
explained what it is... It refers to having the ground planes overlap the
power planes around the edges of the board by 20X the spacing between the
two planes, e.g. , if dielectric thickness between the two planes is 12m,
the overlap would be 240mils.
I don't know of any proof that this trick works to reduce EMI or
module vdd noise.
COMPAQ Computer Corporation
From: Kim Helliwell [mailto:firstname.lastname@example.org]
Sent: Monday, January 10, 2000 4:17 PM
Subject: Re: [SI-LIST] : What's your favourite Screwy SI Concept?
Chris Heard wrote:
> Here's another...
> Use a ground trace in between signal traces to reduce crosstalk....
I'm curious why this is screwy. Is it because:
1. The separation of the signal traces alone (because of the ground trace)
would be enough to reduce the crosstalk, so the ground trace is not
2. The ground trace actually contributes more crosstalk.
I assume it's #1. What has been frustrating me with this whole discussion
is the bald statement of the screwy concept, without some explanation
why the concept is screwy. Those of us still learning signal integrity
concepts are left hanging out to dry. I now know a bunch of things that
are considered screwy enough by one person to have it posted here, but
I'd like to know more. At least references so I can look them up would
help; I'm not that lazy!
I'm still wondering *what* the 20H rule is, let alone why it's screwy!
OK, guess that's enough "emporer has no clothes" for me today!
-- Kim Helliwell Senior CAE Engineer Acuson Corporation Phone: 650 694 5030 FAX: 650 943 7260
This archive was generated by hypermail 2b29 : Thu Apr 20 2000 - 11:34:32 PDT