Re: [SI-LIST] : Simulations

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From: Michael Vrbanac (vrbanacm@swbell.net)
Date: Fri Jan 14 2000 - 12:55:57 PST


Scott,

What you have commented on may explain some of the frequency
domain "distortions" that I note from time to time but haven't dug into
it fully to find out.

I have a question re: "I have also seen simulation algorithms which
show cumulative error when the number of individual trace segments
is large, as is the case with most signal traces on PCB's."

Why do you suppose that is? Do you think it is because of the
cumulative errors in the segments or is it something else like
increase in simulation errors in bends (90deg or not) which have
increased in count... or both/none?

Michael

Scott McMorrow wrote:

> Doug,
>
> I always start with basic theoretical structures for simulator testing.
> You'd be surprised just how many simulators and algorithms have
> dc offset errors when simulating lines with losses. Like you, I can
> calculate the proper results by hand.
>
> I find that often errors are not so much in the simulator as they
> are in the method of parameter extraction and approximation of
> elements in the system.
>
> Comparing simulator results to measured data is not a very
> accurate science unless you have previously characterized the
> simulator in a theoretical environment and therefore trust it's
> basic correctness. Then, the next layer of the puzzle becomes
> verifying the parameter extractor and trace modeler, which is
> a bit tricky ... especially if you are looking for timing accuracy
> of less than 10 ps. I have found parameter extraction and trace
> modeling algorithms which create networks which have
> cumulative error across multiple cascaded trace segments.
> I have also seen simulation algorithms which show cumulative
> error when the number of individual trace segments is large, as
> is the case with most signal traces on PCB's.
>
> Then comes the case of validating a know theoretically good
> simulator, parameter extractor, and trace modeler to reality.
> Yuck! Of course, first one must verify all parameters in the
> target real design, which is not a simple task. But that is another
> long story best left for other days.
>
> regards,
>
> scott
>
> --
> Scott McMorrow
> Principal Engineer
> SiQual, Signal Quality Engineering
> 18735 SW Boones Ferry Road
> Tualatin, OR 97062-3090
> (503) 885-1231
> http://www.siqual.com
>
> Doug Smith wrote:
>
> > Hi All,
> >
> > I am interested in ways that people use to verify simulation results,
> > that is to check that the results reflect reality. In the past, I have
> > built up similar, but simple enough to calculate or build, structures
> > and made sure the simulator agreed with what I measured/calculated by
> > hand. Sometimes, I have also looked at the convergence history of some
> > of the requested output. Occassionally, a simulator would produce an
> > answer that was not properly converged. Seems like is a good idea to
> > know beforehand the general nature of the answer so you know when the
> > simulator is not working as expected.
> >
> > What other techniques have been used? Any war stories out there?
> >
> > Doug
> >
> > --
> > ----------------------------------------------------------
> > ___ _ Doug Smith
> > \ / ) Manager EMC Development & Test
> > ========= Auspex Systems
> > _ / \ / \ _ 2300 Central Expressway
> > / /\ \ ] / /\ \ Santa Clara, CA 95050-2516
> > | q-----( ) | o | Phone/FAX: 408-566-2157/2020
> > \ _ / ] \ _ / Email: dsmith@auspex.com
> > ----------------------------------------------------------
> >
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