[SI-LIST] : Position Available

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From: Tim L. Michalka (tim@fc.hp.com)
Date: Thu Feb 17 2000 - 15:07:11 PST


HP's package design team in Fort Collins, Colorado has an immediate
opening for a signal integrity/simulation engineer for packaging and
interconnection. This small and growing team is part of the
organization that designed the PA-8500, winner of Microprocessor
Report's 1998 Editor's Choice Best RISC Microprocessor award. We are
seeking a capable, motivated individual to expand our team.

Essential Responsibilities:

Perform package and interconnection design and signal integrity
analysis for high performance CPU and CEC chips. Key deliverables are
package physical layout & design; package and interconnection model
creation; electrical signal simulation & analysis. Work closely with
chip design teams, package manufacturing organizations, and system
partners to optimize package and interconnection performance, and to
meet physical and reliability requirements of the end computer
product. Develop tools to automate and improve the design and analysis
processes.

Skills/Knowledge Qualifications:

Musts:

BSEE or related discipline.
Fundamental understanding of Materials, Physics, and Electronic
principles of silicon packaging technology

Desired:

4 years Experience in Package Design or Manufacturing, or Chip I/O
Design
Experience performing bus simulations and measurements for signal
integrity
Experience with package CAD tools (particularly Cadence APD)
Experience with SPICE
Experience with RLCG parameter extraction tools
Experience programming with Perl or C

CONTACT:

-- 
Tim Michalka					TEL:	970-898-3555
Hewlett-Packard Company				FAX:	970-898-3961
3400 East Harmony Road  MS 32			e-mail:	tim@fc.hp.com
Fort Collins, CO  80528-9599

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