From: Robison Michael R CNIN (Robison_M@crane.navy.mil)
Date: Mon Apr 17 2000 - 13:13:01 PDT
i hope that i'm posting correctly here. i'm laying out a board and
thinking i'll have 9 layers:
this means my power and ground planes aren't adjacent, but at
least each signal is positioned next to a power/gnd plane. the
board is 11" by 11" and running ALS for some lowspeed memory
loading and memory access, and then a few F series chips to
run at 25MHz, with some of the fast stuff as board I/O.
any comments would be appreciated.
thank you, miker
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