Date: Wed Mar 15 2000 - 19:20:15 PST
I don't want to get into trouble. Anyway, if there are two
identical PFDs pumping the same charge to two identical
capacitors, then the voltage difference between the
caps is ideally zero.
Jeff <email@example.com> on 15/03/2000 16:49:01
Please respond to firstname.lastname@example.org
cc: (bcc: Raymond Leung/QSA/AU)
Subject: Re: [SI-LIST] : SSC
--- Raymond.Leung@qsa.idt.com wrote:
> There are some other techniques to solve the dead
> problem. among them a fully balanced diffferential
> PLL will
> do a good job. Several ten ps jitter should not be
> a problem.
Can you explain this?
Wouldn't a fully balanced diffferential phase/freq
detector still go "tri-state" when locked?
**** To unsubscribe from si-list or si-list-digest: send e-mail to email@example.com. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Thu Apr 20 2000 - 11:35:41 PDT