Date: Wed Mar 15 2000 - 19:20:15 PST
I don't want to get into trouble. Anyway, if there are two
identical PFDs pumping the same charge to two identical
capacitors, then the voltage difference between the
caps is ideally zero.
Jeff <firstname.lastname@example.org> on 15/03/2000 16:49:01
Please respond to email@example.com
cc: (bcc: Raymond Leung/QSA/AU)
Subject: Re: [SI-LIST] : SSC
--- Raymond.Leung@qsa.idt.com wrote:
> There are some other techniques to solve the dead
> problem. among them a fully balanced diffferential
> PLL will
> do a good job. Several ten ps jitter should not be
> a problem.
Can you explain this?
Wouldn't a fully balanced diffferential phase/freq
detector still go "tri-state" when locked?
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