From: S. Weir ([email protected])
Date: Sun Feb 20 2000 - 21:38:36 PST
If it is detailed answers then I think the questions are very
ambitious. Maybe we could start with techniques to improve simulation
efficiency, and accuracy for one tool. Anybody care to kick-off a
discussion based on their most familiar tool?
At 08:48 AM 2/20/2000 -0800, you wrote:
>Steve Weir Wrote:
>This all sounds like "motherhood and apple pie" to me. Unless I missed
>something, it sounds like:
>1. We trade economy in the design and validation processes against
>and risk further down the product life cycle.
>2. Success requires care and diligence in the trade-offs, and validation
>I think those who are successful are those who are either very lucky, or
>those who get it and do the job. It's a subset of TQM.
>Thank you for your response.
>A main objective of my post was to discuss possible solutions to
>following types of questions:
>Under what conditions is it necessary to simulate during the course of a
>high speed PCB design?
>What are the pros and cons of a high speed digital design based solely
>on rules of thumb?
>By what means can efficiency of a SI simulation be optimized?
>Now the complete answer to above can be quite lengthy encompassing many
>considerations and concepts, but as it was pointed out some key elements
>of the solution include:
> "Critical length"
> Economical considerations
> Development of a versatile model library
> Formulation of a comprehensive "simulation plan"
>Additionally, the capabilities of the simulator program also plays an
>important role in this puzzle.
> [email protected]
> [email protected]
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