Re: [SI-LIST] : Bad IBIS models!

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From: Tadashi ARAI (arap@paso.fujitsu.co.jp)
Date: Wed Mar 15 2000 - 18:00:48 PST


Hi Kim and IBIS-crazed-guys,

I will try to make arrangement of the pet ppeve;

1. Models that don't have a complete pin map
2. Pin map does not match the data sheet.
3. Files that specify all the pins, but some of the models referenced
   don't exist in the file
4. Driver models that don't have any rise and fall curves.
5. dv/dt values that are *GIVEN* as 0.00000/0.00000.
   (This is totally unacceptable by my signal integrity tools)
6. dv/dt values that are *GIVEN* as -x.xxxx/y.yyyy
   (that is, negative values specified; also not accepted by
   my SI tools)
7. Min/Typ/Max values or curves that are scrambled
   ( Typ > Max, Min > Typ, Min > Max)
8. VI and clamp curves that are discontinuous.
--(Kim Helliwell)

9. IBIS models in which the min/typ/max data sets are virtually the same.
--(Bob Perlman)

10.Packages that are dead wrong.
11.Double counting die capacitance in with package capacitance.
12.Ramps and Waveform tables created at high load resistance.
13.Min and Max waveform tables created at nominal voltage.
14.IV curves which don't pass through the origin.
15.Extracted parameters at typical corner only.
16.Loading that does not match the data sheet parameters.
--(Scott McMorrow)

17.TIMING REFERENCE LOAD.Vmeas, Vref, Rref, Cref must be present and
   equal to what is used to measure timing stated on the device data
   sheet.
--(Weston Beal)

and I want to add a row to this list,

18.Made with s2ibis, even after the devices were released as products,
   not to evaluate or correlate the IBIS to measurements with the true
   devices

I have many "abnormal" IBISs in my collection (in which there is few
accurate model ;() and will show you an exmaple.

...
> [File Rev] 1.0
> [Date] 06/07/98
> [Source] From silicon level SPICE model
> [Notes] Rev. 0.9 06/07/98
> Alpha release
> [Disclaimer] This information is for modeling purposes only, and
> is not guaranteed.
> [Copyright] Copyright 1998, Crystal Semiconductor Corp.,
> All Rights Reserved
...
> [Manufacturer] Crystal Semiconductor Corporation
...
> [GND Clamp]
> | Voltage I(typ) I(min) I(max)
> |
> -3.60000 -1.000e+25 -1.000e+25 -1.000e+25
> -2.20000 -1.000e+25 -1.000e+25 -1.000e+25
> -2.00000 -1.000e+25 -1.000e+25 -1.000e+25
> -1.80000 -1.000e+25 -1.000e+25 -1.000e+25
> -1.60000 -9.468e+22 -1.911e+22 -1.000e+25
> -1.40000 -9.894e+19 -4.472e+19 -5.569e+20
> -1.20000 -1.034e+17 -1.046e+17 -1.136e+17
> -1.00000 -1.080e+14 -2.448e+14 -2.319e+13
> -800.00000m -112.9147G -573.0318G -4.7331G
> -600.00000m -117.9969M -1.3409G -965.8735k
> -400.00000m -123.3078k -3.1377M -197.1048
> -200.00000m -128.7234 -7.3251k -40.2150m
> 0. -1.1095n -1.0994n -851.9528p
> 200.00000m 134.5172m 17.1407 8.2060u
> 400.00000m 134.6579m 17.1810 8.2077u
> 600.00000m 134.6579m 17.1810 8.2078u
> 800.00000m 134.6579m 17.1810 8.2078u
> 1.00000 134.6579m 17.1810 8.1905u

This is an audio device for PCI. WHAT A CRAZY CURRENT! -1e+25 Amps!?

I was crazed to complain to the vendor, but they wouldn't make corrected
model.

So that I will add one more line, to the list.

19."Not guaranteed" model.
   Hey, if you couldn't guarantee your model, I cannot guarantee my
   simulation. Also I cannot guarantee to continue to use your devices.

Regards,
//// /// // / / / / / / / / / /
Tadashi Arai//Platform Developing Dept.,Desktop Prd Div. Fujitsu Limited
arap@paso.fujitsu.co.jp TEL:+81-42-370-7617 Inagi-shi, Tokyo, Japan
/ / / / / / / / / / / // ///

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