# RE: [SI-LIST] : Bulk Capacitance

From: Chang, Martin M ([email protected])
Date: Fri Feb 25 2000 - 11:42:18 PST

Jose,

I'd recommend reading the Pentium(R) III Xeon(TM) Processor Power
Distribution Guidelines available on our developer.com website. URL is:

It's a power design app note that's written for systems using the Intel(R)
Xeon(TM) processor family. There are some notes on capacitor ESR you will
probably want to consider in your transient response calculations.

Good Luck,

Martin Chang
Tech Marketing Engr.
Performance Microprocessor Div.
Intel Corp.

-----Original Message-----
From: Ray Anderson [mailto:[email protected]]
Sent: Friday, February 25, 2000 11:08 AM
To: [email protected]
Subject: Re: [SI-LIST] : Bulk Capacitance

When we do our bulk decoupling calculations we use the
maximum transient current number.

For example if you have a DC draw of 16 Amps of core current
but you know it varies between a minimum of say 5 amps in
a sleep condition and 16 amp full current consumption then I'd
use 16-5 = 11 amps transient current in my calculation.

If you can tolerate say +/- 5% on your 1.7 volt supply then
+/- 85 mV is the ripple tolerance you need to design for.

At least that is what we do on Sparcs, never messed about
with a Xeon but the procedure should be the same.

-Ray

>
> Hi,
>
> I'm a rookie and don't know how to read the specs. I'm trying to calculate
> the bulk capacitance for using a
> Xeon processor. Which current should I use to calculate the bulk
> capacitance? The ICCcore of 16 amps
> for FMB? or should I use something else. What should be my voltage
> tolerance, the static of 85 millivolts
> or the transient of 130 millivolts.
>
> Thanks,
> Jose
>
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