[SI-LIST] : Signal Integrity Eng. Job Openings at Cisco, RTP, NC

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From: Stephen Hilla (shilla@cisco.com)
Date: Tue Mar 28 2000 - 10:55:09 PST


Job Openings at Cisco Systems Inc., RTP, North Carolina
 
Senior and Junior Level Signal Integrity Engineering Openings:

Cisco System, RTP NC, edge enterprise and wireless business unit teams
have
immediate openings for both experienced and junior level Signal
Integrity
Engineers. These persons will provide technical assistance to Cisco's
Hardware
and ECAD design Engineer to ensure complete signal integrity and proper
timing
behavior of high performance Printed Circuit Board (PCB). The positions
consist
of evaluating and recommending component placements, topologies, clock
distribution, and decoupling strategies. Should then be able to convert
these
recommendations to layout rules to help guide autorouters so as to
achieve a
timely and cost-effective PCB solution. Knowledge of PCB fabrication
technology
and high density packaging a definite plus.

These positions may also require providing guidance to ASIC designers
with I/O
driver sizing, interface timing verification, and when appropriate
optimization
of device pinout. High performance I/O technologies such as HSTL. SSTL
and LVDS
are used extensively. Should be able to develop and verify IBIS and
timing
models, help maintain existing simulation databases and contribute to
the
refinement of the overall design methodology.

Must be able to work well in a team environment and possess excellent
interpersonal communication skills. Should be familiar with Innoveda
(A.k.a.
Viewlogic), Cadence and Avanti design tools. Knowledge of EMI considered
a
plus.

If you are interested in investigating the potential of these positions,
please
send your resume to

shilla@cisco.com and kcr@cisco.com

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