RE: [SI-LIST] : Input switching threshold & CPCI

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From: Volk, Andrew M (andrew.m.volk@intel.com)
Date: Tue Jan 04 2000 - 14:34:51 PST


I have to disagree with the comment from Mr. Sessions that compatibility
from PCI to AGP was not required. It most certainly was. Several vendors
"bridged" between PCI and AGP with the same controller working on both
interfaces. They were able to use their prior designs and get into a new
market quicker, with less risk and lower cost. I'm not saying that the SI
issue he raised is not correct. There are always better solutions if you
can cut and run. I'd like to see his "clean sheet" idea actually create a
better means for interconnect. But "compatibility" is a bridge to better
things as well as an anchor to them. (I swear by it and at it every day.)

Andrew Volk
Intel Corp.

-----Original Message-----
From: Adrian Shiner [mailto:adrian.shiner@virgin.net]
Sent: Tuesday, January 04, 2000 11:23 AM
To: si-list@silab.eng.sun.com
Subject: Re: [SI-LIST] : Input switching threshold & CPCI

Size does not necessarily mean that you have the best thoughts..dinosaurs
were pretty big but where are they now?

Adrian
----- Original Message -----
From: D. C. Sessions <dc.sessions@vlsi.com>
To: <si-list@silab.eng.sun.com>
Sent: 04 January 2000 17:44
Subject: Re: [SI-LIST] : Input switching threshold & CPCI

> Abe Riazi wrote:
> >
> > D. C. Sessions Wrote:
> > >
> > >PCI does the old (idiotic) 0.8-2.0 input thresholds that were first
> > >documented on cave walls. In contrast, anyone trying to do serious
> > >signaling at nontrivial speeds uses very tight thresholds, usually
> > >scaled to the driver supply and usually with differential receivers.
> > >
> > Hi D. C.,
> >
> > This is a good point. For 3.3 V signaling, the input voltage threshold
> > values (based on PCI specs) consist of:
> >
> > Minimum Vih (Input High Voltage) = 0.5 Vcc
> > Maximum Vil (Input Low Voltage) = 0.3 Vcc
>
> Hmmm... 0.9v to 1.8v -- slightly tightened TTL again.
> The big evil of course is the 0.4 Vcc centerpoint, which
> Intel reflects in their drive specs making for rotten
> line matching. They made the same mistake with AGP
> (Vref of 0.39 to 0.41 Vcc, 2/3 PCI drive) even though
> there wasn't any need for backward compatibility.
>
> At least it's scaled. I'm tired of arguing with customers
> who insist on running timing analyses against Vih(max) at
> slow corner Vcc min.
>
> --
> D. C. Sessions
> dc.sessions@vlsi.com
>
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