From: sweir ([email protected])
Date: Wed Mar 22 2000 - 12:46:00 PST
Yes, this is becoming a very common issue, tougher and tougher to deal with
given falling Tr's and micro packaging.
At 07:16 PM 3/22/00 +0900, you wrote:
>Jeff's suggestion is sound good but couldn't be use in a high density PC
>board where space is premium. Example: at both ASICs (BGA), there is no
>space to put any series resistors.
>The transceiver (driver) I'm using has a current drive capability of
>24mA. Is it possible that this driver is too strong and caused
>reflections at the first receiver?
>Is this is too strong buffer which can cause reflection from device
>nearest to driver?
>At $B8a8e(B 12:44 00/03/20, S. Weir wrote:
>>The primary value of those resistors is to decouple the parasitic
>>capacitance of each load from the T-line. For the parallel case, if R
>>matches Zo, then it limits the impedance bump at each drop to -Zo/2. To
>>the extent that skew can be tolerated, the bigger the R, the better as in
>>the limit Zo is undisturbed, but also in the limit no AC signal gets to
>>Most commonly, matching series R's are used at opposing ends as series
>>terms on bidirectional data lines, where there are only loads/drivers at
>>the two ends.
>>At 09:28 AM 3/20/2000 -0800, you wrote:
>>>Normally just lurk...but would like to add my .02 here. I too have
>>>experienced the same phenomona in the past. The solution I wuold like to
>>>suggest is to end terminate using your favorite method (AC, thev. equiv,
>>>R to ground, etc.). But additionally put a resisistor of value Zo just
>>>before the net connects to each receiver. Your net should daisy chain to
>>>each of the resistors, the other side of the resistor connects to the
>>>receiver input pin. Provided you keep this "stub" as short as possible,
>>>I've found this to work well. Your trace will look like the following:
>>> R R R R R
>> Pin Pin Pin Pin Pin Pin
>>>I would be very curious to hear what the list has to say. I would also
>>>like to hear if this suggestion cleans up you simulation.
>>>>----- Original Message -----
>>>>From: <mailto:[email protected]>Tham Kok Tong
>>>>To: <mailto:[email protected]>[email protected]
>>>>Cc: <mailto:[email protected]>[email protected] ;
>>>><mailto:[email protected]>[email protected]
>>>>Sent: Monday, March 20, 2000 12:26 AM
>>>>Subject: [SI-LIST] : Daisy-Chain
>>>>I have a trace which connects in daisy-chain from 1 driver(transceiver)
>>>>to 6 receivers ( 2 ASICs (BGA type), 2 ROMs, 1 flash memory and 1
>>>>The connecting sequence is 1) ASIC1, 2) ASIC2, 3), transceiver, 4)
>>>>ROM1, 5) ROM2, 6) Flash memory.
>>>>My problem is the simulation result shows reflection occurs at the
>>>>receiver(non-monotonic waveform) nearest to the driver. Is it a good
>>>>idea to put a pulldown resistor at that receiver(resistor value = Zo)?
>>>>I welcome any suggestions or advices on this matter. Thank you.
>>>>$B!!!!(BUltimate Technologies Inc.
>>>> SI Group
>>>> 1462-6F, Shindencho, Nagano-Shi 380-0835, Japan
>>>>$B!!(B TEL$B!'(B $B!!(B026-267-7256
>$B!!!!(BUltimate Technologies Inc.
> SI Group
> 1462-6F, Shindencho, Nagano-Shi 380-0835, Japan
>$B!!(B TEL$B!'(B $B!!(B026-267-7256
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