From: sweir (firstname.lastname@example.org)
Date: Tue Apr 11 2000 - 17:33:32 PDT
The power supply appears to be a flyback topology. The switching current
rides directly on top of the ESR, and ramps on the ESL of the output filter
capacitors. Unless the design can tolerate nasty switching spikes a
secondary filter such as shown is common. Assuming that the diode ratings
are indicative of the output current, even a very good pair 47uF capacitor
will have an ESR in the of 100 milliohms +. At multiple amperes output
current times, there will be 100's of millivolts riding on top of the bulk
filter visible in the GIF file.
The designer must understand the filter requirements, and both pick L202,
and the plane side capacitors appropriately. It is also necessary for the
designer to insure that the filter is properly damped.
At 01:58 PM 4/11/00 -0500, you wrote:
>I am not sure if the list accepts attachments, but here goes.
>If the attachment is stripped by the listserve, please find
>it visible at www.enteract.com/~mjs/induct.gif (16k)
>The attached gif show a snip from a schematic currently in layout.
>The transformer shows the secondary of the SMPS, connected
>to a whole mess of bulk capacitance, especially on +5V net.
>Please note L202 series inductor inserted between the bulk capacitance and
>the connection to the power plane. This worries me most. There seems to
>be no valid reason to stuff series inductance between the bulk and the
>plane. Further, all the local ceramic IC pin bypass will also have to
>suck current through that same inductor. Seems like a terrible idea to
>me. Comments welcome.
>Sr. PCB Design Eng.
>Charles Industries, Ltd.
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This archive was generated by hypermail 2b29 : Thu Apr 20 2000 - 11:36:09 PDT