RE: [SI-LIST] : modeling languages (was: receiver jitter)

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From: Muranyi, Arpad ([email protected])
Date: Thu Jan 20 2000 - 17:35:26 PST

-----Excerpt from Original Message-----
From: Stephen Peters [mailto:[email protected]]
Sent: Thursday, January 20, 2000 1:05 PM
To: [email protected]
Subject: Re: [SI-LIST] : modeling languages (was: receiver jitter)

Instead of arguing IBIS
vs. SPICE we (the industry) ought to be working towards a modeling language
that supports the circuit simulators nodal descriptions while at the same
allowing a higher level behavioral description of the buffer (or receiver)

  Stephen Peters
  Intel Corp.

I couldn't agree more. Which leads me back to one of my previous postings
to the IBIS email reflector which I wrote to collect some ideas on what kind
of improvements need to be done in IBIS to make it useful for those who
use it today. Thanks to those who contributed we received some really good

Here is a thought provoker again:

In the next revision of IBIS or even ANY-SPICE!!! :-) I would like to see a
combination of all of the good features in every tool and modeling language
I have ever seen. Some of the items that come to my (tired) mind now are:

    flexibility, nodal description
    speed, accuracy
    any level of model abstraction
         full transistor with process information
         table driven transistor (IMIC)
         behavioral primitives (from inverter, to any level of
              buffer building blocks, full buffer, etc.)
         allow any type of expression for the above between each of its
         (S-parameters, math formulas, matrixes, etc.)
    power plane modeling, field solver capabilities including
         frequency dependencies (and dielectric losses)
         return path modeling
         package and on-die power distribution modeling
    behavioral receiver modeling (why not...)
    arbitrary automated measurements
    good preprocessing interface
         full board extraction
         automatic variable sweeping capability (including Monte Carlo)
    good post processing interface
         plot any node voltage or current and measurement result
         against any other node V or I and parameter
         histogram, or statistical plots

    and the list could go on if I didn't want to go home...

Anybody want to contribute to the list, or some more specifics on how to
go about some of these items?

Arpad Muranyi
Intel Corporation

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