RE: [SI-LIST] : receiver jitter

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From: Marc Humphreys (mhumphreys@nexabit.com)
Date: Tue Jan 18 2000 - 06:50:02 PST


From a board level SI standpoint I have to disagree with Chris's
 "SPICE or nothing" argument. All I need to do is
quantify and qualify the signal at the input pins to the receiver.
With a few additional AC and DC specifications
like max CM noise and jitter tolerance for example, I should be able to
determine
whether my signals meet the requirements of the receiving
device for proper operation. If I meet the signaling requirements
then the vendor should guarantee their device will function properly.

For such simulations anyway it is not how the devices are modeled
as much a how the transmission lines are simulated. The approaches
can be common to both "behavioral' and SPICE simulators.

Simulating the functionality of a reciever is something I hope
is taken care of well before we design with the part, and the signaling
requirements to make it work should be quantifiable. and documented
with the part spec.

Marc
> -----Original Message-----
> From: Chris Cheng [SMTP:hycheng@3pardata.com]
> Sent: Monday, January 17, 2000 7:51 PM
> To: si-list@silab.eng.sun.com
> Subject: [SI-LIST] : receiver jitter
> Importance: High
>
> as core and signal swing getting smaller and smaller, this
> problem is getting worst. compound this with source sync
> buses where the strobes and data can behave differently
> (true differential vs. pseudo differential), i believe
> predicting the response of the receiver under different
> waveforms input will be as important as simulating
> the propagation of signal in the interconnect
> environment. this will be the final nail in the coffin for
> behavioral models like ibis which is totally incapable of
> handling such analysis. i have seen pitiful attempts to
> qualitatively describe it in ring back or edge rate
> extrapolation but without the ability to simulate the
> receiver behavior, those specs are just fancy words with
> no meaningful insight into the response of the true
> receiver.
> can i spell SPICE again.
> chris
>
>
> -----Original Message-----
> From: owner-si-list@silab.eng.sun.com
> [mailto:owner-si-list@silab.eng.sun.com]On Behalf Of
> Raymond.Leung@qsa.idt.com
> Sent: Monday, January 17, 2000 2:57 PM
> To: si-list@silab.eng.sun.com
> Subject: Re: [SI-LIST] : High Speed Backplane Connector Recommendations
>
>
> Bruce,
>
> It is not long ago, sometime before last Chrstimas to early this year.
> I remember I read a couple of D.C.'s messages about the jitter discussion
> after my holiday. Unfortunately I cannot remember the subject titles.
>
> As what I can recall, he has said something about the jitter generated by
> the change of the gain at different common mode levels. My case would
> be different because jitter was caused by the degradation of CMRR
> at high frequency. My apology D.C. if my memory betrays me.
>
> Regards,
> Raymond
> ---------------------- Forwarded by Raymond Leung/QSA/AU on 18/01/2000
> 08:33
> ---------------------------
>
>
> "Bruce W. Marler" <BMarler@WooshCom.com> on 18/01/2000 01:45:56
>
> Please respond to si-list@silab.eng.sun.com
>
> To: si-list@silab.eng.sun.com
> cc: (bcc: Raymond Leung/QSA/AU)
>
> Subject: Re: [SI-LIST] : High Speed Backplane Connector Recommendations
>
>
>
> Raymond,
> Do you know the subject wording on the thread on this forum where "D.C.
> complained
> about the output signal edge jitter caused by the wide common mode
> variation
> at the differential inputs."?
>
> I would like to go back and read that thread.
> Bruce
>
> ----- Original Message -----
> From: <Raymond.Leung@qsa.idt.com>
> To: <si-list@silab.eng.sun.com>
> Sent: Sunday, January 16, 2000 5:21 PM
> Subject: Re: [SI-LIST] : High Speed Backplane Connector Recommendations
>
>
> > While I have no comment about the coplannar waveguide as
> > well as the orginal connector discussions, I would like to say
> > something about the LVDS receiver. As mentioned before, the
> > CMRR can never be ideal in high freq. D.C. has already complained
> > in this forum about the output signal edge jitter caused by the wide
> > common mode variation at the differential inputs, and I have a
> > similar headache. Supressing the high freq. ac common mode
> > is definitely a merit for reliable data recovery.
> >
> > Regards,
> > Raymond
> >
> >
>
>
>
>
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