Re: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI)

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From: Matt (boomer) Russell (boomer@lsil.com)
Date: Mon Jan 10 2000 - 11:20:34 PST


Hi,

just a comment, usually if this is a problem it is because it
violates long term reliability specs and will not really
be seen as an immediate failure.

Usually it would be a violation of
1) electromigration limits
2) gate oxide overstress limits (maybe).

Another issue is a fuzy one that is hard to
nail down and hard to quantify, and that is the
impact of noise injection into the chip supplies.
THis can be very design dependant and may only hit
at certain process corners and conditions. It could
cause timing violations or pll jitter, etc.

matt

Tom Dagostino wrote:
>
> We've measured 10's of thousands of I/O buffers to make models around here.
> Our internal spec is to push to part to at least 1 volt past the rail or at
> least 100 ma of current. In most cases we exceed these internal specs. It
> is rare that this causes any problems in the parts under test and in the
> cases where it has happened it seemed to be generic to a particular
> manufacturer's process. I cannot say what will happen over time from
> continous abuse like this. If you are seeing lots of failures then you are
> really putting more current into your devices than you may think.
>
> Tom Dagostino
> ICX Modeling Group
> tom_dagostino@mentor.com
> 503-685-1613
>
> -----Original Message-----
> From: owner-si-list@silab.eng.sun.com
> [mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Bradley S Henson
> Sent: Monday, January 10, 2000 8:02 AM
> To: si-list@silab.eng.sun.com
> Subject: Re: [SI-LIST] : Clamp diodes in models (was Input switching
> threshold & CPCI)
>
> Andrew,
>
> Please be carefull about "fixing" a model the vendor warns doesn't tolerate
> forward biasing of the "clamp diodes". While I agree that this sounds
> ridiculous, I have seen several parts from different vendors that suffered
> anomolous operation with very modest amount of over/undershoot. I found this
> on
> parts the vendors didn't warn about not tolerating overshoot. If a vendor
> explicitly warns you about this, you should investigate the robustness of
> their
> design, redesign to control the overshoot, or consider another part
> supplier.
>
> Good luck,
>
> Brad Henson, Raytheon
>
> "Ingraham, Andrew" <Andrew.Ingraham@compaq.com> on 01/08/2000 08:23:33 PM
>
> Please respond to si-list@silab.eng.sun.com
>
> To: "'si-list@silab.eng.sun.com'"
> <si-list@silab.eng.sun.com>
>
> cc: (bcc: Bradley S Henson/RWS/Raytheon/US)
>
> Subject: [SI-LIST] : Clamp diodes in models (was Input
> switching threshold & CPCI)
>
> Abe Riazi wrote:
>
> > This is interesting and I would like to share related thoughts and
> >experience. I have also received from some vendors behavioral models
> >which lacked POWER or GND clamp sections, in contradiction to the Bus
> >requirements or the actual device.
> >
> > Of course, this type of model defect is undesirable and requires
> >correction, as it can produce simulation results with invalid positive
> >or negative overshoot.
>
> I also have been given simulation models that lacked overshoot clamp
> characteristics. When queried, the IC vendor said that the signals at his
> chip's pins should *never* go even a bit below ground nor above Vdd, so it
> shouldn't matter to our simulations. Right!
>
> Many of us have also seen models with incredibly steep clamp diode curves.
> I don't know which is worse.
>
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