Re: [SI-LIST] : Fast edges with limited plane capacitance

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From: MikonCons@aol.com
Date: Sat Mar 18 2000 - 12:25:58 PST


In a message dated 3/17/00 1:36:58 PM Pacific Standard Time,
Larry.Smith@Eng.Sun.COM writes:

<< Do we get more radiated emissions from:
 
    a) noisy power planes and structures connected to noisy
       power planes?
       
    b) microstrip transmission lines that are exposed to air
       dielectric somewhere above?>>

I have observed BOTH cases as primary culprits.

For mitigation of case (a), I use the chassis grounded edge traces technique
(on all layers) with a moat to the signal ground and a recessed power plane.
The signal ground is of course extended to all I/O ports and any shielded
cables use the outer chassis-grounded ring traces for shield terminations.
The power and ground planes are bypassed heavily immediately at each I/O port
to provide an efficient reflection of power plane noise back into the printed
circuit board (PCB). Bypassing is also applied all around the periphery of
the PCB to minimize edge radiations. The edge radiation leakage is further
reduced by the capturing ability of the chassis ground rings. Moat/Bridge
techniques are also judiciously used on the interior of the PCB to isolate
and locally suppress power plane noise. High-speed signal traces are not
allowed to cross split planes UNLESS they are routed in CLOSER proximity to
an uncut ground plane (i.e., the uncut plane must be the primary carrier of
the signal's return current). I also recommend asymmetrical
plane/signal/signal/plane stackup to better isolate signal layers AND to
achieve the closer proximity noted above.

For case (b), approximately 25% of my clients have failed EMI limits because
of coupling from one PCB's surface trace radiation that coupled into one or
more daughter cards (even on the far side of the enclosure). How nicely the
old wire loop (even as microstrip) both radiates and receives RF efficiently!
 I have used a 3/8-inch diameter loop as the only coupling pickup for the 30
MHz intermediate frequency of an S-Band receiver. Anyone who thinks a well
sealed enclosure (alone) will assure EMI compliance is in for some sad news
in a multi-PCB system. It's the weakest link that will get you, so don't
count on all PCB designs to be non-susceptible. And what if EACH PCB
designer thought that his surface trace radiation could be suppressed by the
enclosure designer???? Not to be an old fogey, but.... The best place to
suppress EMI generation is at the source. (Ever heard that phrase before?)
*************

 <<For most of the projects I work on, this discussion is a moot point.
 By jumping to an 8 (or more) layer board, you can have the best of
 both worlds.
 
    s-G-s-s-P-s compromises power plane impedance.
    
    s-s-G-P-s-s compromises shielding.
    
    s-G-P-s-s-G-P-s gives good power plane capacitance and shielding.
                Compromises cost. No free lunch... >>

I absolutely agree! I noted in an earlier response to this thread that the
use of G-P sandwiches in place of BOTH the power and ground planes is the
superior approach for maximum design margin.

Michael L. Conn
Owner/Principal Consultant
Mikon Consulting

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