From: Larry Smith ([email protected])
Date: Mon Apr 03 2000 - 10:00:04 PDT
Andy - This is a good explaination that shows a clear understanding
of return currents. As we go to wider and wider busses, with low
signal swing and low noise margin, I believe that it will be very
important to account for these return currents in our simulations and
designs. See one further note in the text.
> From: "Ingraham, Andrew" <[email protected]>
> To: "'[email protected]'" <[email protected]>
> Subject: RE: [SI-LIST] : Return path for stripline, two ground planes or o ne
power and one ground?
> Date: Sun, 2 Apr 2000 20:06:00 -0400
> >My question is which configuration is the best for the return path --
> >1. One power and one ground plane, or
> >2. Two ground planes with plenty of bypass cap. or
> It is almost impossible to avoid return currents going through bypass caps,
> or spreading out through the board's internal capacitance.
> But there are a few special cases.
> If the driver is open-drain or open-collector, then ~all the switching
> current through the output transistor goes through the driver IC's ground
> pins and ~none through its power pins. In that case, using stripline
> between two ground planes would allow the most direct path from return
> currents in the planes, through ground pins, to the switching transistor.
> In theory, you wouldn't even need bypass caps at this IC because no
> switching current due to the output transistor would ever flow through it.
> But the IC also has internal switching noise that does need a bypass cap.
> (Also note the opposite situation exists at the pull-up at the far end of
> the line; bypass caps are essential there unless the signal trace was
> between power planes.)
> If the driver is PECL, then ~all the switching current goes through the IC's
> power (+Vcc) pins and ~none through the ground (-Vee) pins. In that case,
> stripline between two power planes would be best. (Or with normal ECL, use
> stripline between two ground planes. That's why ECL used a negative
> With a push-pull driver, you will get different currents through the
> driver's power and ground pins depending on whether it switches low-to-high
> or high-to-low, and depending on the load and the previous voltage.
> One special case is when the driver is symmetrical, and the load is
> terminated on the far end to Vdd/2. Let's say it's a 3.3V CMOS driver and
> it drives 50 ohm traces. A full rail-rail output would switch 66mA through
> the signal pin. If terminated to Vdd/2, half of this delta-I, or 33mA, is
> from the power pin and the other half is from the ground pin (one going from
> 0mA to 33mA, the other going from -33mA to 0mA, or vice-versa).
> In this case, physically symmetrical stripline between power and ground
> planes would be best, because the return currents (which are equal in the
> two planes) would match the switching currents in the driver IC's power AND
> ground pins. In theory, no switching current would flow through bypass
At the driver IC, the transient current tries to go through one power
rail or the other. For a high to low transition, current comes into
the chip from the signal line and exits through the chip ground pin.
For a low to high transition, current comes in through the chip power
pin and exits through the signal pin. This is the case unless there is
significant decoupling capacitance on the chip. On-chip capacitance
tends to put the power and ground inductors in parallel (AC ground) so
that current can go in and out of both paths for either transition.
You are correct in saying that current travels on both the power and
ground planes in a stripline configureation (power/signal/ground
stackup). Decoupling capacitance is required at both the driver and
receiver ends to make this happen. If nothing else, displacement
current goes through the parallel plate capacitance between the power
and ground plane, causing plane bounce.
> Driving a push-pull output into a terminating pull-up resistor, looks like
> the first case above, because the P-channel or pull-up transistor switches
> "no" current and might as well not be there. Well, at least in principle,
> if you look at only the transistors driving the trace and load and there are
> no parasitics to contend with, no crossover current, etc.
> An unterminated push-pull output tends to have a transient current through
> ~only its power pins for the low-to-high edge, and ~only its ground pins for
> the high-to-low edge. There is no way to marry this to stripline and avoid
> currents through bypass caps. Stripline between power and ground planes is
> a good compromise, since half of the return path is direct.
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