RE: [SI-LIST] : via capacitance

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From: Dan Swanson (dswanson@bartleyrf.com)
Date: Mon Apr 03 2000 - 04:57:18 PDT


Dear Sunil,

1. I don't think there is a formula for capacitance or
    inductance for this situation.

2. It's the wrong question. I believe the question should
    be: "Is it possible to get a controlled impedance transition
    between these to layers with good return loss out
    to some specified frequency?"

3. The answer is yes. But I only know how to design these
     things on a case by case basis using a field-solver.

4. In general you are doing the right things, removing unused
     pads. The antipads may need to be bigger than you are
     used to. The actual transition region probably suffers from
     excess capacitance, so "tuning" it by narrowing down the
     signal traces for a short distance on either side sometimes
     helps.

Dan

Dan Swanson EMAIL: d.swanson@ieee.org
Bartley R.F. Systems TEL: (978) 241-1091
38 Water Street FAX: (978) 388-7077
Amesbury, MA 01913

-----Original Message-----
From: Sunil Kumar [SMTP:sunilb@cdotb.ernet.in]
Sent: Friday, March 31, 2000 12:34 AM
To: si-list@silab.eng.sun.com
Subject: [SI-LIST] : via capacitance

Dear all SI experts.

I am using a multilayer board having the following stack-up:

LAYER1 TOP LAYER (CONDUCTOR)
LAYER2 GND
LAYER3 CONDUCTOR
LAYER4 CONDUCTOR
LAYER5 VCC
LAYER6 GND
LAYER7 CONDUCTOR
LAYER8 CONDUCTOR
LAYER9 GND
LAYER10 BOTTOM LAYER (CONDUCTOR)

A signal trace is going from layer7 to layer8. A through-hole via is used.
The via is having pads on layers 1,7,8,10. There are antipads on the power
planes. Is there any formula/tools to calculate the exact capacitance of
the via?? How can I measure it in the board??

Sunil Kumar
Research Engineer
C-DOT
INDIA

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