Re: [SI-LIST] : Fast edges with limited plane capacitance

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From: Larry Smith ([email protected])
Date: Fri Mar 17 2000 - 13:18:37 PST


Ron - see comments in text.

> Date: Fri, 17 Mar 2000 11:13:44 -0800
> From: Ron Miller <[email protected]>
>
> Larry
>
> I have some issues as follows
>
> >
> > So, if we compare the two power plane pairs below with 4 and 40 mil
> > separations:
> >
> > The velocities are constant.
> >
> > The capacitance of the 4 mil planes is 10X the 40 mil plane.
>
> Capacitance as you mentioned above is proportional to the inverse of the
> square of the distance making 4 mils 100 X the 40 mil plane.

Capacitance between two point sources is proportional to the inverse of
the square of the distance. But the capacitance between two parallel
plates of a capacitor is proportional to the thickness of the
dielectric (neglecting the fringe field). This happens as you
integrate over the surface of point charges.

> > The inductance of the 40 mil plane is 10X the 4 mil plane.
>
> The inductance does not change with dielectric thickness. In fact if you
> look at a smith chart you will note that the low impedance outside circles
> tend to approximate the outer circle as you go out. The outside circle
> follows the electrical length and cannot be made larger then the length
> of the line. This is a limit.

I'm not sure about the Smith Chart argument, but the inductance between
planes definitely goes down as the dielectric gets thinner. Remember
the good old equation:

        velocity = 1/sqrt(LC) ?
        
The velocity is constant and the capacitance goes up as the dielectric
between planes gets thinner. Therefor, inductance must go down.

regards,
Larry Smith
Sun Microsystems

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