RE: [SI-LIST] : IBIS question regards [Falling Waveform] / [Risin g Waveform].

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From: Peters, Stephen (stephen.peters@intel.com)
Date: Tue Apr 11 2000 - 15:13:42 PDT


Merav wrote:

>
> My question regards: [Falling Waveform] / [Rising Waveform].
>
> Our I/O buffer, output stage, contains the following structure:
> <<...>>
> while performing a rising transient on the pad , the ndrv signal
> "brakes" before the pdrv "mates".
> This cause a strange wave on the pad while simulating a [Rising
> Waveform] with R_fixture (resistor) connected to Vcc:
> The PAD begin to rise and even get to almost full swing
> before the Pmos opens. This cause a steepest slope of the [Rising
> Waveform] while simulating R_fixture connected to ground rather than
> R_fixture connected to Vcc .
>
> Waves forms:
> <<...>>
>
> Is this kind of wave is "harmful" to the IBIS model users?
> should I omit
> it,
> and leave only the [Rising Waveform] with resistor connected
> to ground ?
>
> Thanks,
> Merav.
>

No, you should not. In fact, the kind of behavior you describe is exactly
what the four waveform method shown in the IBIS cookbook

  http://www.eda.org/pub/ibis/wip/ckbkwfw3.doc

is designed to show. Please refer to the cookbook for more details.

  Regards,
  Stephen Peters
  Intel Corp.

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