Re: [SI-LIST] : Fast edges with limited plane capacitance

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From: Paul Thompson ([email protected])
Date: Fri Mar 17 2000 - 15:11:23 PST

>I vote for the s-s-G-P-s-s stackup. Not only does it have better
>capacitance properties, but it also has better inductance and impedance
>properties. SI and EMI noise are greatly reduced. Microstrip
>transmission lines work just fine.

How do people route these boards? It seems like you end up with two
"good" layers (albeit each referenced to a different plane), and two
"bad" layers (higher crosstalk and impedance). In the designs I've
done, the majority of the signals have similar edge rates, so trying
to put all the "critical" signals on only two layers doesn't work.
I've also found that adding lots of constraints is a good way to
bring the autorouter to its knees, so choosing a stackup which allows
fewer constraints for the same performance can be a big win.



Paul Thompson                                        [email protected]
System Integrator, Macintosh Desktop Systems         Apple Computer

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