RE: [SI-LIST] : 10 layer board stackup

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From: Johns Daniel (jdaniel@systranfederal.com)
Date: Fri Jan 21 2000 - 10:48:24 PST


This might be a dumb question -- I am just a computer engineer who is forced
out of necessity to deal with issues such as stackup!

In general, for SI considerations, why isn't the following a better stackup?

 sig top
 grd
 internal 1
 pwr (3V)
 pwr (5V, except for 12V/48V in one corner)
 internal 2
 grd
 sig bottom

Does it not seem like a hypothetical example?! ;~)

Thanks!

-- Johns

> -----Original Message-----
> I presently have an 8 layer board as follows:
>
> sig top
> grd
> pwr
> internal 1
> internal 2
> pwr
> grd
> sig bottom
>

========================================================
Johns Daniel, Sr. Engineer jdaniel@systranfederal.com
(937) 429-9008 x365 Fax (937) 429-9461
Systran Federal Corp 4027 Colonel Glenn Highway
Suite 210 Dayton, OH 45431-1672, USA

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