**From:** Doug Brooks (*[email protected]*)

**Date:** Mon Feb 21 2000 - 15:12:59 PST

**Next message:**Doug McKean: "Re: [SI-LIST] : Stack up"**Previous message:**Scott McMorrow: "Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation"

About three weeks ago I called everyone's attention to an article we had

written about ESR and Bypass Cap selection. After considerable discussion,

the concensus was that the statements I made about the subject were accurate.

But I have subsequently realized that there were TWO IMPORTANT CONSEQUENCES

of what I had developed that I had NOT included in the paper. These came

clear when we added a graphical output to the calculator (the single most

requested update to it!)

(The paper has been updated with these two conclusions, graphical

illustrations and some additional examples.

http://www.ultracad.com and follow link)

Consequence 1.

I had said that the condition for a (almost) flat impedance response curve

is that, at the anti-resonant frequencies, the following relationship hold

true:

ESR = -X1 = X2

where X1 and X2 are the reactance terms of the (in this case) two parallel

capacitors.

What I did NOT expand on is that, this being the case:

If ESR goes down, then

X1 and X2 must also go down, and

therefore the self resonant frequencies of the two capacitors must move

closer,

therefore more capacitors must be used to cover a given frequency range!

That is: The lower is ESR, the more bypass capacitors are required to

achieve a given impedance response with frequency.

This point is developed and demonstrated in the revised Appendix 4.

Consequence 2.

Another point made in the paper is that the minimum impedance is less than

ESR for all practical cases. A point NOT made originally, is:

As the self resonant points of the parallel capacitors get closer together,

without changing ESR, the minimum impedance value decreases. Revised

Appendix 3 in the paper illustrates the case of 100 bypass caps with

self-resonant frequencies spread over the range of 5 to 500 MHz. The

impedance response is quite good over this range. But when the number of

capacitors is increased to 150, the impedance curve is lower AT EVERY

FREQUENCY then the 100 cap curve. That is --- the MAXIMUM impedance for the

150 caps is LESS than the MINIMUM impedance for the 100 caps! The 200

capacitor curve is lower EVERYWHERE then the 150 cap curve! (See Revised

Appendix 3)

It was noted, correctly, that this kind of analysis cannot take into

consideration the PLACEMENT of capacitors across the board. It takes a

finite amount of time for charge to propagate between locations on a board.

So, even though there may be the appearance of sufficient capacitance

available, in fact, charge may not be able to get where needed in time. For

a simplified discussion of this point, see my column in the January issue

of PC Design ("A One-Answer Quiz"), reprinted on our web page under the

title "This Month's Quiz."

Our calculator has been upgraded to include the graphical capability.

Existing licenses will still work with the new upgrade.

Doug Brooks

.

************************************************************

See our updated message re in-house seminars on our web page

.

Doug Brooks, President [email protected]

UltraCAD Design, Inc. http://www.ultracad.com

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**Next message:**Doug McKean: "Re: [SI-LIST] : Stack up"**Previous message:**Scott McMorrow: "Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation"

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