From: Gerald Johnson (email@example.com)
Date: Mon Mar 13 2000 - 10:53:19 PST
>From: Doug Brooks <firstname.lastname@example.org>
>Subject: Re: [SI-LIST] : trace width for clock routing- wider/narrower?
>Assuming you ARE controlling for impedance and crosstalk, trace width is
>not an issue UNLESS there is a power (trace heating) issue. Absent that,
>width is not an issue.
UNLESS, of course you're dealing with fast clocks where
the high frequency line losses (not DC heating) become
important. I've routed clocks on very wide lines specifically
to keep the edge rates from rolling off due to skin effect.
These were faster than "normal" clocks (up to 1.2 GHz) with
GaAs drivers. Again points out the problems of a "rule of
thumb". One persons clock frequency is not another persons
clock frequency. As usual it all depends on the details.
Senior Staff Engineer
**** To unsubscribe from si-list or si-list-digest: send e-mail to email@example.com. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Thu Apr 20 2000 - 11:35:33 PDT