From: Doug McKean ([email protected])
Date: Mon Feb 21 2000 - 15:51:40 PST
Personally, Iulian, I'd swap your 1.8V and
GND layers. Then, make sure all signals
layers are referenced to a Gnd layer.
Can't say it's absolutely imperative.
Regards, Doug McKean
Iulian Ungureanu wrote:
> I'm listening to this list for some time now and I would like to ask your
> opinion on a stack-up I'm working on.
> It is a board with 4x64 pairs of LVDS signals, 77.76 MHz clock, high
> speed(777.6 Hb/s).
> I came up with a 14 layers that looks like that:
> Signal top fanout, some analog power
> Sig1 LVDS
> Sig2 LVDS
> Sig3 LVDS
> Sig4 LVDS
> Sig5 LVDS
> Sig6 PECL clocks
> Signal bottom fanout
> I'll be using 1.6 mil core for my high speed cap.
> I would gladly use less layers, but I'm being forced by the HS3
> I would really appreciate your opinion.
> Iulian Ungureanu
> PCB Designer
> [email protected]
> Voice:(604)415-6053 Ext.2586
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