RE: [SI-LIST] : Input switching threshold & CPCI

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From: Ingraham, Andrew ([email protected])
Date: Thu Jan 06 2000 - 08:21:08 PST

> I have seen the 0.8, 2.0 V threshold problem in models that the
>vendor had clearly indicated for PCI Bus simulation at 33 MHz/66MHz, 3.3
>V signaling. However, the example that I used in my post belonged to a
>model obtained from the internet. I was led to think that this model
>is suitable for 3.3 signaling from the following section of the model:
> Notes] The following information corresponds to the 3.3 volt
> 80960RN processor in the 540 Lead PLGA package.
> However, it is quite possible that this particular example should be
>regarded as a 5V compatible 3.3 V model as you had mentioned.
It also wouldn't surprise me if this part was marketed for "33MHz/66MHz,
3.3V signaling." Some vendors clearly don't understand the specs and market
their components incorrectly. Even more don't understand IBIS and release
garbage models.

I have seen parts marketed for 3.3V signaling that didn't have the
_mandatory_ clamp diodes to 3.3V. There was a discussion a while ago about
one such vendor's parts on the PCI SIG maillist, and how the vendor defended
their non-compliance with the PCI spec, yet pretended to be fully compliant.

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