RE: [SI-LIST] : **error**: internal timestep too small

About this list Date view Thread view Subject view Author view

From: Muranyi, Arpad ([email protected])
Date: Thu Jan 20 2000 - 08:54:39 PST


Kim and all,

You can add a few more items to your bag:

1) Increase RELV, and/or RELI if it doesn't hurt your accuracy needs.
2) Use .IC to initialize nodes. Nodes that are (almost) floating
   can solve to about anything and setting them to something helps
   a great deal.
3) I observed this with the U-element in HSPICE (anyone still using
   it?). If you connect more than two of them to the same node it
   will blow up (with kVolt differences on the two ends of the same
   element). However, a small resistor (yes, resistor) between the
   U-elements and the common joint will allow it to converge. Anyone
   knows why?

Arpad Muranyi
Intel Corporation
=====================================================================

Kim Helliwell wrote:

The more standard approach (I'm going to give away my bag of tricks,
now!) is first: check all model and device parameters for physically
ludicrous values. For example, setting the diode parameter N to
.001 could cause convergence problems for any temperature other
than the default. But some macromodel developers have been known
to do that!

Then: increase the per-timestep iteration limit (ITL4) to
50 or 100 or more. Then increase RELTOL until just before it hurts.
Increasing ABSTOL might also be helpful in some cases.
If none of this solves the problem, consider using a modern simulator.
(Hint: Not Berkeley SPICE 3.)

Another dodge is to essentially prevent matrix reordering
by setting PIVREL to 1 (or maybe .9). I've gotten that to
work, but it's a truly desperate maneuver, since it has the
potential of vastly increasing computation times. Especially
in conjunction with ITL4=100, you could be in for a long
haul!

Berkeley SPICEs do a maneuver called BYPASS, which saves time
by fudging the calculation of the iterate quantities for each
device. Back when I was supporting simulators, I put in a
switch to turn off bypassing, and I've found that that solves
many timestep problems. I do not know whether this is available
in the current SPICE 3 from Berkeley. I don't know whether HSPICE
or PSPICE even does bypassing or not. But if I were designing
a simulator today, I would either not do bypassing or put in
a switch to allow it, but have the default be OFF. I think it
hurts more than it helps.

-- 
Kim Helliwell
Senior CAE Engineer
Acuson Corporation
Phone: 650 694 5030  FAX: 650 943 7260

**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****

**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu ****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Thu Apr 20 2000 - 11:34:45 PDT