From: Knighten, Jim L ([email protected])
Date: Thu Mar 30 2000 - 13:59:16 PST
John,
You have put your finger on one of the negative features of this book - -
rules without any backup or guidance as to the physics behind it. Not very
helpful advice, is it?
Jim
________________________________________________________
Dr. Jim Knighten e-mail: [email protected]
<[email protected]>
Technical Consultant - Design
NCR
17095 Via del Campo
San Diego, CA 92127 http://www.ncr.com <http://www.ncr.com>
Tel: 858-485-2537
Fax: 858-485-3788
-----Original Message-----
From: [email protected] [mailto:[email protected]]
Sent: Thursday, March 30, 2000 5:06 AM
To: [email protected]
Subject: [SI-LIST] : 20-H Rule and Self-Resonant
Frequency of Power Planes
SI-LIST'ers,
Page 54 of Mark I. Montrose's book "Printed Circuit Board
Design Techniques for
EMC Compliance" (IEEE Press, 1996) has the following
statement:
" Many multilayer PCBs generally have a self-resonant
frequency between 200 and
400MHz. Use of the 20-H rule (see section 2.2) may increase
the self-resonant
frequency by a factor of 2 to 3."
No where else have I found a mention of this effect.
Following the 20-H rule
on a board with 0.010" spacing between layers would amount
to making the power
plane 0.4" smaller in length and width than the ground
plane. I don't see how
such a small change in dimensions could cause such a huge
reduction in
inductance*capacitance that the second sentence suggests.
Or could there be
some kind of impedance matching because of the difference in
the fringe fields
at the edge of the power planes?
Have any of you observed this effect, in measuring actual
boards or in
modelling? Thanks!
John
Barnes Advisory
Engineer
Lexmark
International
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