[SI-LIST] : Board simulations, what should it include?

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From: Yehuda D. Yizraeli ([email protected])
Date: Tue Mar 14 2000 - 09:24:35 PST

Hi,

        I am trying to simulate a chip driving an SRAM and a flash memory. My chip
is modeled with its output buffer, a trace to the SDRAM (modeled as
transmition line), then the SDRAM is modeled with lumped capacitor, series
matching resistor, another transmition line and the flash chip.

1) Do I model it correctly?
2) Should I add to the loading chips the inductance of the package OR timing
simulation should use package load as capacitor only (for the driver chip I
had added package inductor and resistor).
3) Whats the appropriate transmition line model ishould use in HSPICE
4) Any other comments/suggestions?

                                        thanks in advance, yehuda

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