Re: [SI-LIST] : Adding inductors to ground?

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From: bgrossma (bgrossma@td2cad.intel.com)
Date: Thu Mar 02 2000 - 11:41:17 PST


Chris,

You don't provide any details on your application, so I apologize if my
response is not worth anything to you.

In our designs (wafer sort interfaces) we used to apply an inductor
between the PLL_gnd and VSS because the metrology tool that tested our
cards required a DC path for basic continuity measurements. If we left
the PLL_gnd pad floating (only connected through decoupling to VCC)
there wasn't a good enough path to measure. In our case, not an issue of
a good or bad design, but a simple and functional fix to ensure our
cards don't damage die.

As I mentioned, may not be worthwhile due to our very specific
application. But take it for what it is worth.

Regards,

-Brett

Chris Bobek wrote:
>
> Hi,
>
> I came across a schematic that shows the PLL ground of an IC connected
> to ground through an inductor. The Vcc pin of the device is connected
> to a bunch of caps and an inductor to Vcc.
>
> I understand and have used an inductor (or a resistor) with a bunch of
> decoupling caps on Vcc for applications like this. But, I've always
> tied the Gnd pin(s) directly to ground. It doesn't make any sense to me
> why you would want to add inductance in the path of any ground. It
> seems you would just add switching noise to your device.
>
> Can somebody explain whether this is common practice, or whether it was
> a poor design (sorry I don't have more information on the particular
> device).
>
> Thanks,
>
> Chris
>
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