Re: [SI-LIST] : ESR and bypass caps

About this list Date view Thread view Subject view Author view

From: Ray Anderson (raymonda@radium.eng.sun.com)
Date: Wed Jan 12 2000 - 15:54:46 PST


DougS-

        You are correct, the simulation shown in Larry's spice
deck is missing some key ingredients. But that is by design,
not by omission.

        He has provided what we call a single-node analysis.
All the capacitors are connected between ground and a single
node as you have observed. We use this simple topology as a
first step in our decoupling methodology to choose the proper
mix of capacitors at frequencies below those where the plane
resonance becomes an important factor. We find the single node
analysis to be quite useful in establishing a good first cut
of the values and numbers of caps required to meet our calculated
target impedance.

        As a second step, after we have achieved an acceptable composite impedance
profile as a result of the single-node analysis, we move on to a multi-node
analysis. I believe this is what you have suggested. Our multi-node analysis
applies the capacitors determined in the single-node analysis to a plane model
consisting of an array of orthogonal transmission lines and other parts that
provide an accurate plane model that incorporates copper, skin effect, and
dielectric losses. By running the multi-node analysis we can fine tune the
spatial placement of the caps on the plane and add or delete caps as required
to arrive at a final decoupling solution that spans from 10's of KHz up to a
couple of GHz.

        Larry provided the single-node analysis model for comparison
with DougB's closed form solution. A multi-node analysis compared to
the closed form solution would be comparing apples and oranges so to
speak. A closed for solution for the multi-node problem would be
prohibitively complex.

        I'd like to show you our 2-D transmission line plane
model, but alas, lawyers, proprietary IP and the like.....

-Ray

> Hi All,
>
> I think the simulation below is missing some key ingredients, the
> variable
> time delay between the capacitors representing their spacing on the
> board
> and loading of the devices. I see below caps connected between vdd and
> 0.
> I have observed that devices lower the Q of the whole structure.
>
> The ground and power planes look to me like a 2 dimensional
> transmission
> line with random hi-Z and lo-Z connections. A simple simulation of
> caps
> in parallel may not give a useful answer unless the caps are right
> next
> to each other. I would like to see the spice model of the 2
> dimensional
> transmission line modeled to a few GHz. (lots of elements!!)
>
> DougS
>

**** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Thu Apr 20 2000 - 11:35:00 PDT