RE: [SI-LIST] : Reflections on clock line

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From: Harris, George (George.Harris@compaq.com)
Date: Wed Apr 05 2000 - 13:06:33 PDT


Hi Tham,

You didn't say whether your 8 loads are distributed along the 20-inch length
of the supply line or are concentrated in a small area. If the latter is
true, then you could bring the main trunk to a central point and run equal
length stubs to each of the loads. The stubs would have to very "short" (1"
or so in your case) and it would need to be simulated before you commit to
this arrangement. The waveform won't be perfect. Make sure that you don't
have reflections on either the rising or the falling edge of the clock --
clock consumers may treat a falling-edge reflection as another clock with
unpleasant consequences.

I am assuming that your loads are distributed over most of the 20-in length.
Daisy chain certainly won't work, as you found out. You need a clock
repeater with at least 8 outputs. There are a lot of such devices around.
Then from each output you should run a single line to individual loads with
a series-terminating resistor near each driver pin. The value of the
resistor plus the series resistance of the driver should equal line
impedance. If you pick a reasonably strong driver you could get away with
driving 2 loads from each pin, through two individual series resistors,
through equal-length lines.

Since you don't seem to be concerned about the clocks arriving at the loads
at the same time I am assuming that it doesn't matter in your design, but
you should check that. If it does matter (and I believe it must) then all
lines to the loads must be of equal length and you need to consider driver
to driver skew.

If the clock source is on another board and your clock has to be in-phase
with that master clock, then you'll need a PLL to produce an essentially
zero-delay clock buffer. Skew between the PLL outputs may still be an issue.

I also strongly recommend simulation.

-George
George Harris
Tel: 508-467-8893
george.harris@compaq.com
COMPAQ Computer Corporation

-----Original Message-----
From: Tham Kok Tong [mailto:tham@uti2000.co.jp]
Sent: Wednesday, April 05, 2000 2:15 PM
To: si-list@silab.eng.sun.com
Subject: [SI-LIST] : Reflections on clock line

Hi,

I have a 20in long 50MHz clock line which connected to 8 loads(5.5pF per
load). (Vcc=3.3)
I used daisy-chain to connect all loads but the waveform of the nearest
receiver (respective to the driver) only swing between 1V and 2V. The
waveform of the furthest receiver overshoot above 4V.
I think reflection is the main reason and I had put an end termination
but
there is no improvement for the nearest receiver waveform.
Anybody have any ideal to solve this problem?
I appreciate any advice or suggestions.

Thanks.

Regards,
KT.THAM

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