From: Stephanie Goedecke (firstname.lastname@example.org)
Date: Mon Jan 10 2000 - 10:57:22 PST
My experience is that your concerns can be real and depend mostly
on the distances and edge rates involved. For your top signal,
the "some impedance mismatch" can degrade the signal fatally,
depending on the particular set-up. If you have this situation in
a real layout, I suggest you do a signal analysis on the board
before you have the board built.
How relevant is this theory to actual PCB design? I don't know.
How relevant is it if your board works?
From: Heiko Dudek [mailto:email@example.com]
Sent: Wednesday, November 17, 1999 8:45 AM
Subject: [SI-LIST] : Signal traces without reference plane
since being involved in a discussion about "routing pcb traces while
partially no ground reference", I would love to get some other opinions.
assume a setup like this:
(Which you can get on systems with multiple GND / VCC potentials
GND Plane |
(<-Receiver) Signal Trace |
| | |
| | |
| | |
| | |
Second Signal Trace ||
Theoretically I would expect some differential mode EMI because of the
current loop the return current on the ground plane forms with the
Of course, there's some reflection on the signal trace because of the
impedance mismatch; additionally one should see some additional
inductance because of
the E field stretching (which goes along with H concentrating) serial to
signal trace. Finally, there might be some coupling into the second
The *BIG* question is, how relevant is this theory (if applicable at
actual PCB design ? What are your experiences on this ? How do you
(or better, avoid) this configuration while autorouting ? Do you care at
yes, what's the critical edge rate you have to start worrying) ?
Thank you very much,
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