From: Ingraham, Andrew (Andrew.Ingraham@compaq.com)
Date: Sat Jan 08 2000 - 20:23:33 PST
Abe Riazi wrote:
> This is interesting and I would like to share related thoughts and
>experience. I have also received from some vendors behavioral models
>which lacked POWER or GND clamp sections, in contradiction to the Bus
>requirements or the actual device.
> Of course, this type of model defect is undesirable and requires
>correction, as it can produce simulation results with invalid positive
>or negative overshoot.
I also have been given simulation models that lacked overshoot clamp
characteristics. When queried, the IC vendor said that the signals at his
chip's pins should *never* go even a bit below ground nor above Vdd, so it
shouldn't matter to our simulations. Right!
Many of us have also seen models with incredibly steep clamp diode curves.
I don't know which is worse.
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