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Starting: Wed 06 Dec 1995 - 11:37:40 PST
Ending: Sun 20 Jun 1999 - 03:56:60 PST
Messages: 2087

• Bob Ross
  • [SI-LIST] : EUROPE IBIS SUMMIT MEETING Fri, 10 Oct 1997 08:37:49 -0700 (PDT)
  • Re: IBIS 3.0 Tue, 8 Jul 1997 16:26:07 -0700 (PDT)
• Roy Leventhal
  • Re: [SI-LIST] : RE: MODEL CREATION Tue, 31 Mar 1998 16:52:20 -0500
  • [SI-LIST] : RE: MODEL CREATION Tue, 31 Mar 1998 09:45:36 -0500
  • Re: [SI-LIST] : power supply filtering and bypassing Thu, 5 Mar 1998 18:02:36 -0500
  • Re: [SI-LIST] : Diff measurements with VNA Wed, 25 Feb 1998 15:35:40 -0500
  • Re: [SI-LIST] : OFF TOPIC: Junk Mail and what to do with it Mon, 22 Dec 1997 12:53:15 -0500
  • [SI-LIST] : via/pad capacitance and resistance Mon, 22 Dec 1997 15:42:13 -0500
  • Re: [SI-LIST] : Flyback Transformer Model Mon, 22 Dec 1997 15:34:07 -0500
  • Re: [SI-LIST] : Evaluation of Vendor tools on SI list Thu, 11 Dec 1997 18:00:03 -0500
  • Re: [SI-LIST] : Embedded microstrip calculations, Ultracad Calculator Wed, 10 Dec 1997 13:07:37 -0500
  • [SI-LIST] : Virtual o-scope simulation models Wed, 10 Dec 1997 12:30:29 -0500
• (no name)
  • Message from mail server Fri, 5 Mar 1999 13:58:57 -0800 (PST)
• =?gb2312?B?wfXK97Hy?=
  • [SI-LIST] : A timing question in high speed bus Tue, 17 Nov 1998 11:16:46 +0800
• =?iso-8859-1?B?wfXK97Hy?=
  • RE: [SI-LIST] : A timing question in high speed bus Thu, 19 Nov 1998 11:17:00 +0800
  • [SI-LIST] : =?iso-8859-1?Q?=BB=D8=B8=B4:_=5BSI-LIST=5D_:_A_timing_question_in_hig?= Wed, 18 Nov 1998 09:58:55 +0800
• A. D. Shirpadaraj
  • Re: fwd: Re: [SI-LIST] : Does IBIS describe output transition which both Wed, 13 May 1998 13:29:49 +0531 (IST)
• Abe Riazi
  • RE: [SI-LIST] : Focusing on Parasitic Parameters Mon, 30 Nov 1998 19:17:14 -0800
  • RE: [SI-LIST] : Focusing on Parasitic Parameters Sun, 22 Nov 1998 18:57:18 -0800
  • [SI-LIST] : Focusing on Parasitic Parameters Thu, 19 Nov 1998 22:46:26 -0800
  • RE: [SI-LIST] : RE: RC terminations on multidrop busses Fri, 13 Nov 1998 10:20:19 -0800
  • RE: [SI-LIST] : RE: RC terminations on multidrop busses Fri, 13 Nov 1998 10:14:00 -0800
  • RE: [SI-LIST] : RC terminations on multidrop busses Thu, 12 Nov 1998 18:55:48 -0800
  • RE: [SI-LIST] : Schottky diode termination Tue, 27 Oct 1998 21:25:49 -0800
  • [SI-LIST] : RE: Schottky diode termination Mon, 26 Oct 1998 11:40:54 -0800
  • RE: [SI-LIST] : Selection of Optimum Termination Tue, 20 Oct 1998 14:58:06 -0700
  • RE: [SI-LIST] : Selection of Optimum Termination Tue, 20 Oct 1998 15:39:00 -0700
  • [SI-LIST] : Selection of Optimum Termination Mon, 19 Oct 1998 20:58:56 -0700
  • RE: [SI-LIST] : IBIS Model Verification Tue, 15 Sep 1998 22:22:43 -0700
  • [SI-LIST] : IBIS Model Verification Sat, 12 Sep 1998 09:15:13 -0700
  • [SI-LIST] : IBIS Model Verification Wed, 9 Sep 1998 11:21:48 -0700
• Adrian Lynam
  • [SI-LIST] : Simulating Tools Thu, 12 Nov 1998 18:52:01 GMT
• Adrianus Djohan
  • Re: [SI-LIST] : HSPICE to QUAD models Thu, 29 Jan 1998 00:09:20 -0500 (EST)
• Ahmed Omer
  • Call for Papers - IEEE ISIS'97 Thu, 6 Feb 1997 12:01:12 -0600
  • Re: Ground Plane Info Thu, 25 Jul 1996 15:38:31 -0500
  • CAD Engineer Position Fri, 17 May 1996 17:57:57 -0500
• ajmani@us.ibm.com
  • Re: [SI-LIST] : SI University programs Mon, 14 Dec 1998 12:01:22 -0700
• Al Barber
  • Re: [SI-LIST] : SI openings at Stratus else delete -- OBJECTIONS ... Thu, 12 Feb 1998 15:08:47 -0800
  • Re: [SI-LIST] : skin effect and transmission line simulators Thu, 04 Sep 1997 11:47:07 -0700
  • [SI-LIST] : Digital Interconnect Position at HP Wed, 30 Jul 97 21:38:12 PDT
  • Re: more questions about buried PCB Mon, 10 Jun 96 13:19:23 PDT
• alaa alani
  • [SI-LIST] : Text Book in SI Wed, 16 Dec 98 01:06:53 GMT
  • [SI-LIST] : Output Impedance Wed, 1 Apr 1998 17:57:21 +0100
  • Re: [SI-LIST] : SSO : How to identify SSO groups? Mon, 22 Dec 1997 09:39:01 GMT
  • Re: [SI-LIST] : Sweeping Temp within MonteCarlo in HSPICE Mon, 1 Dec 1997 12:03:08 GMT
  • Re: [SI-LIST] : Sweeping Temp within MonteCarlo in HSPICE Tue, 2 Dec 1997 14:35:33 GMT
  • [SI-LIST] : Sweeping Temp within MonteCarlo in HSPICE Wed, 26 Nov 1997 12:02:58 GMT
  • Simultaneous Switching Mon, 14 Jul 1997 12:02:58 +0100
  • Simultaneous Switching Mon, 14 Jul 1997 12:02:58 +0100
  • Re: Xtalk/Zo tools Thu, 18 Apr 96 08:43:49 BST
• Alan Heinbaugh
  • Re: [SI-LIST] : SI openings at Stratus else delete -- OBJECTIONS ... Tue, 17 Feb 1998 22:20:07 -0800
• Alastair Hardie
  • [SI-LIST] : Transmission Line Conductors Fri, 19 Sep 1997 19:14:15 -0400
  • [SI-LIST] : Transmission Line Conductors Thu, 18 Sep 1997 18:19:30 -0400
• Aldo Mastrosimone
  • [SI-LIST] : Transmission Line Analysis Software Thu, 11 Dec 1997 06:46:22 PST
• Alex Theodorou
  • [SI-LIST] : Cross-talk Concerns Thu, 16 Jul 1998 16:34:35 -0600
• Alina Deutsch
  • [SI-LIST] : EPEP'97 ADVANCED PROGRAM Mon, 08 Sep 1997 10:33:37 -0700
• allen_wang@ccmail.asus.com.tw
  • [SI-LIST] : Need your comments in selection of SI simulation tool! Thu, 16 Apr 98 19:46:57 +0800
• Alok Tripathi
  • RE: [SI-LIST] : RE: RC terminations on multidrop busses Sat, 14 Nov 1998 16:28:33 -0800 (PST)
  • Re: [SI-LIST] : Differential impedance Wed, 11 Nov 1998 17:44:25 -0800 (PST)
  • Re: [SI-LIST] : IC input impedance Tue, 13 Oct 1998 13:08:15 -0700 (PDT)
  • Re: [SI-LIST] : Differential Reflection Question Thu, 2 Apr 1998 13:36:30 -0800 (PST)
  • guard traces. Wed, 2 Jul 1997 11:51:54 -0700 (PDT)
  • Confer. on wireless comm. Sat, 8 Jun 1996 13:56:03 -0700 (PDT)
• alterra@adnc.com
  • Re: [SI-LIST] : Trace impedance Thu, 20 Aug 1998 09:28:13 -0700
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 12:36:14 -0700
  • Re: [SI-LIST] : High Permittivity Board Level Decoupling and Mon, 15 Jun 1998 15:34:30 -0700
  • Re: [SI-LIST] : Ansoft 2D extractor question Fri, 24 Apr 1998 00:49:52 -0700
  • Re: [SI-LIST] : Dual Stripline impedance Fri, 17 Apr 1998 07:49:17 -0700
  • Re: [SI-LIST] : Controlled impedance in Flex Circuit Fri, 27 Mar 1998 23:24:03 -0800
  • Re: [SI-LIST] : Impedance of micro-strip over wide ground trace Thu, 26 Mar 1998 15:36:08 -0800
  • Re: [SI-LIST] : SMA Impedance Matching Wed, 04 Mar 1998 13:16:15 -0800
  • [SI-LIST] : Re: Does solder mask reduce trace impedance ? Tue, 09 Dec 1997 18:22:16 -0800
  • Re: [SI-LIST] : bare board resonance test Wed, 01 Oct 1997 18:17:52 -0700
  • [SI-LIST] : Re: Transmission Line Conductors Fri, 19 Sep 1997 20:04:36 -0700
  • Re: [SI-LIST] : Transmission Line Conductors Thu, 18 Sep 1997 21:07:04 -0700
• Alwyn Goh
  • Delete from mailing list Tue, 30 Jul 1996 18:04:20 +0800 (MYT)
• Anders Ekholm
  • Re: [SI-LIST] : Modeling Package parasitics Tue, 17 Feb 1998 10:28:07 +0100 (MET)
  • Re: Re[2]: [SI-LIST] : Decoupling capacitor selection & placemen Thu, 30 Oct 1997 08:16:03 +0100
• Andreas Cangellaris
  • [SI-LIST] : Dispersive interconnects and skin effect Thu, 4 Sep 1997 11:42:21 -0700
• Andrew Ingraham
  • RE: [SI-LIST] : Focusing on Parasitic Parameters Sun, 29 Nov 1998 23:26:21 -0500
  • RE: [SI-LIST] : Some issues about fineline BGA .. Wed, 25 Nov 1998 10:20:21 -0500
  • RE: [SI-LIST] : A timing question in high speed bus Tue, 17 Nov 1998 08:42:31 -0500
  • RE: [SI-LIST] : Schottky diode termination Tue, 27 Oct 1998 18:38:58 -0500
  • RE: [SI-LIST] : Schottky diode termination Mon, 26 Oct 1998 18:22:50 -0500
  • [SI-LIST] : RE: (transmission line demo tool) Wed, 21 Oct 1998 17:08:21 -0400
  • RE: [SI-LIST] : IC input impedance Tue, 13 Oct 1998 13:49:31 -0400
  • RE: [SI-LIST] : Clock tree Tue, 18 Aug 1998 10:49:07 -0400
  • RE: [SI-LIST] : Clock tree Fri, 14 Aug 1998 16:37:45 -0400
  • RE: [SI-LIST] : 3.3V Design Fri, 14 Aug 1998 15:44:54 -0400
  • RE: [SI-LIST] : GND plane heat dissipation Thu, 23 Jul 1998 16:08:02 -0400
  • RE: [SI-LIST] : Measuring Ground Noise Wed, 24 Jun 1998 07:56:19 -0400
  • RE: [SI-LIST] : High Permittivity Board Level Decoupling and rela Sat, 20 Jun 1998 16:41:07 -0400
  • SI-LIST archives (was RE: [SI-LIST] : admin test message (ignore Thu, 11 Jun 1998 08:23:39 -0400
  • RE: [SI-LIST] : Dieletric Constant Polyimide Fri, 12 Jun 1998 11:22:51 -0400
  • [SI-LIST] : RE: AGP impedance compensated drivers? Tue, 9 Jun 1998 10:23:53 -0400
  • [SI-LIST] : AGP impedance compensated drivers? Tue, 9 Jun 1998 09:52:56 -0400
  • RE: [SI-LIST] : MECL information Wed, 20 May 1998 11:56:08 -0700
  • RE: [SI-LIST] : Excessive clock overshoot Thu, 14 May 1998 09:47:56 -0400
  • RE: [SI-LIST] : Excessive clock overshoot Wed, 13 May 1998 19:15:07 -0400
  • RE: [SI-LIST] : Propagation velocity / discontinuous reference pl Wed, 6 May 1998 21:16:08 -0400
  • [SI-LIST] : Does SSO make outputs earlier as well as later? Thu, 30 Apr 1998 10:27:25 -0400
  • RE: [SI-LIST] : Output Driver Impedance Variation? Thu, 23 Apr 1998 11:21:38 -0400
  • RE: [SI-LIST] : Worst case VI curve for PCI spec a reality? Tue, 21 Apr 1998 16:43:03 -0400
  • RE: [SI-LIST] : Worst case VI curve for PCI spec a reality? Mon, 20 Apr 1998 12:22:46 -0400
  • RE: [SI-LIST] : How to measure MOS capacitance Thu, 16 Apr 1998 18:28:04 -0400
  • RE: [SI-LIST] : 66 MHz AGP Clock Signal Wed, 15 Apr 1998 09:08:32 -0400
  • RE: [SI-LIST] : measuring CMOS Cin with HP4275A Fri, 10 Apr 1998 16:17:25 -0400
  • RE: [SI-LIST] : viewing HSPICE results without awaves Thu, 9 Apr 1998 15:47:01 -0400
  • RE: [SI-LIST] : viewing HSPICE results without awaves Thu, 9 Apr 1998 15:47:01 -0400
  • RE: [SI-LIST] : PCI Slew Rate Test Load Wed, 8 Apr 1998 18:27:22 -0400
  • RE: [SI-LIST] : curve tracers and Output Impedance Fri, 3 Apr 98 13:16:22 EST
  • RE: [SI-LIST] : Convert an IBIS model to SPICE Model. Fri, 3 Apr 1998 08:53:30 -0500
  • RE: [SI-LIST] : Output Impedance Thu, 2 Apr 1998 08:37:43 -0500
  • RE: [SI-LIST] : IBIS Modeling Wed, 25 Mar 1998 11:28:44 -0500
  • RE: [SI-LIST] : Cable skew Tue, 24 Mar 1998 16:40:22 -0500
  • RE: [SI-LIST] : Effective Dielectric Tue, 24 Mar 1998 16:55:12 -0500
  • RE: [SI-LIST] : Overshoot/Undershoot Tue, 24 Feb 1998 08:23:40 -0500
  • RE: [SI-LIST] : To overshoot or undershoot: ( to diode or not to Mon, 23 Feb 1998 16:29:01 -0500
  • RE: [SI-LIST] : To overshoot or undershoot: ( to diode or not to Mon, 23 Feb 1998 09:09:08 -0500
  • RE: [SI-LIST] : Earth Ground Tue, 17 Feb 1998 18:07:11 -0500
  • RE: [SI-LIST] : internal layer routing and EMI issues Wed, 4 Feb 1998 05:43:39 -0500
  • Re: [SI-LIST] : How to identify SSO Sun, 11 Jan 98 22:12:52 EST
  • Re: [SI-LIST] : How to identify SSO Thu, 8 Jan 98 05:54:36 EST
  • RE: [SI-LIST] : How to identify SSO Wed, 7 Jan 98 05:18:43 EST
  • Re: [SI-LIST] : How to identify SSO groups? Tue, 23 Dec 97 06:41:49 EST
  • Re: [SI-LIST] : Sweeping Temp within MonteCarlo in HSPICE Mon, 1 Dec 97 06:37:19 EST
  • Re: [SI-LIST] : Preferred PWB impedances Thu, 20 Nov 97 07:49:07 EST
  • Re: [SI-LIST] : Guard banding Tue, 11 Nov 97 17:29:26 EST
  • Re: [SI-LIST] : more on pcb stack-ups Thu, 23 Oct 97 14:13:52 EDT
  • Re: [SI-LIST] : Board Stack-up Thu, 23 Oct 97 09:06:57 EDT
• Andrew Phillips
  • [SI-LIST] : Some issues about fineline BGA .. Thu, 19 Nov 1998 18:04:00 +0100
  • [SI-LIST] : crosstalk through resistor networks? Fri, 14 Aug 1998 15:07:03 +0200
  • [SI-LIST] : another stack-up question Wed, 29 Apr 1998 17:48:54 +0200
  • [SI-LIST] : data bus clash - how bad? Mon, 12 Jan 1998 10:22:32 +0800
  • [SI-LIST] : Decoupling capacitor selection & placement Wed, 29 Oct 1997 14:00:28 +0800
  • [SI-LIST] : resistor models Mon, 22 Sep 1997 11:46:15 +0800
  • Need info on BGA packages Thu, 17 Jul 1997 12:16:46 +0800
• Andy Ingraham
  • Re: [SI-LIST] : delay lines Wed, 24 Sep 97 13:46:27 EDT
  • Re: [SI-LIST] : differential pairs Thu, 18 Sep 97 08:12:31 EDT
  • Re: [SI-LIST] : stackup impedance. Thu, 18 Sep 97 07:15:08 EDT
  • Re: [SI-LIST] : stackup impedance. Wed, 17 Sep 97 07:28:11 EDT
  • Re: [SI-LIST] : IBIS model question Fri, 5 Sep 97 09:46:04 EDT
  • Re: [SI-LIST] : Output driver versus internal logic switching noise Tue, 2 Sep 97 09:21:27 EDT
  • [SI-LIST] : Re: Connector pinout question Fri, 18 Jul 97 13:53:08 EDT
  • RE: resend the question. (The Criteria of overshoot, undershoot, RingBack for different logic types Wed, 16 Jul 97 09:41:55 EDT
  • RE: resend the question. (The Criteria of overshoot, undershoot, RingBack for different logic types Fri, 11 Jul 97 09:49:03 EDT
  • Re: resend the question. (The Criteria of overshoot, undershoot, RingBack for different logic types Wed, 9 Jul 97 08:29:31 EDT
  • Re: Shielding Wed, 2 Jul 97 08:31:45 EDT
  • Re: Pullup resistors on 3-state buses Tue, 3 Jun 97 10:59:53 EDT
  • Re: Power/ground connections/bypassing on ICs Thu, 1 May 97 14:24:43 EDT
  • Re: Power/ground connections/bypassing on ICs Tue, 29 Apr 97 09:00:59 -0400
  • Power/ground connections/bypassing on ICs Mon, 28 Apr 97 11:40:12 -0400
  • RE: Help/cross-talk guidelines Tue, 8 Apr 97 18:28:27 EDT
  • Re: Separate +5V Plane Fri, 28 Mar 97 13:55:12 EST
  • Re: Public SI Seminar Tue, 18 Mar 97 10:11:58 EST
  • Re: Differential Pair Skew Tue, 30 Jul 96 08:11:18 EDT
  • Re: Differential Pair Skew Fri, 26 Jul 96 15:37:23 EDT
  • Re: component overstress Tue, 12 Mar 96 08:32:39 EST
  • Re[n]: Wanted...PCI bus 3V driver/receiver models Thu, 29 Feb 96 10:22:08 EST
  • Re: Wanted...PCI bus 3V driver/receiver models Mon, 26 Feb 96 22:03:34 EST
  • Vias and decoupling (was Re[x]: impedance across ground plane) Sun, 25 Feb 96 14:21:04 EST
• Andy Ingraham 18-Feb-1997 1154
  • Re: L/R response time Tue, 18 Feb 97 11:54:17 EST
• Andy Ingraham 28-May-1997 0740
  • Re: need help for networking loop back, Thanks Wed, 28 May 97 07:51:34 EDT
• Anthony Tse
  • RE: [SI-LIST] : FW: signal isolation, RF board Fri, 30 Jan 1998 15:00:38 -0500
  • [SI-LIST] : FW: signal isolation, RF board Fri, 30 Jan 1998 12:28:38 -0500
  • Re: resend the question. (The CGround plane on top layer? Wed, 9 Jul 1997 09:40:41 -0400 (EDT)
• apanella@molex.com
  • [SI-LIST] : Signal Integrity Position Mon, 12 Jan 1998 10:36:12 -0600
  • [SI-LIST] : Re[2]: IBIS connector models Mon, 15 Dec 1997 16:32:11 -0330
  • Re: Shielding 2 Jul 97 08:41 CDT
• Arpad Muranyi
  • Re[2]: [SI-LIST] : Convert an IBIS model to SPICE Model. Fri, 03 Apr 98 16:54:00 PST
  • Re[2]: [SI-LIST] : Output Impedance Thu, 02 Apr 98 08:15:00 PST
  • Re: FW: [SI-LIST] : Output Impedance Wed, 01 Apr 98 13:34:00 PST
  • Re: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 98 15:23:00 PST
  • Re[2]: [SI-LIST] : How to identify SSO Wed, 14 Jan 98 03:04:00 PST
  • [SI-LIST] : Re: Embedded microstrip calculations, Ultracad Calculator Wed, 10 Dec 97 11:01:00 PST
  • Re[2]: [SI-LIST] : Does solder mask reduce trace impedance ? Tue, 09 Dec 97 20:22:00 PST
  • Re: [SI-LIST] : Eastern IBIS Kickoff Meeting Sept 18 Fri, 22 Aug 97 12:51:00 PDT
  • S-parameters and non-linear devices Mon, 09 Sep 96 12:51:00 PDT
  • Re: SI- Termination Comments Wa Mon, 22 Apr 96 16:28:07 PST
• Art Collard
  • Re: [SI-LIST] : Output Driver Impedance Variation? Thu, 30 Apr 1998 08:23:40 -0500
  • Re: [SI-LIST] : How to identify SSO Thu, 8 Jan 1998 08:47:54 -0600
• Arthur Collard
  • Re: [SI-LIST] : PCB track length and ringing Wed, 24 Sep 1997 16:38:43 -0500
  • Re: [SI-LIST] : Output driver versus internal logic switching noise Thu, 28 Aug 1997 08:59:54 -0500
  • PBGA packaging Wed, 18 Dec 96 10:10:00 CST
  • Re: component over-stress Wed, 13 Mar 96 10:45:01 CST
  • Re: component overstress Mon, 11 Mar 96 16:28:17 CST
  • Re: component overstress Mon, 11 Mar 96 14:43:31 CST
  • Re: Wanted...PCI bus 3V driver/receiver models Tue, 27 Feb 96 09:51:44 CST
• axlchiu
  • Re: [SI-LIST] : diode terminations(?) Wed, 16 Sep 1998 18:33:25 +0800
• Ballard, Bowie
  • RE: [SI-LIST] : Transmission Line Analysis Software Thu, 18 Dec 1997 07:51:54 -0800
• Barnes, Larry
  • RE: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 98 17:09:00 MST
• BARRON_MANNY@Tandem.COM
  • animation program to show travelling wave 22 Apr 97 14:02:00 -0700
• Barry Ma
  • Re[2]: impedance across ground plane Thu, 22 Feb 1996 13:00:17 -0500
• Ben Andresen
  • Re: Wanted...PCI bus 3V driver/receiver models Mon, 26 Feb 1996 17:43:41 -0600
• Bill Dempsey
  • Re: [SI-LIST] : Trace impedance Thu, 20 Aug 1998 10:05:19 -0700
  • Re: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 1998 16:51:03 -0600
  • [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 1998 15:05:06 -0600
• Bill Gaines B160 x2199
  • [SI-LIST] : 4 March 98 Meeting, Tech Soci NepconWest (Anaheim, Calif) Mon, 2 Mar 1998 10:46:40 -0800 (PST)
  • [SI-LIST] : IMAPS - OC meeting 22 jan, Micro Vias Mon, 19 Jan 1998 07:10:30 -0800 (PST)
  • [SI-LIST] : Re:HF SCSI connectors Wed, 10 Dec 1997 17:41:55 -0800 (PST)
  • [SI-LIST] : Meeting Announcement, SoCal98, Anaheim, 12May98 Mon, 24 Nov 1997 07:22:40 -0800 (PST)
  • [SI-LIST] : Re:Dinner mtg 26sept97 s/b25th Thu, 11 Sep 1997 06:59:41 -0700 (PDT)
  • [SI-LIST] : Dinner mtg 26sept97, Los Angeles area Wed, 10 Sep 1997 07:43:35 -0700 (PDT)
  • Re: animation program to show travelling wave Mon, 21 Apr 97 14:59:52 PDT
  • IMAPS Orange Chapter April Meeting L.A. Area Thu, 10 Apr 97 08:11:15 PDT
  • IMAPS Orange Chapter March meeting L.A. Area Fri, 14 Mar 97 09:23:44 PST
  • Joint Technical Societies, Nepcon West, L.A. Area Wed, 12 Feb 97 11:27:20 PST
• Bishop, Ron
  • [SI-LIST] : TestPad R,L,C Fri, 20 Nov 1998 11:55:49 -0800
  • RE: [SI-LIST] : timing design tool Tue, 1 Sep 1998 10:08:20 -0700
  • RE : [SI-LIST] : Need your comments in selection of SI simula Mon, 20 Apr 1998 09:17:40 -0700
  • RE: [SI-LIST] : SPICE or IBIS SI models Fri, 27 Mar 1998 10:59:01 -0800
• bknott@wlgore.com
  • Re: [SI-LIST] : Dual Stripline impedance Wed, 15 Apr 1998 10:32:55 -0700
  • [SI-LIST] : Single-ended SCSI vs. differential SCSI Fri, 19 Sep 1997 16:39:42 -0600
  • [SI-LIST] : differential pairs Wed, 17 Sep 1997 17:12:30 -0600
• Bob Davis
  • RE: [SI-LIST] : A timing question in high speed bus Wed, 18 Nov 1998 21:36:54 -0800
  • RE: [SI-LIST] : RE: RC terminations on multidrop busses Fri, 13 Nov 1998 20:05:03 -0800
  • RE: [SI-LIST] : High Speed Queries Sun, 8 Nov 1998 18:28:14 -0800
  • RE: [SI-LIST] : High Speed Queries Fri, 6 Nov 1998 19:20:25 -0800
  • RE: [SI-LIST] : 5v and 3.3v Fri, 6 Nov 1998 18:58:00 -0800
  • RE: [SI-LIST] : Schottky diode termination Fri, 30 Oct 1998 11:40:54 -0800
  • RE: [SI-LIST] : Schottky diode termination Thu, 29 Oct 1998 22:36:58 -0800
  • RE: [SI-LIST] : Selection of Optimum Termination Tue, 20 Oct 1998 11:03:28 -0700
  • RE: [SI-LIST] : Selection of Optimum Termination Tue, 20 Oct 1998 01:28:31 -0700
  • RE: [SI-LIST] : Standard Component Data Sheet again Thu, 9 Jul 1998 09:34:30 -0700
  • [SI-LIST] : Standard Component Data Sheet Thu, 9 Jul 1998 00:43:10 -0700
  • Re: Pullup resistors on 3-state buses Tue, 3 Jun 97 12:46:33 PDT
• Bob Meyer
  • Re: [SI-LIST] : New VME Backplane -- Star Layout 16 Sep 1998 12:47:13 -0400
  • [SI-LIST] : model translation 16 Feb 1998 10:43:02 -0500
• Bob Penick
  • Re: IBIS Models or full spice netlist...? Tue, 31 Dec 96 09:03:32 CST
• Bob Perlman
  • RE: [SI-LIST] : Schottky diode termination Fri, 30 Oct 1998 10:52:52 +0000
  • [SI-LIST] : Output Driver Impedance Variation? Tue, 21 Apr 1998 17:08:57 -0700
  • [SI-LIST] : Some questions about capacitor reliability Thu, 11 Dec 1997 15:45:18 -0800
• Bob Reed
  • Unsubscribe from reflector Thu, 2 Jan 1997 07:26:09 -0800 (PST)
• Bob Ross
  • [SI-LIST] : AGENDA EUROPEAN IBIS SUMMIT 2/26/98 Thu, 19 Feb 98 14:10:08 PST
  • [SI-LIST] : EUROPEAN IBIS SUMMIT - 2nd Call Fri, 30 Jan 98 16:55:35 PST
  • [SI-LIST] : EUROPEAN IBIS SUMMIT ANNOUNCEMENT Fri, 21 Nov 1997 13:58:23 -0800 (PST)
• Bob Techentin
  • Re: [SI-LIST] : About multilayer Board Tue, 9 Dec 1997 16:04:59 -0600
  • Re: Re[4]: [SI-LIST] : Decoupling capacitor selection & plac Thu, 30 Oct 1997 08:17:51 -0600
  • Re: [SI-LIST] : Re: delay lines with PCB traces Thu, 25 Sep 1997 09:59:53 -0500
  • Re: Power/ground connections/bypassing on ICs Mon, 28 Apr 1997 14:51:15 -0500
• Bodley, Andrew
  • [SI-LIST] : transmission line theory Tue, 3 Mar 1998 08:50:08 -0800
• Bradley L. Mendenhall
  • Vcc power planes Fri, 20 Jun 1997 15:37:29 -0400 (EDT)
  • Re: SI- Termination Comments Wa Mon, 22 Apr 1996 12:18:51 -0400 (EDT)
  • Ground Bounce? Mon, 4 Mar 1996 09:42:14 -0500
• Bremer, Robert
  • si-list RE: 3.3V/5V planes Thu, 17 Jul 1997 12:18:47 -0700
• BREMER, ROBERT WH:3821
  • SIGNAL INTEGRITY ENG. OPENING Mon, 27 Jan 97 14:06:03 -0800
• Brent Joyce
  • [SI-LIST] : RE:Termination of High Speed Bus Fri, 3 Apr 1998 10:13:39 +1000
• Brett Grossman
  • Re: [SI-LIST] : BGA Ni-Au platting pattern. Wed, 07 Oct 1998 08:30:32 -0700
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 10:14:55 -0700
  • Re: [SI-LIST] : eye patterns Tue, 12 May 1998 12:48:54 -0700
  • [SI-LIST] : Freq. dependent losses in Spice? Fri, 03 Apr 1998 09:11:52 -0800
  • Re: [SI-LIST] : Other materials for GHz application Tue, 02 Dec 1997 13:55:04 -0800
  • Re: [SI-LIST] : Decoupling capacitor selection & placement Wed, 29 Oct 1997 08:13:57 -0800
  • Re: [SI-LIST] : Package prices and circuit elements values Thu, 09 Oct 1997 08:03:01 -0700
  • Re: [SI-LIST] : Schiffman phase shifters Mon, 29 Sep 1997 13:54:12 -0700
  • Re: [SI-LIST] : Re: delay lines with PCB traces Wed, 24 Sep 1997 17:01:37 -0700
  • Newbie question Re: PCB SI simulation tools Mon, 14 Jul 1997 08:52:51 -0700
  • Newbie question Re: PCB SI simulation tools Mon, 14 Jul 1997 08:52:51 -0700
• brian burke
  • Re: FWD: Impedance Software Thu, 01 Aug 1996 21:43:33 -0700
  • SI Software Now Available! Thu, 01 Aug 1996 21:36:40 -0700
• Brian C. Wadell
  • RE: [SI-LIST] : Transmission Line Conductors Sun, 21 Sep 1997 18:08:45 -0400
  • RE: Line Parameters of Twisted Cables ? Wed, 9 Apr 1997 10:37:27 -0400
  • RE: Modeling - Fast Tr Thu, 5 Sep 1996 22:48:17 -0400
  • Q: SI Course Inputs Sat, 9 Mar 1996 18:03:28 GMT
• Brian Young
  • Re: [SI-LIST] : Output Impedance Thu, 02 Apr 1998 08:50:00 -0500
• Bruce.Wallick@analog.com
  • [SI-LIST] : SMA Impedance Matching Wed, 4 Mar 98 13:59:07 EST
• C. Kumar
  • Re: IBIS Models or full spice netlist...? Tue, 31 Dec 1996 08:38:29 -0500
• C.C. Chiu
  • Re: [SI-LIST] : Trace impedance Mon, 09 Nov 1998 10:23:32 +0800
• Cary Mandel
  • [SI-LIST] : Open position - Viewlogic Europe Mon, 09 Nov 1998 02:30:28 -0800
  • Twisted pair cables Thu, 29 May 97 19:17:02 GMT
• cashioli@ansoft.com
  • Re: limit of method of moments Wed, 29 May 1996 08:52:52 -0500
• casperdd
  • [SI-LIST] : TDR analysis Thu, 27 Aug 1998 10:46:08 +0200
  • [SI-LIST] : Trace impedance Thu, 20 Aug 1998 11:14:51 +0200
• Chamseddine, Ahmad
  • RE: [SI-LIST] : 66 MHz AGP Clock Signal Tue, 14 Apr 1998 08:26:52 -0400
  • [SI-LIST] : PCB Stacking! Tue, 2 Dec 1997 09:15:13 -0500
• Chan, Michael
  • [SI-LIST] : PCI Slew Rate Test Load Wed, 8 Apr 1998 13:16:24 -0500
• Chandrakant Hemraj Sakharwade
  • Re: [SI-LIST] : SI in cells. Wed, 2 Sep 1998 13:27:08 +0531 (IST)
  • [SI-LIST] : Bus bar current carrying capability Mon, 22 Jun 1998 09:12:52 +0531 (IST)
• Chang_Ie_Hwaa
  • [SI-LIST] : Slew rate Tue, 24 Nov 1998 21:51:59 -0500
• Charles Bishop
  • Re: [SI-LIST] : Trace impedance Fri, 21 Aug 1998 07:28:38 -0400 (EDT)
• Charles Hill
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Wed, 30 Sep 1998 15:26:35 -0600
  • RE: [SI-LIST] : Excessive clock overshoot Fri, 15 May 1998 00:28:32 -0600
  • [SI-LIST] : Is feedback really EVIL? Wed, 13 May 1998 22:59:24 -0600
  • RE: [SI-LIST] : Excessive clock overshoot Wed, 13 May 1998 22:06:17 -0600
  • RE: [SI-LIST] : Diodes, EMC, ESD Protection networks Mon, 11 May 1998 21:54:11 -0600
  • RE: [SI-LIST] : measuring CMOS Cin with HP4275A Fri, 10 Apr 1998 16:12:04 -0600
  • RE: [SI-LIST] : Modeling Package parasitics Sat, 28 Mar 1998 22:05:40 -0700
  • RE: [SI-LIST] : Cable skew Wed, 25 Mar 1998 17:20:34 -0700
  • RE: [SI-LIST] : TDR Measurements Thu, 11 Dec 1997 21:35:31 -0700
  • RE: [SI-LIST] : HF SCSI connectors Tue, 9 Dec 1997 04:34:30 -0700
  • RE: [SI-LIST] : RF experience VS SI issues Mon, 24 Nov 1997 21:24:00 -0700
  • Re: FW: reactance of 0805 and smaller SMT resistors Wed, 18 Jun 1997 22:40:43 -0600
  • reactance of 0805 and smaller SMT resistors Thu, 12 Jun 1997 22:04:15 -0600
• Chee Yee Chung
  • Re[2]: [SI-LIST] : Controlled impedance in Flex Circuit Sun, 29 Mar 98 19:03:00 PST
  • Re[2]: [SI-LIST] : Controlled impedance in Flex Circuit Sun, 29 Mar 98 19:03:00 PST
  • Re[2]: [SI-LIST] : Modeling Package parasitics Tue, 17 Feb 98 07:23:00 PST
  • Re: [SI-LIST] : Modeling Package parasitics Mon, 16 Feb 98 15:37:00 PST
  • Re: [SI-LIST] : About multilayer Board Thu, 04 Dec 97 07:16:00 PST
• CHIN-SOON_TEOH@HP-Malaysia-om1.om.hp.com
  • [SI-LIST] : Re: microwave radiation due to network analyzers Fri, 22 May 1998 17:06:41 +0800
• Ching-Chao Huang
  • Positions available Mon, 21 Apr 1997 17:15:49 -0700
  • CAD Engineer Position Available Wed, 15 May 96 14:36:33 PDT
• Chinh Tran
  • [SI-LIST] : mpc68360 Motorola IBIS models Mon, 14 Sep 1998 18:29:39 -0400
  • [SI-LIST] : models page on http://www.eia.org/eig/ibis/ibis.htm Wed, 09 Sep 1998 13:39:15 -0400
• Chip Chip
  • Re: [SI-LIST] : Does SSO make outputs earlier as well as later? YES, BUT... Thu, 30 Apr 1998 10:17:57 -0700
• chong lin
  • Re: [SI-LIST] : Driver Strength Mon, 9 Mar 1998 09:00:38 -0800
• Chris Cheng
  • [SI-LIST] : Relative permeability of KOVAR Tue, 08 Sep 1998 15:08:06 -0700
  • Re: [SI-LIST] : Propagation velocity / discontinuous reference pl ane Wed, 06 May 1998 19:36:39 -0700
  • SI job opportunity in Intel Santa Clara Mon, 20 Jan 1997 10:39:17 -0800
• Chris H Simon
  • Re: [SI-LIST] : Simulating Tools 12 Nov 1998 13:37:42 -0600
• Chris Heard/US/3Com
  • Re: [SI-LIST] : The Flight-Time/SI Effects of Trace 'Tromboning' 9 Jan 98 10:14:45 EDT
  • Re: [SI-LIST] : Some questions about capacitor reliability 12 Dec 97 9:55:21 EDT
  • Re: [SI-LIST] : Modeling connector pin vias 29 Oct 97 13:50:23 EDT
  • [SI-LIST] : Formulas for Calculating PTH Capacitance 23 Sep 97 9:40:33 EDT
  • Re: [SI-LIST] : PCB parameters 19 Sep 97 8:06:29 EDT
  • Re: [SI-LIST] : BackPlane stackup 29 Jul 97 9:16:14 EDT
  • Re : Impedance Software 31 Jul 96 9:12:16 EDT
  • 1GB/s serial Diff Pairs over Backplanes and Connectors 30 Jul 96 10:47:37 EDT
• Chris Knapton
  • RE: [SI-LIST] : Trace impedance Wed, 9 Sep 1998 12:03:42 -0400
  • [SI-LIST] : Lossy lines,TDR and connectors Mon, 4 May 1998 15:01:07 -0400
• Chris Padilla
  • Re: [SI-LIST] : Text Book in SI Wed, 16 Dec 1998 08:17:19 -0800
  • RE: [SI-LIST] : IC input impedance Tue, 13 Oct 1998 12:41:43 -0700
  • [SI-LIST] : Also, Er vs. freq. Fri, 09 Oct 1998 14:40:28 -0700
  • [SI-LIST] : Also, Er vs. freq. Fri, 09 Oct 1998 08:45:15 -0700
• Chris Roberts
  • [SI-LIST] : Mixed signal - PWR and GND configuration issue Fri, 17 Jul 1998 15:51:21 -0400
• Chris Rokusek
  • Re: [SI-LIST] : IBIS Model Verification (correction) Thu, 10 Sep 1998 14:37:16 -0700
  • Re: [SI-LIST] : Si-List administrative trivia Thu, 09 Jul 1998 10:52:42 -0700
  • Re: [SI-LIST] : Measuring Ground Noise Thu, 25 Jun 1998 09:02:08 -0700
  • Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on? Wed, 13 May 1998 20:39:35 -0700
• Chris Simon
  • [SI-LIST] : skin effect and transmission line simulators Thu, 4 Sep 1997 11:36:06 -0600
  • [SI-LIST] : skin effect and transmission line simulators Thu, 4 Sep 1997 11:36:06 -0600
• Chris_Heard@3com.com
  • Thermal Relief Design Mon, 16 Jun 1997 10:50:36 -0400
• Chris_Heard@ne.3com.com
  • Re: [SI-LIST] : Propagation velocity / discontinuous reference Wed, 6 May 1998 21:34:41 -0400
  • Re: [SI-LIST] : SMA Impedance Matching Wed, 4 Mar 1998 14:38:55 -0500
• Christian Nause
  • Re: [SI-LIST] : IBIS AND EMC Wed, 01 Apr 1998 23:02:27 +0200
• Christian Schuster
  • Re: [SI-LIST] : TDR Analysis: Layer Peeling Algorithm using Matlab Mon, 14 Dec 1998 19:11:02 +0100
  • [SI-LIST] : TDR Analysis: Layer Peeling Algorithm using Matlab Mon, 14 Dec 1998 17:00:04 +0100
  • Re: [SI-LIST] : Focusing on Parasitic Parameters Tue, 01 Dec 1998 09:20:47 +0100
• Christopher Albert
  • [SI-LIST] : passive cable equalization network Fri, 17 Apr 1998 10:57:56 -0400
• Christopher Donham
  • Re: [SI-LIST] : bypass cap question (long, simple) Mon, 2 Feb 1998 15:26:06 -0800 (PST)
• Chung, Chee Yee
  • RE: [SI-LIST] : Ansoft 2D extractor question Thu, 23 Apr 1998 18:44:00 -0700
  • RE: [SI-LIST] : Cross section geometry for the previous post Tue, 21 Apr 1998 17:54:00 -0700
• Clardy, John D
  • RE: [SI-LIST] : skin effect and transmission line simulators Thu, 18 Sep 1997 09:30:53 -0700
  • RE: Power/ground connections/bypassing on ICs Tue, 29 Apr 1997 13:08:24 -0700
• Clyde R. Visser, KD6GWN
  • Re: [SI-LIST] : MECL information Wed, 20 May 1998 09:33:46 -700
• Cohen, Fred
  • [SI-LIST] : Career Opportunity Tue, 1 Dec 1998 08:56:37 -0800
• Colin Brench
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 98 16:06:56 EDT
• Colin Campbell
  • Controlled Impedance Connectors Thu, 20 Mar 1997 09:15:05 +0000 (GMT)
• Colm Aengus Murphy
  • [SI-LIST] : MECL Book Tue, 09 Jun 1998 09:34:42 +0100
  • [SI-LIST] : MECL information Wed, 20 May 1998 16:51:43 +0100
• Craig Callen
  • [SI-LIST] : eye patterns Tue, 12 May 1998 15:04:43 +0100
  • [SI-LIST] : Re: attenuation calculations Fri, 24 Apr 1998 10:26:06 +0100
  • [SI-LIST] : attenuation calculations Thu, 23 Apr 1998 18:11:52 +0100
• Craig Clewell
  • Re: [SI-LIST] : Backplane connectors for Fibre Channel Wed, 25 Nov 1998 09:25:41 -0500
  • Re: [SI-LIST] : Calculating Trace Inductance Wed, 25 Nov 1998 09:21:56 -0500
  • Re: [SI-LIST] : Trace impedance Mon, 16 Nov 1998 15:24:28 -0500
  • Re: [SI-LIST] : Termination and Test Equipment leads Wed, 11 Nov 1998 08:08:22 -0500
  • [SI-LIST] : Controlled Z PCB's Wed, 07 Oct 1998 15:57:45 -0400
• craig stein
  • [SI-LIST] : Screened/Shielded UTP Cabling Sun, 03 May 1998 19:06:24 -0700
• Csaba Csaszar
  • [SI-LIST] : "Home Made TDR" Mon, 15 Dec 1997 21:42:31 -0500
  • Archive required Wed, 16 Jul 1997 06:06:38 -0400
  • Delay line Thu, 08 May 1997 22:19:26 -0400
• csoolan
  • [SI-LIST] : SPICE or IBIS SI models Fri, 27 Mar 1998 09:07:11 -0800
• csoolan@dso.org.sg
  • Re: [SI-LIST] : 66 MHz AGP Clock Signal Tue, 14 Apr 1998 09:45:58 +0800
  • [SI-LIST] : Other materials for GHz application Tue, 02 Dec 1997 14:55:46
  • [SI-LIST] : Signal Integrity Conference in Singapore Wed, 26 Nov 1997 10:25:19
  • [SI-LIST] : Signal Integrity of 500 MHz on PCB Thu, 06 Nov 1997 16:34:35
• D. C. Sessions
  • Re: [SI-LIST] : Re: Is feedback really EVIL? Thu, 14 May 1998 12:01:00 -0700
  • [SI-LIST] : Re: Is feedback really EVIL? Thu, 14 May 1998 08:29:37 -0700
  • Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on? Thu, 14 May 1998 07:58:46 -0700
  • Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on? Wed, 13 May 1998 15:13:07 -0700
  • Re: [SI-LIST] : Excessive clock overshoot Wed, 13 May 1998 14:23:14 -0700
  • Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on? Wed, 13 May 1998 15:13:07 -0700
  • Re: [SI-LIST] : Does IBIS describe output transition which both Wed, 13 May 1998 07:41:02 -0700
  • Re: [SI-LIST] : IBIS to Spice Tue, 12 May 1998 14:51:09 -0700
  • Re: [SI-LIST] : another stack-up question Fri, 01 May 1998 14:14:25 -0700
  • Re: [SI-LIST] : another stack-up question Fri, 01 May 1998 07:57:40 -0700
  • Re: [SI-LIST] : stackup question Thu, 23 Apr 1998 12:46:22 -0700
  • Re: [SI-LIST] : Serpentine traces Thu, 23 Apr 1998 12:10:14 -0700
  • Re: [SI-LIST] : Worst case VI curve for PCI spec a reality? Tue, 21 Apr 1998 13:54:43 -0700
  • Re: [SI-LIST] : Worst case VI curve for PCI spec a reality? Mon, 20 Apr 1998 12:29:14 -0700
  • Re: [SI-LIST] : Worst case VI curve for PCI spec a reality? Mon, 20 Apr 1998 10:58:01 -0700
  • Re: [SI-LIST] : How to measure MOS capacitance Thu, 16 Apr 1998 07:28:57 -0700
  • Re: [SI-LIST] : stackup question Tue, 14 Apr 1998 08:27:04 -0700
  • Re: [SI-LIST] : Output Impedance Thu, 2 Apr 1998 08:29:58 -0700
  • Re: [SI-LIST] : Precision Clocking Mon, 06 Apr 1998 14:29:02 -0700
  • Re: [SI-LIST] : ASIC noise update.... Mon, 06 Apr 1998 10:44:09 -0700
  • Re: [SI-LIST] : curve tracers and Output Impedance Fri, 03 Apr 1998 10:59:56 -0700
  • Re: [SI-LIST] : Self-inductance Fri, 03 Apr 1998 08:42:14 -0700
  • Re: [SI-LIST] : Self-inductance Fri, 03 Apr 1998 07:29:24 -0700
  • Re: [SI-LIST] : Convert an IBIS model to SPICE Model. Thu, 02 Apr 1998 15:18:05 -0700
  • Re: [SI-LIST] : Output Impedance Thu, 02 Apr 1998 08:29:58 -0700
  • Re: [SI-LIST] : Convert an IBIS model to SPICE Model. Thu, 02 Apr 1998 07:53:05 -0700
  • Re: [SI-LIST] : Output Impedance Wed, 01 Apr 1998 10:55:14 -0700
  • Re: [SI-LIST] : IBIS Modeling Tue, 24 Mar 1998 11:22:12 -0700
  • Re: [SI-LIST] : Effective Dielectric Mon, 23 Mar 1998 14:36:10 -0700
  • Re: [SI-LIST] : Driver Strength Thu, 05 Mar 1998 14:07:24 -0700
  • Re: [SI-LIST] : Driver Strength Thu, 05 Mar 1998 13:59:02 -0700
  • Re: [SI-LIST] : Driver Strength Thu, 05 Mar 1998 10:24:12 -0700
  • Re: [SI-LIST] : Overshoot/Undershoot Tue, 24 Feb 1998 08:48:00 -0700
  • Re: [SI-LIST] : Overshoot/Undershoot: Tue, 24 Feb 1998 08:43:54 -0700
  • Re: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 1998 16:52:26 -0700
  • Re: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 1998 14:56:58 -0700
  • Re: [SI-LIST] : Modeling Package parasitics Wed, 18 Feb 1998 17:24:52 -0700
  • Re: [SI-LIST] : Modeling Package parasitics Mon, 16 Feb 1998 17:37:28 -0700
  • Re: [SI-LIST] : Modeling Package parasitics Mon, 16 Feb 1998 16:13:46 -0700
  • Re: [SI-LIST] : Down-bond in chip packaging Wed, 11 Feb 1998 09:03:39 -0700
  • Re: [SI-LIST] : Differential pairs and place splits Wed, 11 Feb 1998 08:32:15 -0700
  • Re: [SI-LIST] : Down-bond in chip packaging Mon, 09 Feb 1998 09:39:45 -0700
  • Re: [SI-LIST] : Re: (Differential SCSI) Thu, 05 Feb 1998 17:37:48 -0700
  • [SI-LIST] : Re: (Differential SCSI) Thu, 05 Feb 1998 13:18:56 -0700
  • Re: [SI-LIST] : How to identify SSO Thu, 08 Jan 1998 08:05:54 -0700
  • Re: [SI-LIST] : How to identify SSO Wed, 07 Jan 1998 17:33:42 -0700
  • Re: [SI-LIST] : Output shorted to Ground! Wed, 07 Jan 1998 13:58:24 -0700
  • Re: [SI-LIST] : How to identify SSO Wed, 07 Jan 1998 13:54:11 -0700
  • Re: [SI-LIST] : EMC Issues with ASIC design Wed, 03 Dec 1997 10:31:49 -0700
  • Re: [SI-LIST] : AGP Buffer strengths Thu, 20 Nov 1997 07:41:01 -0700
  • Re: [SI-LIST] : Preferred PWB impedances Wed, 19 Nov 1997 09:31:49 -0700
  • [SI-LIST] : Preferred PWB impedances Tue, 18 Nov 1997 09:04:25 -0700
  • Re: [SI-LIST] : Re: Guard banding Wed, 12 Nov 1997 15:01:59 -0700
  • Re: [SI-LIST] : Re: Guard banding Wed, 12 Nov 1997 12:54:45 -0700
  • Re: [SI-LIST] : Decoupling capacitor selection & placemen Fri, 07 Nov 1997 09:36:20 -0700
  • Re: [SI-LIST] : Signal Integrity of 500 MHz on PCB Thu, 06 Nov 1997 14:39:59 -0700
  • Re: [SI-LIST] : Decoupling capacitor selection & placement Fri, 31 Oct 1997 17:00:18 -0700
  • Re: [SI-LIST] : Decoupling capacitor selection & placement Fri, 31 Oct 1997 16:50:20 -0700
  • Re: [SI-LIST] : Decoupling capacitor selection & placemen Wed, 29 Oct 1997 08:21:35 -0700
  • Re: [SI-LIST] : Decoupling capacitor selection & placement Wed, 29 Oct 1997 08:09:20 -0700
• D.C. Sessions
  • Re: [SI-LIST] : How to identify SSO Mon, 12 Jan 1998 09:00:53 -0700
  • Re: [SI-LIST] : How to identify SSO Mon, 12 Jan 1998 08:50:36 -0700
• Dan Swanson
  • [SI-LIST] : RE: (transmission line demo tool) Thu, 22 Oct 98 08:15:45 -0400
  • [SI-LIST] : UnNamed Wed, 21 Oct 98 14:07:54 -0400
  • Re: [SI-LIST] : Trace impedance Thu, 20 Aug 98 16:30:17 -0400
• Daniel Lake
  • Re: [SI-LIST] : Cross-talk Concerns Thu, 16 Jul 1998 16:56:46 -0700
• danla
  • Re: [SI-LIST] : Complex Planes Wed, 23 Sep 1998 08:58:49 -0700
• Danwei Xue
  • Re: [SI-LIST] : Calculating Trace Inductance Tue, 24 Nov 1998 16:41:32 -0800
  • Re: [SI-LIST] : Differential impedance Thu, 12 Nov 1998 10:17:57 -0800
  • Re: [SI-LIST] : Differential impedance Wed, 11 Nov 1998 18:23:41 -0800
  • Re: [SI-LIST] : PCB track length and ringing Tue, 23 Sep 1997 11:23:19 -0700
  • Re: [SI-LIST] : PCB track length and ringing Tue, 23 Sep 1997 11:23:19 -0700
  • [Fwd: Interfacing Sync DRAMs] Wed, 04 Jun 1997 10:47:40 -0700
  • What is SSTL? Mon, 02 Jun 1997 15:04:13 -0700
  • Re: animation program to show travelling wave Mon, 21 Apr 1997 09:56:52 -0700
• Dave Michelson
  • Who runs NEC under UNIX? Fri, 10 May 1996 11:09:49 -0700 (PDT)
• Dave Roth
  • ASIC Design Positions @ Packet Engines!!! Wed, 16 Apr 1997 18:06:36 -0700
• david
  • [SI-LIST] : Re: [SI-LIST] - Design Note 10 Jul 1998 12:34:04 -0800
  • [SI-LIST] : Re: [SI-LIST] - MECL inform 20 May 1998 12:08:24 -0800
• David Boal
  • Job Opening: Beaverton, OR Fri, 1 Mar 1996 12:49:25 -0800 (PST)
• David Haedge
  • [SI-LIST] : SSO - How simultaneous is simultaneous? Wed, 7 Jan 1998 17:12:38 -0600
• davidj@chips.com
  • Re:RE: [SI-LIST] : GND plane heat dissipation Fri, 24 Jul 98 10:04:41 -0800
  • [SI-LIST] : Fwd:Allowable crosstalk on VGA signals to monito Mon, 08 Jun 98 18:46:42 -0800
  • Re:[SI-LIST] : Crystal Question Tue, 07 Apr 98 10:21:42 -0800
• Dean Monthei TQO
  • [SI-LIST] : Book on RF Package Modeling Thu, 17 Dec 1998 16:48:55 -0800
  • [SI-LIST] : Book on RF Package Modeling Thu, 17 Dec 1998 16:08:47 -0800
  • [SI-LIST] : Book on RF Package Modeling Thu, 17 Dec 1998 09:49:19 -0800
• Del Cecchi
  • [SI-LIST] : re: cable skew Tue, 24 Mar 1998 10:11:58 -0600 (CST)
  • re: intersymbol Interference Thu, 5 Jun 1997 11:30:38 -0500 (CDT)
• Dennis Tomlinson
  • Re: [SI-LIST] : How to estimate total layers needed or trace pitch? Mon, 28 Dec 1998 11:46:02 -0600
  • Re: [SI-LIST] : Trace impedance Fri, 13 Nov 1998 14:16:11 -0600
  • Re: [SI-LIST] : Trace impedance Mon, 09 Nov 1998 13:40:39 -0600
  • [Fwd: [SI-LIST] : Schottky diode termination] Thu, 29 Oct 1998 13:47:28 -0600
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Tue, 30 Jun 1998 16:28:30 -0500
  • Re: [SI-LIST] : Schottky diode termination Wed, 28 Oct 1998 11:06:42 -0600
  • Re: [SI-LIST] : Schottky diode termination Mon, 26 Oct 1998 14:26:18 -0600
  • Re: [SI-LIST] : D/A and A/D Connections Thu, 22 Oct 1998 10:36:37 -0500
  • Re: [SI-LIST] : IC input impedance Wed, 14 Oct 1998 11:55:45 -0500
  • Re: [SI-LIST] : IC input impedance Wed, 14 Oct 1998 11:55:45 -0500
  • [SI-LIST] : IBIS delay line model Fri, 09 Oct 1998 10:20:46 -0500
  • Re: [SI-LIST] : overshoot Thu, 27 Aug 1998 10:13:15 -0500
  • Re: [SI-LIST] : crosstalk through resistor networks? Thu, 20 Aug 1998 15:12:39 -0500
  • Re: [SI-LIST] : crosstalk through resistor networks? Fri, 14 Aug 1998 11:46:53 -0500
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 13:27:43 -0500
  • Re: [SI-LIST] : daisy chain Tue, 11 Aug 1998 09:58:01 -0500
  • Re: [SI-LIST] : 3.3V Design Wed, 05 Aug 1998 11:29:34 -0500
  • Re: [SI-LIST] : 3.3V Design Tue, 04 Aug 1998 15:48:35 -0500
  • Re: [SI-LIST] : 3.3V Design Tue, 04 Aug 1998 15:48:35 -0500
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Wed, 01 Jul 1998 09:57:03 -0500
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Thu, 25 Jun 1998 16:44:13 -0500
  • Re: [SI-LIST] : Termination for bi-directional lines Wed, 17 Jun 1998 09:49:02 -0500
  • Re: [SI-LIST] : Characteristic impedance Fri, 29 May 1998 09:45:16 -0500
  • Re: [SI-LIST] : Contact Current Rating ? Fri, 22 May 1998 08:50:44 -0500
  • Re: [SI-LIST] : Contact Current Rating ? Fri, 22 May 1998 08:50:44 -0500
  • Re: [SI-LIST] : ANY EXPERIENCE OF MENTOR'S IS TOOLS Thu, 14 May 1998 13:20:59 -0500
  • Re: [SI-LIST] : Excessive clock overshoot] Thu, 14 May 1998 12:48:21 -0500
  • Re: [SI-LIST] : Clock and Transmission Line Termination Tue, 12 May 1998 10:18:16 -0500
• dfall@thin-film.com
  • [SI-LIST] : Self-inductance Fri, 3 Apr 1998 07:59:14 -0600
  • [SI-LIST] : Effective Dielectric Mon, 23 Mar 1998 14:55:51 -0600
• DFONTANE
  • [SI-LIST] : Decoupling:routing Mon, 27 Apr 1998 09:47:41 -0400
• Diaco Davari
  • RE: [SI-LIST] : 66 MHz AGP Clock Signal Wed, 15 Apr 98 11:11:58 -0800
  • [SI-LIST] : 66 MHz AGP Clock Signal Mon, 13 Apr 98 11:58:37 -0800
• Diane A. Delute
  • Re: [SI-LIST] : PCB Build Thu, 28 Aug 97 17:10:50 PDT
• Dileep Divekar
  • RE: S-Parameter to SPICE Model Converter Wed, 6 Nov 1996 13:59:37 +0800
• Dima Smolyansky
  • RE: [SI-LIST] : TDR Analysis: Layer Peeling Algorithm using Matlab Mon, 14 Dec 1998 09:39:39 -0800
  • [SI-LIST] : RE: Sat, 21 Nov 1998 11:10:14 -0800
  • RE: RE : [SI-LIST] : RE: Models & EDA Vendors Thu, 19 Nov 1998 21:00:44 -0800
  • [SI-LIST] : RE: Models & EDA Vendors Wed, 18 Nov 1998 19:33:36 -0800
  • RE: [SI-LIST] : Differential impedance Wed, 11 Nov 1998 21:45:19 -0800
  • Re: [SI-LIST] : IC input impedance Wed, 14 Oct 1998 11:16:11 -0700
  • Re: [SI-LIST] : IC input impedance Tue, 13 Oct 1998 11:11:08 -0700
  • RE: [SI-LIST] : IC input impedance Tue, 13 Oct 1998 08:18:17 -0700
  • RE: [SI-LIST] : IC input impedance Tue, 13 Oct 1998 07:44:33 -0700
  • Re: [SI-LIST] : Jitter Measurement Wed, 30 Sep 1998 19:44:40 -0700
  • RE: [SI-LIST] : Complex Planes Wed, 23 Sep 1998 19:37:36 -0700
  • Re: [SI-LIST] : TDR analysis Thu, 27 Aug 1998 08:45:53 -0700
  • Re: [SI-LIST] : Trace impedance Thu, 20 Aug 1998 18:25:59 -0700
  • Re: [SI-LIST] : Measuring Ground Noise Tue, 23 Jun 1998 18:58:03 -0700
• dla@siemens-pyramid.com
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 13:59:14 -0700
• Dmitri Kuznetsov
  • Re: [SI-LIST] : Ferrite Beads in HSPICE Thu, 23 Apr 1998 16:23:32 -0700
  • Re: [SI-LIST] : Question about Gear vs Trapezoidal methods for simulations within HSPICe Thu, 05 Mar 1998 17:24:29 -0800
  • Re: [SI-LIST] : Sweeping Temp within MonteCarlo in HSPICE Mon, 01 Dec 1997 13:54:30 -0800
  • Re: [SI-LIST] : W-element Simulation Mon, 29 Sep 1997 11:22:54 -0700
  • Re: [SI-LIST] : PCB track length and ringing Wed, 24 Sep 1997 17:14:46 -0700
  • Re: [SI-LIST] : skin effect and transmission line simulators Fri, 05 Sep 1997 12:47:10 -0700
  • Re: animation program to show travelling wave Mon, 21 Apr 1997 11:30:51 -0700
  • New t-line model in Hspice Tue, 08 Apr 1997 17:10:19 -0700
  • ftp'ing new Hspice's t-line model Thu, 12 Dec 1996 10:33:05 -0800
  • New t-line model in Hspice Wed, 27 Nov 1996 17:37:15 -0800
• Don Abernathey
  • Re: [SI-LIST] : Evaluation of Vendor tools on SI list Thu, 11 Dec 1997 18:31:01 -0800
  • Re: [SI-LIST] : Evaluation of Vendor tools on SI list Thu, 11 Dec 1997 16:08:34 -0800
  • Re: [SI-LIST] : TDR Measurements Tue, 9 Dec 1997 10:55:11 -0800
  • Re: [SI-LIST] : HF SCSI connectors Tue, 9 Dec 1997 09:43:04 -0800
  • Re: Power/ground connections/bypassing on ICs Mon, 28 Apr 1997 14:45:47 -0700
  • Re: animation program to show travelling wave Mon, 21 Apr 1997 12:30:24 -0700
  • Re: vias in ECL @ >1Ghz Tue, 1 Apr 1997 11:47:06 -0800
  • (Fwd) Re: Help with decoupling cap inductance Mon, 25 Nov 1996 14:37:21 -0800
  • Help with decoupling cap inductance Mon, 25 Nov 1996 10:12:49 -0800
  • Re: Differential Pair Skew Tue, 30 Jul 1996 17:24:30 -0700
  • Re: Differential Pair Skew Mon, 29 Jul 1996 12:15:50 -0700
  • Re: Differential Pair Skew Fri, 26 Jul 1996 11:36:25 -0700
  • Differential Pair Skew Thu, 25 Jul 1996 17:29:01 -0700
  • Buried Capacitance Fri, 31 May 1996 16:15:21 -0700
  • Re: Packaging Short Course flyer Fri, 31 May 1996 15:37:32 -0700
  • Re: lab electrical requirements Wed, 1 May 1996 15:26:54 -0700
  • Re: pc board AC noisemap standards Mon, 11 Mar 1996 15:20:45 -0800
  • Re: component overstress Mon, 11 Mar 1996 15:03:12 -0800
  • Re: Ground Bounce? Mon, 4 Mar 1996 10:13:32 -0800
  • Re: Short Course: High Speed VLSI Interconnecti Wed, 24 Jan 1996 09:46:48 -0800
  • Re: shield layer connection Mon, 8 Jan 1996 17:07:28 -0800
• Don Cummings
  • [SI-LIST] : Mass: Signal Integrity/Timing 6+ Month Contract Thu, 28 Aug 1997 11:36:40 -0400
  • MOTIVE Models Thu, 31 Oct 1996 16:29:27 -0500
• Doug Brooks
  • Re: [SI-LIST] : Calculating Trace Inductance Tue, 24 Nov 1998 17:29:52 -0800
  • Re: [SI-LIST] : Differential impedance Thu, 12 Nov 1998 09:11:20 -0800
  • [SI-LIST] : Schottky diode termination Tue, 20 Oct 1998 15:24:54 -0700
  • Re: [SI-LIST] : USB differential lines. Wed, 30 Sep 1998 09:33:14 -0700
  • Re: [SI-LIST] : Trace impedance Thu, 20 Aug 1998 09:23:00 -0700
  • Re: [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 15:08:20 -0700
  • Re: [SI-LIST] : Another trace-Z question Thu, 28 May 1998 15:12:32 -0700
  • Re: [SI-LIST] : Decoupling:routing Mon, 27 Apr 1998 09:41:13 -0700
  • Re: [SI-LIST] : RE:Termination of High Speed Bus Fri, 03 Apr 1998 09:29:31 -0800
  • Re: [SI-LIST] : Earth Ground Mon, 16 Feb 1998 21:33:01 -0800
  • Re: [SI-LIST] : SI-LIST Mon, 26 Jan 1998 08:58:19 -0800
  • [SI-LIST] : UltraCAD PCB Transmission Line Calculator Fri, 12 Dec 1997 11:26:18 -0500
  • [SI-LIST] : UltraCAD Calculator Thu, 11 Dec 1997 13:49:01 -0500
  • [SI-LIST] : Embedded microstrip calculations, Ultracad Calculator Thu, 11 Dec 1997 09:27:52 -0500
  • [SI-LIST] : Embedded microstrip calculations, Ultracad Calculator Thu, 11 Dec 1997 09:10:40 -0500
  • RE: [SI-LIST] : Does solder mask reduce trace impedance ? Tue, 09 Dec 1997 10:12:34 -0500
  • [SI-LIST] : UltraCAD needs 2 designers Tue, 30 Sep 1997 11:52:21 -0400
  • Re: [SI-LIST] : stackup impedance. Mon, 29 Sep 1997 16:37:14 -0400
  • [SI-LIST] : UltraCAD needs another designer Wed, 10 Sep 1997 15:26:04 -0400
  • [SI-LIST] : Books Fri, 12 Sep 1997 10:07:34 -0400
  • RE: [SI-LIST] : Regular Full-time Technical Positions Tue, 26 Aug 1997 09:39:41 -0400
  • Help/cross-talk guidelines Tue, 08 Apr 1997 10:33:50 -0400
  • Re: decoupling/ bypass capacitors at connectors Thu, 06 Mar 1997 11:03:39 -0500
• Doug Day
  • [SI-LIST] : W-element Simulation Sun, 28 Sep 1997 09:25:40 -0700
  • Re: [SI-LIST] : Schiffman phase shifters Sun, 28 Sep 1997 09:19:13 -0700
• Doug Piper
  • [SI-LIST] : Position Available, Thu, 20 Aug 1998 11:22:40 -0400
  • [SI-LIST] : Fibre-Channel Equaization Circuits Thu, 20 Aug 1998 10:34:13 -0400
• Douglas McKean
  • Re: [SI-LIST] : How to estimate total layers needed or trace Mon, 28 Dec 1998 13:32:54 -0800
  • Re: [SI-LIST] : Text Book in SI Wed, 16 Dec 1998 11:54:04 -0800
  • Re: [SI-LIST] : Calculating Trace Inductance Tue, 24 Nov 1998 16:57:34 -0800
  • [SI-LIST] : Calculating Trace Inductance Tue, 24 Nov 1998 14:06:50 -0800
• Dr. Bardo Mueller
  • Radiation Losses of Transmission Lines Wed, 9 Jul 1997 08:25:57 +0200
  • Radiation Losses of Transmission Lines Tue, 8 Jul 1997 08:23:28 +0200
  • Line Parameters of Twisted Cables ? Fri, 11 Apr 1997 13:15:00 +0200
  • Line Parameters of Twisted Cables ? Fri, 11 Apr 1997 13:13:12 +0200
  • Line Parameters of Twisted Cables ? Wed, 9 Apr 1997 15:38:02 +0200
• Dr. Edward P. Sayre
  • [SI-LIST] : A/D and D/A Converters PWR/GND Connection Tue, 20 Oct 1998 20:08:25 -0400
  • FWD+: Re: [SI-LIST] : Trace impedance Wed, 26 Aug 1998 18:46:24 -0400
  • Re: [SI-LIST] : Incorporating 3-d passive circuit models into Sat, 25 Apr 1998 09:38:18 -0400
  • [SI-LIST] : Determining CMOS Cin with TDR methodology Wed, 15 Apr 1998 10:13:24 -0400
  • [SI-LIST] : Re: IBIS connector models Mon, 15 Dec 1997 13:41:21 -0500
  • [SI-LIST] : RE: IBIS Open Forum minutes of 12/5 Fri, 12 Dec 1997 10:34:22 -0500
  • Re: [SI-LIST] : About multilayer Board Thu, 04 Dec 1997 13:58:19 -0500
  • RE: Re[2]: [SI-LIST] : Decoupling capacitor selection & plac Fri, 07 Nov 1997 12:13:38 -0500
  • Re: [SI-LIST] : EMI Wed, 29 Oct 1997 16:46:17 -0500
  • Re: [SI-LIST] : Modeling connector pin vias Wed, 29 Oct 1997 16:38:12 -0500
  • [SI-LIST] : Schiffman phase shifters Sun, 28 Sep 1997 10:32:44 -0400
  • Re: [SI-LIST] : skin effect and transmission line simulators Mon, 8 Sep 1997 19:27:34 -0400
  • [SI-LIST] : Skin effect Modeling and Verification Sat, 6 Sep 1997 11:47:00 -0400
  • [SI-LIST] : An update on the IBIS East meeting for 18 September, 1997 Wed, 27 Aug 1997 22:33:43 -0400
  • Re: [SI-LIST] : Regular Full-time Technical Positions Mon, 25 Aug 1997 21:59:23 -0400
  • [SI-LIST] : Rev -1 Eastern IBIS Kickoff Meeting Sept 18 Sun, 24 Aug 1997 12:19:46 -0400
  • [SI-LIST] : Eastern IBIS Kickoff Meeting Sept 18 Fri, 22 Aug 1997 15:20:45 -0400
  • [SI-LIST] : Buried Capacitors Tue, 29 Jul 1997 17:49:11 -0700 (PDT)
  • Re: [SI-LIST] : TDR formula Tue, 29 Jul 1997 17:46:04 -0400
  • Differential Impedance Thu, 10 Apr 1997 21:59:06 -0400
  • Re: decoupling/ bypass capacitors at connectors Tue, 4 Mar 1997 21:31:32 -0500
  • Re: Modeling - Fast Tr Thu, 5 Sep 1996 15:58:21 -0400
  • Limits in MoM calculations Thu, 30 May 1996 16:26:21 -0400
  • Re: Re[4]: impedance across ground plane Sat, 24 Feb 1996 11:12:17 -0500
  • Re: Re[2]: impedance across ground plane Fri, 23 Feb 1996 17:01:41 -0500
  • Re: shield layer connection Fri, 12 Jan 1996 16:03:02 -0500
  • Re: shield layer connection Tue, 9 Jan 1996 12:21:19 -0500
• ed_crean@smtplink.spectrian.com
  • Re[2]: [SI-LIST] : Power Supply Noise Filters Tue, 31 Mar 98 12:22:05 -0800
  • Re: [SI-LIST] : EMI Measurement Wed, 25 Mar 98 13:59:13 -0800
  • Re[2]: [SI-LIST] : power supply filtering and bypassing Fri, 06 Mar 98 08:00:13 -0800
  • Re: [SI-LIST] : power supply filtering and bypassing Thu, 05 Mar 98 14:02:31 -0800
  • Re: [SI-LIST] : Other materials for GHz application Tue, 02 Dec 97 08:44:49 -0800
• Edlund, Greg
  • RE: [SI-LIST] : SSO in ASICs Mon, 25 Aug 1997 08:50:27 -0400
  • RE: Partial Inductance Tue, 17 Jun 1997 16:46:45 -0400
  • FW: reactance of 0805 and smaller SMT resistors Mon, 16 Jun 1997 08:37:51 -0400
  • RE: Inter-Symbol Interference Thu, 5 Jun 1997 09:57:19 -0400
  • RE: Differential clock Wed, 9 Apr 1997 10:26:59 -0400
  • L/R response time Mon, 17 Feb 1997 19:21:21 -0500
  • RE: S-Parameter to SPICE Model Converter Wed, 6 Nov 1996 11:47:44 -0500
• efy@ccrl.nj.nec.com
  • Re: [SI-LIST] : Decoupling capacitors Tue, 11 Aug 1998 18:44:04 -0400
• eli leshem
  • Please add me to your mailing list. Fri, 20 Dec 96 17:58:14 EST
• Elias Lozano
  • [SI-LIST] : Crow bar current (dc switching current) vs power Tue, 14 Jul 1998 15:19:56 -0700
  • [SI-LIST] : Signal Integrity/Board design Mon, 23 Mar 1998 15:13:57 -0800
  • [SI-LIST] : Question about Gear vs Trapezoidal methods for simulations within HSPICe Thu, 5 Mar 1998 14:51:14 -0800
  • RE: [SI-LIST] : AGP Buffer strengths Wed, 19 Nov 1997 17:31:29 -0800
  • RE: [SI-LIST] : Guard banding Mon, 10 Nov 1997 17:20:42 -0800
• Elizabeth Perigault
  • Re: [SI-LIST] : SPICE Buffer Models Tue, 31 Mar 1998 17:48:06 -0800
  • [SI-LIST] : SPICE Buffer Models Tue, 31 Mar 1998 14:53:07 -0800
• Ellis, John R
  • FW: [SI-LIST] : Contact Current Rating ? Fri, 22 May 1998 10:17:33 -0500
  • [SI-LIST] : "Bob Smith" Termination Mon, 11 Aug 1997 14:51:50 -0500
  • FW: SI engineers wanted - address correction Mon, 28 Apr 1997 09:21:00 -0600
  • SI engineers wanted Fri, 25 Apr 1997 08:52:56 -0600
• ELUZ YAACOV 9115/9 608 3467 362/7-s100_5
  • Spice to IBIS Tue, 11 Mar 1997 15:12:44 +0200
  • Spice to IBIS Tue, 11 Mar 1997 14:56:41 +0200
• Elya B. Joffe
  • [SI-LIST] : D/A and A/D Connections Thu, 22 Oct 1998 00:03:59 +2
  • [SI-LIST] : A/D and D/A Converters PWR/GND Connection Mon, 19 Oct 1998 22:38:28 +2
  • Re: [SI-LIST] : High Permittivity Board Level Decoupling and related issues Wed, 17 Jun 1998 00:23:06 +2
  • Re: [SI-LIST] : High Permittivity Board Level Decoupling and related issues Mon, 15 Jun 1998 21:58:39 +2
  • [SI-LIST] : "Picket Fence" (Via Fence) for increasing isolation between Fri, 16 Jan 1998 18:46:48 +2
• Eric B. Lewis
  • re: [SI-LIST] : Complex Planes Wed, 23 Sep 1998 10:13:34 -0700
  • [SI-LIST] : Complex Planes Tue, 22 Sep 1998 16:01:40 -0700
  • [SI-LIST] : Dieletric Constant Polyimide Fri, 12 Jun 1998 09:42:38 -0700
  • [SI-LIST] : Clock and Transmission Line Termination Mon, 11 May 1998 09:23:18 -0700
  • [SI-LIST] : SI-LIST Mon, 26 Jan 1998 09:47:41 -0800
  • [SI-LIST] : [SI-LIST]:S,R,Z, I logic states Mon, 22 Sep 1997 13:58:33 -0700
  • Re: [SI-LIST] : skin effect and transmission line simulators Thu, 4 Sep 1997 12:50:41 -0700
• Eric Bogatin
  • RE: [SI-LIST] : Calculating Trace Inductance Tue, 24 Nov 1998 19:25:09 -0600
  • RE: [SI-LIST] : Design Note on Right Angle Bends Sat, 11 Jul 1998 16:52:46 -0500
  • RE: [SI-LIST] : How to construct guard bands in Ansoft 2D Fri, 29 May 1998 13:59:13 -0500
  • Re: [SI-LIST] : How to construct guard bands in Ansoft 2D Fri, 29 May 1998 11:47:31 -0500
  • Re: [SI-LIST] : Ansoft 2D extractor question Fri, 24 Apr 1998 09:00:59 -0500
  • [SI-LIST] : Ansoft HFSS Technical Workshop, May 14, 15 Mon, 16 Mar 1998 09:33:35 -0600
  • Re: [SI-LIST] : Polylines conversion for Maxwell SI Solver Thu, 22 Jan 1998 09:05:07 -0600
  • Re: [SI-LIST] : low-cost 2-D field solver Mon, 10 Nov 1997 08:30:43 -0800
  • [SI-LIST] : Ansoft SI seminar coming soon Wed, 29 Oct 1997 09:21:30 -0800
  • Re: [SI-LIST] : stackup impedance. Wed, 17 Sep 1997 11:30:54 -0700
  • Re: Formulas for Crosstalk Calculation PCB traces Sun, 06 Jul 1997 21:37:59 -0700
  • Ansoft Seminar Series this week Sat, 29 Mar 1997 11:19:30 -0800
• Eric Bracken
  • more questions about buried PCB capacitors Mon, 10 Jun 1996 15:05:28 -0400
• Eric N. Lewis
  • [SI-LIST] : signal level conversions Thu, 04 Sep 1997 11:33:57 -0700
• Eric Wheatley
  • Re: reactance of 0805 and smaller SMT resistors Fri, 13 Jun 1997 16:45:20 -0700
  • [SI-LIST] : High freq. mag. prop. of Kovar Thu, 31 Jul 1997 11:09:06 -0700
  • Re: differential impedance Wed, 09 Apr 1997 18:26:58 -0700
  • Inductance calculation Thu, 13 Feb 1997 16:37:07 -0800
• ERIC-CS_CHOW@HP-Malaysia-om1.om.hp.com
  • [SI-LIST] : Re: microwave radiation due to network analyzers Fri, 22 May 1998 18:40:20 +0800
  • [SI-LIST] : Re: microwave radiation due to network analyzers Fri, 22 May 1998 16:06:51 +0800
• F.Hart
  • differential impedance Wed, 9 Apr 1997 12:46:32 -0500
  • Skew, Skew, Differential Skew Thu, 1 Aug 1996 12:36:47 -0500
  • Re: FWD: Impedance Software Tue, 30 Jul 1996 17:06:07 -0500
  • More on Ground Planes Fri, 26 Jul 1996 16:34:21 -0500
  • Differential Pair Skew Fri, 26 Jul 1996 16:06:35 -0500
  • Ground Plane Info Thu, 25 Jul 1996 12:32:42 -0500
  • Happy Engineers Week!! Tue, 20 Feb 1996 10:02:10 -0600
  • More on Eye Patterns Fri, 26 Jan 1996 12:28:33 -0600
  • Eye Patterns Mon, 22 Jan 1996 16:59:49 -0600
• Fabian Wai Lee Kung
  • Re[2]: Xtalk/Zo tools Fri, 19 Apr 96 08:54:00 PDT
• Fabrice ILPONSE
  • [SI-LIST] : IEEE (where to find them freely on the web?) Thu, 23 Apr 1998 14:15:32 +0200
  • [SI-LIST] : Parasitics + timing (any idea) Fri, 27 Mar 1998 10:01:07 +0100
  • [SI-LIST] : newbye Mon, 23 Mar 1998 19:02:59 +0100
• fabrizio zanella
  • [SI-LIST] : Differential impedance Wed, 11 Nov 98 19:04:15 -0500
  • Re: [SI-LIST] : Trace impedance Thu, 20 Aug 98 12:25:35 -0400
  • [SI-LIST] : SI opening - EMC Tue, 18 Aug 98 13:41:56 -0400
  • re: [SI-LIST] : crosstalk through resistor networks? Mon, 17 Aug 98 13:18:53 -0400
  • Re: [SI-LIST] : Excessive clock overshoot Thu, 14 May 98 8:24:13 -0400
  • [SI-LIST] : Excessive clock overshoot Wed, 13 May 98 16:16:51 -0400
  • re: [SI-LIST] : Controlled impedance in Flex Circuit Tue, 24 Mar 98 8:10:53 -0500
  • re: [SI-LIST] : Diff measurements with VNA Wed, 25 Feb 98 11:36:15 -0500
  • [SI-LIST] : Serpentine traces Wed, 11 Feb 98 13:00:51 -0500
  • re: [SI-LIST] : Re: Embedded microstrip calculations, Ultrac... Thu, 11 Dec 97 7:48:01 -0500
  • re: [SI-LIST] : Guard banding Mon, 10 Nov 97 18:47:34 -0500
  • re: [SI-LIST] : Formulas for Calculating PTH Capacitance Tue, 23 Sep 97 14:50:12 -0400
  • Re: [SI-LIST] : PCB parameters Fri, 19 Sep 97 10:38:06 -0400
  • Re: [SI-LIST] : skin effect and transmission line simulators Mon, 8 Sep 97 7:52:01 -0400
  • re: [SI-LIST] : Eastern IBIS Kickoff Meeting Sept 18 Mon, 25 Aug 97 9:19:36 -0400
  • 3.3V/5V planes Thu, 17 Jul 97 10:54:54 -0400
  • Re: What is SSTL? Tue, 3 Jun 97 7:48:20 EDT
  • re: Help/cross-talk guidelines Wed, 9 Apr 97 17:31:23 EDT
  • Differential clock Wed, 9 Apr 97 9:25:52 EDT
  • FCT806 Clock Driver Wed, 15 Jan 97 14:28:15 EST
  • Re: Fast TR 6 Sep 1996 10:49:25 -0400
  • Re: FWD: Impedance Software 31 Jul 1996 08:29:05 -0400
  • Xtalk/Zo tools 17 Apr 1996 13:43:48 -0400
• fangj@binghamton.edu
  • re: [SI-LIST] : Guard banding Mon, 10 Nov 1997 23:02:14 -0500 (EST)
  • Re: [SI-LIST] : skin effect and transmission line simulators Fri, 5 Sep 1997 11:20:38 -0400 (EDT)
  • Re: Newbie question Re: PCB SI simulation tools Mon, 14 Jul 1997 13:10:12 -0400 (EDT)
• Farrokh Mottahedin
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Wed, 9 Dec 1998 09:41:50 -0800
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Wed, 9 Dec 1998 09:41:50 -0800
  • RE: [SI-LIST] : Backplane connectors for Fibre Channel Tue, 24 Nov 1998 17:23:16 -0800
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 13:33:21 -0700
  • RE: [SI-LIST] : PCI Slew Rate Test Load Wed, 8 Apr 1998 16:11:48 -0700
  • Re: Thermal Relief Design Mon, 16 Jun 1997 10:19:54 -0700
  • Inter-Symbol Interference Wed, 4 Jun 1997 17:20:42 -0700
  • Re: animation program to show travelling wave Mon, 21 Apr 1997 09:27:41 -0700
  • Separate +5V Plane Thu, 27 Mar 1997 14:59:01 -0800
  • SI Engineering Position Tue, 3 Dec 1996 09:04:27 -0800
• Fethi Bellamine
  • Re: [SI-LIST] : Teaching SI Wed, 13 Aug 1997 12:09:28 -0500
  • Re: [SI-LIST] : Teaching SI Tue, 12 Aug 1997 15:29:59 -0500
• Frances Hart
  • [SI-LIST] : Opening at Dell 29 Aug 97 09:12 CDT
• Francesc Moll
  • Re: [SI-LIST] : newbye Tue, 24 Mar 1998 15:40:05 -0500
• Frank Yuan
  • Re: [SI-LIST] : SI openings at Stratus -- ... last one Thu, 12 Feb 1998 17:43:29 -0800
  • Re: [SI-LIST] : bypass cap question (long, simple) Mon, 02 Feb 1998 16:44:13 -0800
  • Re: Ground Plane Info Thu, 25 Jul 96 16:10:06 PDT
• Fred
  • Re: Shielding Wed, 2 Jul 1997 09:42:15 +0800
  • Re: differential impedance Wed, 9 Apr 1997 14:58:48 +0800
  • Re: IBIS Models or full spice netlist...? Mon, 30 Dec 1996 15:45:24 +0800
  • RE: Modeling - Fast Tr Fri, 6 Sep 1996 09:12:30 +0800
  • Re: Modeling - Fast Tr Thu, 5 Sep 1996 14:46:24 +0800
  • Re: Modeling - Fast Tr Thu, 5 Sep 1996 11:38:49 +0800
  • Re: SI- Termination Comment Wed, 24 Apr 1996 16:58:26 +0800
  • Re: Alloy-42 Mon, 22 Apr 1996 17:20:50 +0800
• Fred Balistreri
  • Re: [SI-LIST] : IC input impedance Tue, 13 Oct 1998 11:38:21 -0700
  • Re: [SI-LIST] : BGA Ni-Au platting pattern. Wed, 07 Oct 1998 08:22:36 -0700
  • Re: [SI-LIST] : USB differential lines. Wed, 30 Sep 1998 09:06:39 -0700
  • Re: [SI-LIST] : PCB design rules for Ultra 2 SCSI SE / LVD differential lines. Wed, 30 Sep 1998 09:41:47 -0700
  • Re: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 12:57:27 -0700
  • Re: [SI-LIST] : Signal integrity simulation tool - your opinion a nd recommandation Wed, 02 Sep 1998 11:24:00 -0700
  • Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on? Wed, 13 May 1998 17:08:11 -0700
  • Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on? Wed, 13 May 1998 10:06:08 -0700
  • Re: [SI-LIST] : IBIS to Spice Tue, 12 May 1998 16:08:07 -0700
  • Re: [SI-LIST] : Inductance vs. frequency Fri, 24 Apr 1998 15:52:34 -0700
  • Re: [SI-LIST] : Incorporating 3-d passive circuit models into SPICE Fri, 24 Apr 1998 15:56:04 -0700
  • Re: [SI-LIST] : Dual Stripline impedance Wed, 15 Apr 1998 11:48:10 -0700
  • Re: [SI-LIST] : Convert an IBIS model to SPICE Model. Fri, 03 Apr 1998 11:06:19 -0800
  • Re: [SI-LIST] : bypass cap question (long, simple) Tue, 03 Feb 1998 12:02:39 -0800
  • [SI-LIST] : Evaluation of Ventor Tools Fri, 12 Dec 1997 09:11:10 -0800
  • Re: [SI-LIST] : Some questions about capacitor reliability Thu, 11 Dec 1997 17:54:40 -0800
  • Re: [SI-LIST] : Evaluation of Vendor tools on SI list Thu, 11 Dec 1997 17:05:44 -0800
  • [SI-LIST] : Evaluation of Vendor tools on SI list Thu, 11 Dec 1997 11:23:48 -0800
  • Re: [SI-LIST] : Embedded microstrip calculations, Ultracad Calculator Wed, 10 Dec 1997 10:13:21 -0800
  • Re: [SI-LIST] : Does solder mask reduce trace impedance ? Tue, 09 Dec 1997 09:34:50 -0800
• Fred Rosenberger
  • Re: [SI-LIST] : High Speed Queries Fri, 6 Nov 1998 16:56:40 -0600 (CST)
  • [SI-LIST] : New Book: "Digital Systems Engineering" by Dally and Poulton Wed, 28 Oct 1998 09:08:20 -0600 (CST)
  • [SI-LIST] : Schottky diode termination Wed, 28 Oct 1998 08:50:07 -0600 (CST)
  • [SI-LIST] : diode terminations(?) Tue, 15 Sep 1998 16:30:22 -0500 (CDT)
  • Errata for book: "Digital Circuits Electrical Design" by Ron K. Poon Fri, 22 Nov 1996 08:46:34 -0600
• Fred Townsend
  • Re: [SI-LIST] : Types of Bypass Caps Thu, 26 Feb 1998 13:11:52 -0800
  • Re: [doug@eskimo.com: Re: [SI-LIST] : Earth Ground] Tue, 17 Feb 1998 21:42:29 -0800
  • Re: [SI-LIST] : Earth Ground Mon, 16 Feb 1998 18:03:37 -0800
  • Re: [SI-LIST] : More on differential impedance calculations Thu, 05 Feb 1998 17:03:29 -0800
  • [SI-LIST] : Re: Differential SCSI Thu, 05 Feb 1998 14:49:00 -0800
  • Re: [SI-LIST] : FW: signal isolation, RF board Fri, 30 Jan 1998 11:08:26 -0800
  • Re: [SI-LIST] : Output shorted to Ground! Wed, 07 Jan 1998 08:24:51 -0800
  • Re: [SI-LIST] : Signal Integrity of 500 MHz on PCB Thu, 06 Nov 1997 08:30:52 -0800
  • Re: [SI-LIST] : Decoupling capacitor selection & placement Tue, 28 Oct 1997 23:26:30 -0800
  • Re: [SI-LIST] : Single-ended SCSI vs. di Fri, 19 Sep 1997 23:45:45 -0700
• g.rossi@crf.it
  • R: [SI-LIST] : Serpentine traces Fri, 24 Apr 1998 09:02:00 +0200
  • [SI-LIST] : IBIS AND EMC Wed, 01 Apr 1998 14:13:45 +0200
  • R: need help for networking loop back, Thanks Wed, 28 May 1997 07:55:25 +0200
• gaofeng@Synopsys.COM
  • Re: Impedance Software Tue, 30 Jul 1996 10:08:00 -0700
• Garry Allen
  • [SI-LIST] : Future bus backplane Fri, 05 Dec 1997 21:17:44 +1100
• Gary
  • [SI-LIST] : Transmission Line Theory Mon, 28 Dec 1998 18:10:39 -0600
  • Comp overstress Mon, 11 Mar 1996 17:23:47 -0800
  • Hello! Favorite pubs? Thu, 18 Jan 1996 14:16:14 -0800
• Gary Crowell Sr.
  • Re: [SI-LIST] : Diodes, EMC, ESD Protection networks Tue, 12 May 1998 08:46:43 -0600
• Gary Fowler
  • Re: [SI-LIST] : SI openings at Stratus else delete -- OBJECTIONS ... Tue, 17 Feb 1998 10:20:09 -0500
  • [SI-LIST] : Confidential Search for Sr Signal Integrity Engineer Fri, 17 Oct 1997 18:04:31 +0800
• Gary Oehrle
  • IBIS 3.0 Tue, 8 Jul 1997 15:10:14 -0700
• Gary Peterson
  • Re: Power/ground connections/bypassing on ICs Mon, 28 Apr 1997 12:05:12 -0600
  • FCT806 Clock Driver Wed, 15 Jan 1997 13:10:44 -0700
  • ASSY: GEN: Popcorning during reflow Wed, 30 Oct 1996 14:44:06 -0700
  • Wanted...PCI bus 3V driver/receiver models Mon, 26 Feb 96 16:23:13 MST
  • impedance across ground plane Fri, 16 Feb 96 08:42:39 MST
• Gayle Standard
  • [SI-LIST] : SI Engineer Wed, 17 Dec 1997 12:32:28 -0600
• GEisler
  • Re: [SI-LIST] : Precision Clocking Tue, 7 Apr 1998 12:26:24 EDT
  • [SI-LIST] : Precision Clocking Mon, 6 Apr 1998 15:45:09 EDT
• Georg Ramsch
  • [SI-LIST] : Re: Tue, 15 Dec 1998 09:12:19 +0100
  • Re: [SI-LIST] : SI University programs Tue, 15 Dec 1998 08:23:53 +0100
• George Harris
  • RE: [SI-LIST] : Terminations scheme for bi-directional bus Tue, 30 Jun 1998 14:21:26 -0400
  • RE: [SI-LIST] : Differential Signals Wed, 21 Oct 1998 17:28:23 -0400
  • RE: [SI-LIST] : Signal integrity simulation tool - your opinion a Wed, 2 Sep 1998 09:36:01 -0400
  • RE: [SI-LIST] : Clock tree Thu, 6 Aug 1998 14:45:10 -0400
  • FW: [SI-LIST] : Output Impedance Wed, 1 Apr 1998 14:17:06 -0500
• George Stevens/UB Networks
  • Re: component over-stress 13 Mar 96 10:42:28 EDT
  • component overstress 11 Mar 96 15:04:28 EDT
  • pc board AC noisemap standards 11 Mar 96 14:24:29 EDT
  • Re: subscribe to si-list 30 Jan 96 14:01:12 EDT
• Gerald Johnson
  • Re: [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 13:47:57 -0500
• Geraldo Peres Caixeta
  • Vertical Transmission Line ... Fri, 6 Jun 1997 15:25:43 -0300 (BSC)
• Goodarz Goodarzi
  • [SI-LIST] : Crystal Question Tue, 07 Apr 1998 12:13:24 -0400
• Gopala Krishna M.R.
  • [SI-LIST] : Output shorted to Ground! Wed, 7 Jan 1998 09:21:47 +0530 (IST)
  • [SI-LIST] : Decoupling capacitor selection & placement Wed, 29 Oct 1997 12:11:52 +0530 (IST)
  • [SI-LIST] : PCB track length and ringing Tue, 23 Sep 1997 09:02:26 +0530 (IST)
• Grasso, Charles
  • [SI-LIST] : Backplane connectors for Fibre Channel Tue, 24 Nov 1998 14:25:01 -0700
  • RE: [SI-LIST] : Measuring Ground Noise Tue, 23 Jun 1998 07:47:28 -0600
  • RE: [SI-LIST] : High Permittivity Board Level Decoupling and related issues Tue, 16 Jun 1998 09:43:17 -0600
  • [SI-LIST] : How to construct guard bands in Ansoft 2D Tue, 26 May 1998 10:21:43 -0600
  • [SI-LIST] : How to construct guard bands in Ansoft 2D Tue, 26 May 1998 10:21:43 -0600
  • RE: [SI-LIST] : Decoupling:routing Mon, 11 May 1998 10:44:18 -0600
  • [SI-LIST] : Ansoft 2D extractor question Thu, 23 Apr 1998 14:56:21 -0600
  • [SI-LIST] : EMC Symposium Fri, 23 Jan 1998 14:21:24 -0700
  • [SI-LIST] : IEEE EMC Symposium - Denver 1998 Mon, 12 Jan 1998 14:34:09 -0700
  • RE: [SI-LIST] : EMI Wed, 29 Oct 1997 09:03:05 -0700
  • RE: [SI-LIST] : Regular Full-time Technical Positions Tue, 26 Aug 1997 07:43:03 -0600
  • RE: Shielding Wed, 2 Jul 1997 08:17:59 -0600
  • PSI Connector impedances Tue, 1 Jul 1997 09:37:15 -0600
  • RE: Vcc power planes Fri, 20 Jun 1997 14:49:44 -0600
  • RE: Power/ground connections/bypassing on ICs Wed, 7 May 1997 12:47:23 -0600
  • RE: Separate +5V Plane Fri, 28 Mar 1997 08:55:26 -0700
• Grebenkemper, John
  • RE: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 1998 18:13:07 -0600
  • RE: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 1998 18:13:07 -0600
• greg doyle
  • [SI-LIST] : High Speed Design Symposium Tue, 24 Mar 1998 13:36:11 -0600
• Greg Edlund
  • RE: [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 15:51:00 -0400
  • FW: [SI-LIST] : IBIS Model Verification (correction) Fri, 11 Sep 1998 08:47:53 -0400
  • [SI-LIST] : update on measuring CMOS Cin with HP4275A Tue, 21 Apr 1998 09:51:30 -0400
  • [SI-LIST] : measuring CMOS Cin with HP4275A Fri, 10 Apr 1998 10:38:53 -0400
  • RE: [SI-LIST] : Output Impedance Thu, 2 Apr 1998 11:14:09 -0500
  • [SI-LIST] : IBIS Accuracy Sub-Committee Minutes Fri, 6 Mar 1998 12:44:05 -0500
  • RE: [SI-LIST] : transmission line theory Tue, 3 Mar 1998 13:05:37 -0500
  • RE: [SI-LIST] : Driver Strength Tue, 3 Mar 1998 08:05:33 -0500
  • [SI-LIST] : [SI-LIST]: [MODEL CREATION] & IBIS models Wed, 11 Feb 1998 13:51:37 -0500
  • RE: [SI-LIST] : SSO : How to identify SSO groups? Mon, 22 Dec 1997 09:21:29 -0500
  • RE: [SI-LIST] : Preferred PWB impedances Wed, 19 Nov 1997 09:20:24 -0500
  • [SI-LIST] : low-cost 2-D field solver Fri, 31 Oct 1997 16:46:24 -0500
  • transmission line text Mon, 10 Jun 1996 08:45:25 -0500
  • lab electrical requirements Wed, 01 May 1996 15:08:34 -0500
  • Re: Modeling for packages (Electrical and thermal). Fri, 12 Apr 1996 01:38:10 -0500
  • Re: component overstress Mon, 11 Mar 1996 15:46:26 -0600
  • test - please ignore Mon, 11 Mar 1996 13:53:45 -0600
  • Re: Ground Bounce? Mon, 04 Mar 1996 10:04:47 -0600
  • eye pattern reading Fri, 26 Jan 1996 13:35:23 -0600
  • Re: Eye Patterns Mon, 22 Jan 1996 17:33:51 -0600
  • whadya know... Mon, 22 Jan 1996 15:49:33 -0600
  • source for IEEE and JEDEC docs Fri, 22 Dec 1995 13:12:38 -0600
• Gregory P. Fitzgerald
  • Re: [SI-LIST] : BGA Ni-Au platting pattern. Wed, 07 Oct 1998 08:08:29 -0400
  • Re: [SI-LIST] : IBIS Version 3.0 Thu, 21 May 1998 09:12:53 -0400
  • Re: [SI-LIST] : bga Wed, 06 May 1998 14:37:33 -0400
  • Re: [SI-LIST] : Modeling Package parasitics Mon, 16 Feb 1998 18:42:15 -0500
• Guang-Tsai Lei
  • Re: S-parameters and non-linear devices Tue, 10 Sep 1996 17:26:29 -0500
  • Re: more questions about buried PCB capacitors Mon, 10 Jun 1996 22:03:58 -0500
  • Re: more questions about buried PCB capacitors Mon, 10 Jun 1996 21:59:16 -0500
  • Re: more questions about buried PCB capacitors Mon, 10 Jun 1996 21:52:26 -0500
• Gus Panella
  • FAQ request Thu, 10 Apr 1997 20:34:03 -0500
  • Re: IBIS Models or full spice netlist...? Mon, 30 Dec 1996 21:13:37 -0600
  • Re: Ansoft mesh generation Sat, 9 Nov 1996 12:38:31 -0600
• Gustavo Blando
  • [SI-LIST] : [MODEL CREATION] Mon, 9 Feb 1998 10:54:28 -0500 (EST)
• haller@wonder.ENET.dec.com
  • FWD+: Re: [SI-LIST] : Trace impedance Wed, 26 Aug 98 17:00:26 EDT
  • RE: FCT806 Clock Driver Fri, 17 Jan 97 08:44:08 EST
  • Viewlogic's XTK Thu, 25 Jul 96 12:29:35 EDT
• Hamid Kharrati
  • [SI-LIST] : Transmission line model in Pspice Fri, 15 May 1998 14:45:47 -0700
• hanna@dalsa.com
  • [SI-LIST] : Miller Capacitance Thu, 17 Sep 1998 09:02:08 -0400
  • Re: [SI-LIST] : IC DIE SHRINK Mon, 20 Jul 1998 12:15:29 -0400
• Hans Ziegler
  • Spice model for PCI driver Mon, 14 Jul 1997 17:39:54 +0000
  • Spice model for PCI driver Mon, 14 Jul 1997 17:39:54 +0000
  • Formulas for Crosstalk Calculation PCB traces Thu, 3 Jul 1997 19:41:34 +0000
• Hans-Joerg John
  • Re: [SI-LIST] : Differential Clock Routing Fri, 09 Jan 1998 08:11:10 +0100
• HANS_MELLBERG@NON-HP-Cupertino-om5.om.hp.com
  • [SI-LIST] : EMC Society Meeting Notice, Sunnyvale, CA Thu, 8 Jan 1998 15:01:25 -0800
  • [SI-LIST] : IEEE EMC meting, SF Bay Area Mon, 8 Dec 97 14:21:42 -0800
  • [SI-LIST] : Santa Clara Valley Chapter meeting Tue, 11 Nov 97 10:13:43 -0800
  • Re: [SI-LIST] : EMI Wed, 29 Oct 97 09:55:12 -0800
  • [SI-LIST] : bare board resonance test Wed, 1 Oct 97 16:00:10 -0700
  • Re: [SI-LIST] : PCB track length and ringing Wed, 24 Sep 97 09:44:32 -0700
  • Re: [SI-LIST] : PCB track length and ringing Wed, 24 Sep 97 09:44:32 -0700
  • Re: [SI-LIST] : PCB track length and ringing Tue, 23 Sep 97 09:48:27 -0700
  • Re: AW: [SI-LIST] : Burst noise simulation Fri, 19 Sep 97 12:23:24 -0700
  • Re: [SI-LIST] : Transmission Line Conductors Thu, 18 Sep 97 16:07:55 -0700
  • [SI-LIST] : Dielectric loss Thu, 18 Sep 97 13:22:52 -0700
  • Re: [SI-LIST] : Regular Full-time Technical Positions Tue, 26 Aug 97 16:38:04 -0700
  • [SI-LIST] : Speaker sought Wed, 13 Aug 97 08:16:38 -0700
  • [SI-LIST] : Reliability Forums Wed, 23 Jul 97 14:07:15 -0600
  • Re: [SI-LIST] : Clock chip supply voltage Fri, 18 Jul 97 11:32:52 -0600
• HANS_MELLBERG@non-hp-santaclara-om4.om.hp.com
  • Re: Power/ground connections/bypassing on ICs Mon, 28 Apr 97 10:26:50 -0700
  • Re: vias in ECL @ >1Ghz Tue, 1 Apr 97 11:18:06 -0800
  • Re: Controlled Impedance Connectors Thu, 20 Mar 97 09:13:28 -0800
  • Re: decoupling/ bypass capacitors at connectors Wed, 5 Mar 97 09:23:45 -0800
  • Re: decoupling/ bypass capacitors at connectors Tue, 4 Mar 97 14:16:16 -0800
  • Re: Dual Stripline Tue, 4 Mar 97 14:03:45 -0800
  • Re: decoupling/ bypass capacitors at connectors Tue, 4 Mar 97 14:03:45 -0800
• HaroldLSJ
  • Re: [SI-LIST] : Precision Clocking Tue, 7 Apr 1998 00:00:43 EDT
• HaroldLSJ@aol.com
  • Re: [SI-LIST] : Burst noise simulation Wed, 17 Sep 1997 01:13:28 -0400 (EDT)
• Harris, Stanley
  • Signal Integrity Applications Engineer Thu, 17 Apr 1997 15:38:15 -0400
• Hart, Frances
  • [SI-LIST] : Opportunity at Dell Thu, 16 Apr 1998 08:56:18 -0500
• Hartmut Grabinski
  • [SI-LIST] : =?ISO-8859-1?Q?[SI-LIST]:_Premiere_course_on_=22Circuit_Simulation_and_Signal_Integrity= Wed, 25 Mar 1998 09:29:03 +0100
• Haruny Said
  • Re: [SI-LIST] : bypass cap question (long, simple) Sat, 31 Jan 1998 11:05:05 -0500
  • [SI-LIST] : IBIS Meeting September 18th Mon, 25 Aug 1997 10:36:41 -0400
• Heck, Howard
  • RE: [SI-LIST] : Transmission Line Theory Tue, 29 Dec 1998 14:47:10 -0800
  • RE: [SI-LIST] : Text Book in SI Wed, 16 Dec 1998 08:58:52 -0800
• Heinz Blennemann
  • Re: [SI-LIST] : Power-plane resonance article Thu, 10 Sep 1998 18:05:15 -0700 (PDT)
  • [SI-LIST] : OPENING: Signal Integrity Engineer, Juniper Networks Mon, 6 Apr 1998 12:01:56 -0700 (PDT)
  • Re: Shielding/ Guardbanding Tue, 1 Jul 1997 16:57:31 -0700
  • Board-Level Design Engineer Position at Silicon Graphics Thu, 2 Jan 1997 15:28:40 -0800
  • Re: IBIS Models or full spice netlist...? Mon, 30 Dec 1996 18:17:02 -0800
  • Board-Level Design Engineer Position at Silicon Graphics Mon, 23 Dec 1996 17:20:30 -0800
• Hemant Shah
  • Re: [SI-LIST] : PCB Pwr Planes Fri, 20 Mar 98 08:09:00 EST
  • FW: [SI-LIST] : Dielectric loss (Intuitive explanation) Fri, 19 Sep 97 16:06:00 EDT
• Herb Kaupp
  • Models for SCSI Ultra Thu, 21 Mar 96 10:47:10 EST
• Heyfitch, Vadim
  • FW: [SI-LIST] : FIXED: curve tracers and Output Impedance Mon, 6 Apr 1998 09:32:22 -0700
  • [SI-LIST] : Re: Controlled impedance in Flex Circuit Tue, 24 Mar 1998 08:34:06 -0800
• hgra@lfi.uni-hannover.de
  • IEEE Workshop "Signal Propagation on Interconnects" Wed, 19 Mar 1997 11:45:57 +0100
  • Silicon Circuit Design for High Speed Fri, 07 Mar 1997 16:30:03 +0100
  • Silicon Circuit Design for High Speed and Low Power Fri, 07 Mar 1997 16:23:26 +0100
• HMellberg@aol.com
  • Re: [SI-LIST] : Termination and Test Equipment leads Wed, 11 Nov 1998 09:09:52 EST
  • Re: [SI-LIST] : Design Note on Right Angle Bends Sat, 11 Jul 1998 10:46:30 EDT
  • Re: [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 17:26:56 EDT
  • [SI-LIST] : Re: EMC-98, 1 June, Santa Clara CA Fri, 29 May 1998 12:23:47 EDT
  • [SI-LIST] : EMC-98, 1 June, Santa Clara CA Fri, 29 May 1998 11:56:52 EDT
  • Re: [SI-LIST] : Characteristic impedance Thu, 28 May 1998 17:03:22 EDT
• Howard Johnson
  • [SI-LIST] : Seeking T-Tech Quick-Circuit used equipment Fri, 31 Jul 1998 15:33:11 -0700
  • [SI-LIST] : looking for "CMOS Simultaneous Switching Noise" Fri, 10 Jul 1998 14:17:50 -0700
  • Re: [SI-LIST] : Re: MEASURING POWER GROUND IMPEDANCE Tue, 16 Jun 1998 07:07:38 -0700
  • Re: [SI-LIST] : High Permittivity Board Level Decoupling and Tue, 16 Jun 1998 07:38:42 -0700
  • Re: [SI-LIST] : Re: MEASURING POWER GROUND IMPEDANCE Tue, 09 Jun 1998 13:10:55 -0700
  • [SI-LIST] : Re: [old] Differential Reflection Question Fri, 22 May 1998 16:20:34 -0700
  • Re: [SI-LIST] : attenuation calculations Fri, 22 May 1998 15:53:53 -0700
  • Re: [SI-LIST] : Modeling Package parasitics Wed, 18 Feb 1998 14:49:45 -0800
  • Re: [SI-LIST] : Earth Ground Wed, 18 Feb 1998 14:49:30 -0800
  • Re: [SI-LIST] : Earth Ground Wed, 18 Feb 1998 14:49:30 -0800
  • Re: [SI-LIST] : Serpentine traces Wed, 18 Feb 1998 14:49:35 -0800
  • Re: [SI-LIST] : SI-LIST Wed, 18 Feb 1998 14:49:25 -0800
  • Re: [SI-LIST] : Do you have a web site for signal integrity Thu, 22 Jan 1998 09:43:28 -0800
  • [SI-LIST] : Placement of series termination Sun, 11 Jan 1998 20:51:35 -0800
  • reactance of 0805 and smaller SMT resistors Fri, 13 Jun 1997 11:28:36 -0700
  • Re: Power/ground connections/bypassing on ICs Mon, 5 May 1997 14:31:32 -0700 (PDT)
  • Re: Differential clock Mon, 14 Apr 97 16:07:13 PDT
  • Public SI Seminar Mon, 17 Mar 97 15:28:27 PST
  • Re: decoupling/ bypass capacitors at connectors Tue, 4 Mar 97 11:06:04 PST
  • Inductance calculation Mon, 17 Feb 97 11:00:32 PST
  • re: IBIS Models or full spice netlist...? Mon, 30 Dec 96 11:16:13 PST
  • (Fwd) Re: Help with decoupling cap inductance Tue, 26 Nov 1996 14:31:06 -0800 (PST)
  • shields Thu, 31 Oct 1996 08:56:53 -0800 (PST)
• Howard W. Johnson
  • Differential Pair Skew Thu, 25 Jul 1996 18:06:19 -0700 (PDT)
  • Re: Ground Plane Info Thu, 25 Jul 1996 15:25:59 -0700 (PDT)
  • Schottky Diode terminator SIP packages Sat, 8 Jun 1996 13:41:55 -0700 (PDT)
  • Buried Capacitance Mon, 3 Jun 1996 12:10:41 -0700
• Istvan NOVAK
  • Re: [SI-LIST] : Measuring Ground Noise Wed, 24 Jun 1998 21:00:41 -0400
  • Re: [SI-LIST] : Re: MEASURING POWER GROUND IMPEDANCE Thu, 11 Jun 1998 22:02:23 -0400
  • [SI-LIST] : Re: MEASURING POWER GROUND IMPEDANCE Mon, 1 Jun 1998 08:08:56 -0400
  • Re: Re[2]: [SI-LIST] : power supply filtering and bypassing Sun, 8 Mar 1998 12:55:26 -0500
  • [SI-LIST] : Guard banding Tue, 11 Nov 1997 20:20:23 -0500
• J. Eric Bracken
  • Re: [SI-LIST] : Differential impedance Wed, 11 Nov 1998 20:57:05 -0500
  • Re: [SI-LIST] : How to construct guard bands in Ansoft 2D Fri, 29 May 1998 13:24:13 -0400
  • Re: [SI-LIST] : Ansoft 2D extractor question Fri, 24 Apr 1998 08:53:17 -0400
  • Re: [SI-LIST] : Question about Gear vs Trapezoidal methods for simulations within HSPICe Thu, 05 Mar 1998 20:28:52 -0500
  • Re: [SI-LIST] : skin effect and transmission line simulators Thu, 04 Sep 1997 15:55:11 -0400
  • Re: Partial Inductance Mon, 16 Jun 1997 14:58:54 -0400
  • Re: FW: reactance of 0805 and smaller SMT resistors Mon, 16 Jun 1997 09:44:43 -0400
  • Re: differential impedance Wed, 09 Apr 1997 13:48:12 -0400
  • Re: vias in ECL @ >1Ghz Tue, 01 Apr 1997 13:36:55 -0500
  • Re: L/R response time Tue, 18 Feb 1997 09:15:46 -0500
  • Re: Fast TR Thu, 05 Sep 1996 17:12:36 -0400
  • Re: Modeling - Fast TR Wed, 04 Sep 1996 17:27:36 -0400
• Jamie Metcalfe
  • Re: [SI-LIST] : skin effect and transmission line simulators Sat, 20 Sep 1997 16:32:06 +0100
• Jay Diepenbrock
  • Re: RE : RE : [SI-LIST] : RE: Models & EDA Vendors Fri, 20 Nov 1998 09:26:12 -0500
  • [SI-LIST] : A/D and D/A Converters PWR/GND Connection Tue, 20 Oct 1998 17:57:24 -0400
  • [SI-LIST] : On-board Switching Power Supply Tue, 20 Oct 1998 17:49:54 -0400
  • [SI-LIST] : SPICE Models Mon, 14 Sep 1998 11:18:47 -0400
  • [SI-LIST] : EDN SI tool Thu, 25 Jun 1998 15:36:39 -0400
  • Re: [SI-LIST] : Decoupling:routing Wed, 6 May 1998 09:18:41 -0400
  • [SI-LIST] : End launch SMA connectors Thu, 5 Mar 1998 17:49:41 -0500
  • [SI-LIST] : SMA Impedance Matching Wed, 4 Mar 1998 20:00:15 -0500
  • [SI-LIST] : SMA Impedance Matching Wed, 4 Mar 1998 20:02:36 -0500
  • Re: [SI-LIST] : Flyback Transformer Model Mon, 15 Dec 1997 12:28:29 -0500
  • [SI-LIST] : TDRs and frequency domain Mon, 15 Dec 1997 08:54:49 -0500
• JEAN-CHRISTOPHE_PAUTRAT@HP-France-om5.om.hp.com
  • [SI-LIST] : USB modeling Thu, 11 Dec 97 09:47:59 +0100
• Jean-Claude Perrin
  • fwd: Re: [SI-LIST] : Does IBIS describe output transition which both Wed, 13 May 1998 08:52:37 -0700
  • fwd: Re: [SI-LIST] : Does IBIS describe output transition which both Wed, 13 May 1998 08:52:37 -0700
• Jeff Bruce
  • Re: lab electrical requirements Wed, 1 May 1996 16:53:10 -600
• Jeff M. Gloudemans
  • Re: Re[2]: [SI-LIST] : power supply filtering and bypassing Fri, 6 Mar 1998 16:14:46 -0500 (EST)
• Jeff Miller-FJM039
  • [SI-LIST] : overshoot Wed, 26 Aug 1998 23:53:35 -0500
• Jeff Seeger
  • Re: [SI-LIST] : bga Wed, 06 May 1998 19:49:50 -0400
  • Re: [SI-LIST] : ?Dumb Question Regarding Multilayer Boards Fri, 27 Mar 1998 06:01:05 -0500
  • Re: [SI-LIST] : bypass cap question (long, simple) Tue, 03 Feb 1998 14:41:12 -0500
  • Re: [SI-LIST] : bypass cap question (long, simple) Tue, 03 Feb 1998 13:11:29 -0500
  • Re: 3.3V/5V planes Thu, 17 Jul 1997 14:47:11 -0400
  • Re: +3.3,5-board stackup problem / return currents... Mon, 07 Jul 1997 17:28:44 -0400
  • Re: Thermal Relief Design Mon, 16 Jun 1997 19:38:25 -0400
  • vias in ECL @ >1Ghz Mon, 31 Mar 1997 18:09:04 -0500
• Jeffrey_Hailey@Dell.com
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Wed, 30 Sep 1998 08:41:51 -0500
• Jerry Johnson
  • Re: [SI-LIST] : Earth Ground Tue, 17 Feb 1998 09:13:56 -0600
• Jim Healy
  • [SI-LIST] : Dielectric withstand voltage requirements Wed, 01 Jul 1998 11:13:20 -0400
• Jim Lyke
  • Re: [SI-LIST] : Trace impedance Fri, 21 Aug 1998 07:05:48 -0600
  • Re: [SI-LIST] : Trace impedance Thu, 20 Aug 1998 13:18:17 -0600
  • Re: [SI-LIST] : "Bob Smith" Termination Mon, 11 Aug 1997 14:53:16 -0600
• Jim McNamara
  • [SI-LIST] : Synchronous SRAM Application Wed, 15 Apr 1998 13:05:01 -0400
  • [SI-LIST] : Backplane Analysis / GTL Technology Wed, 23 Jul 1997 13:43:43 -0400
• Jim Tompkins
  • Re : Impedance Software Wed, 31 Jul 1996 08:27:39 -0300
• Jinhua Chen
  • Re: [SI-LIST] : Fibre-Channel Equaization Circuits Thu, 20 Aug 1998 11:35:16 -0300
• Joachim Mueller
  • [SI-LIST] : JOB POSTING Thu, 14 May 1998 17:09:10 -0400
  • Re: [SI-LIST] : stackup impedance. Thu, 18 Sep 1997 12:11:33 -0400 (EDT)
  • Re: [SI-LIST] : stackup impedance. Thu, 18 Sep 1997 12:11:33 -0400 (EDT)
  • [SI-LIST] : differential pairs Wed, 17 Sep 1997 15:43:43 -0400 (EDT)
  • Re: SI-Termination Comments Mon, 22 Apr 1996 16:36:50 +0200 (MET DST)
  • shield layer connection Mon, 8 Jan 1996 17:48:22 +0100 (MET)
• Joe Cahill
  • Re: [SI-LIST] : overshoot Thu, 27 Aug 1998 09:27:39 -0400
  • Re: [SI-LIST] : crosstalk through resistor networks? Fri, 14 Aug 1998 14:14:21 -0400
  • Re: [SI-LIST] : 3.3V Design Tue, 4 Aug 1998 13:25:23 -0400
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Wed, 1 Jul 1998 12:58:32 -0400
  • [SI-LIST] : Signal Integrity position available Tue, 26 May 1998 17:41:28 -0400
  • Re: [SI-LIST] : Characteristic impedance Thu, 28 May 1998 17:32:10 -0400
  • Re: [SI-LIST] : viewing HSPICE results without awaves Thu, 9 Apr 1998 17:53:04 -0400
  • Re: [SI-LIST] : SI openings at Stratus else delete -- OBJECT Thu, 12 Feb 1998 18:23:59 -0500
  • Re: [SI-LIST] : How to identify SSO groups? Tue, 23 Dec 1997 10:01:16 -0500
  • Re: Simultaneous Switching and differential buffer skew Mon, 14 Jul 1997 12:23:01 -0400
  • New t-line model in Hspice Wed, 9 Apr 1997 17:03:36 -0400
  • Signal Integrity position available Wed, 12 Feb 1997 07:23:18 -0600 (CST)
  • Position Open Mon, 5 Aug 1996 12:48:51 -0500 (CDT)
• JOE_CIVELLO@HP-Sonoma-om1.om.hp.com
  • Re: [SI-LIST] : Simulating Tools Thu, 12 Nov 1998 14:57:12 -0800
  • Re: [SI-LIST] : Simulating Tools Thu, 12 Nov 1998 14:57:12 -0800
• joel.kolstad@techne-sys.com
  • RE: [SI-LIST] : Single-ended SCSI vs. di Fri, 19 Sep 1997 17:30:25 -0800
  • [SI-LIST] : Single-ended SCSI vs. differential SCSI Fri, 19 Sep 1997 14:22:31 -0800
• John Birkett
  • [SI-LIST] : RE: Differential impedance Thu, 5 Feb 1998 16:04:21 -0500
  • RE: [SI-LIST] : low-cost 2-D field solver Thu, 13 Nov 1997 09:38:28 -0500
  • RE: [SI-LIST] : low-cost 2-D field solver Mon, 10 Nov 1997 09:42:49 -0500
• John Fessler
  • re:animation program to show travelling wave 21 Apr 97 13:02:01 EDT
• John Fisher
  • [SI-LIST] : Fwd: Connector question on SI Fri, 13 Nov 1998 17:15:34 -0800
  • RE: [SI-LIST] : RE: RC terminations on multidrop busses Fri, 13 Nov 1998 15:25:48 -0800
  • Re: [SI-LIST] : Mixed signal - PWR and GND configuration issue Sun, 19 Jul 1998 15:22:19 -0700
  • Re: [SI-LIST] : Measuring Ground Noise Wed, 24 Jun 1998 08:51:52 -0700
  • Re: [SI-LIST] : stackup question Tue, 14 Apr 1998 18:24:58 -0700
  • Re: Re[2]: [SI-LIST] : power supply filtering and bypassing Fri, 06 Mar 1998 12:18:49 -0800
  • Re: [SI-LIST] : power supply filtering and bypassing Thu, 05 Mar 1998 17:28:56 -0800
• JOHN HANS-JOERG
  • Re: [SI-LIST] : Backplane Analysis / GTL Technology Thu, 24 Jul 1997 09:19:37 +1
• John Heighton
  • [SI-LIST] : ANY EXPERIENCE OF MENTOR'S IS TOOLS Thu, 14 May 1998 11:49:41 +1000
• John Lin
  • guide line of PCB placement to reduce EMI/SI problem Tue, 6 May 1997 13:38:10 +0800
• John Lin - TAO
  • Minimum or Maximum package for SI Worst Case simulation? Fri, 7 Aug 1998 08:28:15 +0800
  • [SI-LIST] : Does IBIS describe output transition which both MOS turned on? Wed, 13 May 1998 10:54:34 +0800
  • [SI-LIST] : How to do correlation with two extra Rising/Falling waveforms? Thu, 9 Apr 1998 09:13:26 +0800
  • [SI-LIST] : Convert an IBIS model to SPICE Model. Thu, 2 Apr 1998 18:07:41 +0800
  • RE: [SI-LIST] : PCB Pwr Planes Mon, 23 Mar 1998 13:19:02 +0800
  • [SI-LIST] : Differential SCSI BP design Mon, 23 Feb 1998 10:25:12 +0800
  • RE: [SI-LIST] : Trace impedance measurement for dual stripline Thu, 12 Feb 1998 10:28:17 +0800
  • [SI-LIST] : Trace impedance measurement for dual stripline Wed, 11 Feb 1998 10:00:08 +0800
  • [SI-LIST] : Thanks for responding my solder mask question. Wed, 10 Dec 1997 15:41:19 +0800
  • RE: [SI-LIST] : Does solder mask reduce trace impedance ? Tue, 9 Dec 1997 17:01:49 +0800
  • [SI-LIST] : Does solder mask reduce trace impedance ? Tue, 9 Dec 1997 09:19:42 +0800
  • [SI-LIST] : Net topology, reflection cancellation ? Wed, 24 Sep 1997 09:20:22 +0800
  • [SI-LIST] : stackup impedance. Wed, 17 Sep 1997 13:59:22 +0800
  • [SI-LIST] : BackPlane stackup Tue, 29 Jul 1997 10:52:34 +0800
  • [SI-LIST] : Ground bouncing ??? Fri, 18 Jul 1997 17:05:42 +0800
  • RE: resend the question. (The Criteria of overshoot, undershoot, RingBack for different logic types Mon, 14 Jul 1997 08:59:49 +0800
  • resend the question. please answer to my fully E-mail address Wed, 9 Jul 1997 09:04:09 +0800
  • The Criteria of overshoot, undershoot, RingBack for different logic types Mon, 7 Jul 1997 09:55:15 +0800
  • Networking loop back -- Please use my email address instead of replying button Wed, 28 May 1997 15:52:08 +0800
  • need help for networking loop back, Thanks Wed, 28 May 1997 11:41:08 +0800
  • need help for networking loop back, Thanks Wed, 28 May 1997 09:54:48 +0800
• John Lipsius
  • continously variable delay line avail? Thu, 8 May 1997 13:42:00 -0700
  • math sw for Unix??? Tue, 29 Apr 1997 12:47:54 -0700
  • via clearance question Fri, 7 Mar 1997 16:25:43 -0800
• John Mladenik
  • Help Fri, 1 Mar 96 15:30 PST
• John Nguyen
  • Re: [SI-LIST] : Burst noise simulation Fri, 12 Sep 1997 09:59:56 -0700
• John Nieznanski
  • [SI-LIST] : REPOST: Breaking the silence - EMI/EMC "QUIET" users? Wed, 07 Jan 1998 17:42:18 -0500
  • [SI-LIST] : Breaking the silence: EMI/EMC "QUIET" users? Wed, 17 Dec 1997 16:18:25 -0500
  • reactance of 0805 and smaller SMT resistors? preferred suppliers? Thu, 12 Jun 1997 13:34:17 -0400
• John Philips
  • RE: [SI-LIST] : Schottky diode termination Tue, 27 Oct 1998 14:03:41 -0000
  • [SI-LIST] : Schottky diode termination Mon, 26 Oct 1998 17:09:51 -0000
  • RE: [SI-LIST] : Trace impedance Thu, 20 Aug 1998 13:55:08 +0100
• John R Benham
  • Re: (Fwd) Buried Capacitance Fri, 7 Jun 1996 02:15:50 -0400 (EDT)
• John Synesiou
  • RE: [SI-LIST] : Convert an IBIS model to SPICE Model. Fri, 3 Apr 1998 15:48:31 -0600
  • RE: [SI-LIST] : Convert an IBIS model to SPICE Model. Fri, 3 Apr 1998 10:40:11 -0600
  • RE: [SI-LIST] : Convert an IBIS model to SPICE Model. Thu, 2 Apr 1998 14:56:20 -0600
  • RE: [SI-LIST] : SPICE for SI analysis Tue, 23 Dec 1997 22:34:48 -0600
• John V Fitzpatrick
  • Re: [SI-LIST] : IBIS Model Verification Mon, 14 Sep 1998 17:57:26 +0200
  • Re: [SI-LIST] : Diff measurements with VNA Wed, 25 Feb 1998 18:31:29 +0100
  • Re: [SI-LIST] : Preferred PWB impedances Wed, 19 Nov 1997 18:41:00 +0100
  • Re: [SI-LIST] : Preferred PWB impedances Wed, 19 Nov 1997 10:49:15 +0100
  • [SI-LIST] : Can floating data bus cause DRAM soft errors? Wed, 01 Oct 1997 19:33:12 +0200
  • [SI-LIST] : SSO noise: Through current vs. Discharge current Thu, 25 Sep 1997 14:55:24 +0200
  • [SI-LIST] : SSO in ASICs Wed, 20 Aug 1997 16:58:32 +0200
  • Thanks Re: Pullup resistors on 3-state buses Mon, 16 Jun 1997 17:57:35 +0200
  • Re: What is SSTL? Tue, 03 Jun 1997 09:35:25 +0200
  • Pullup resistors on 3-state buses Tue, 03 Jun 1997 10:53:18 +0200
• John Zavertnik
  • SI job opportunity at Intel's DuPont, Washington facitlity! Wed, 12 Feb 97 13:31:00 PST
• johnlin
  • animation program to show travelling wave Wed, 28 Aug 1996 11:58:30 +0900
• johnlin@ccmail.arima.com.tw
  • [SI-LIST] : How to estimate total layers needed or trace pitch? Mon, 28 Dec 1998 10:22:03 +0800
  • Re: RE : RE : [SI-LIST] : RE: Models & EDA Vendors Fri, 20 Nov 98 12:35:23 +0800
  • Re[2]: [SI-LIST] : USB & LVDS Differential signals routing Fri, 06 Nov 98 11:08:30 +0800
  • [SI-LIST] : No subject given Fri, 06 Nov 98 09:31:06 +0800
• johnlin_at_arima.mfg@ccmail.arima.com.tw
  • Re: [SI-LIST] : Power-plane resonance article Fri, 11 Sep 98 10:42:29 +0800
• Jon Burnett
  • Re: [SI-LIST] : Books Fri, 12 Sep 1997 09:35:03 -0500 (CDT)
  • Re: [SI-LIST] : Books Fri, 12 Sep 1997 09:35:03 -0500 (CDT)
• Jon Dowling
  • [SI-LIST] : Re: QUAD Model & Device capacitance Wed, 15 Apr 1998 10:18:34 -0700
• Jon Powell
  • [SI-LIST] : positions Wed, 28 Oct 1998 08:27:23 -0800
  • Re: [SI-LIST] : models page on http://www.eia.org/eig/ibis/ibis.htm Fri, 11 Sep 1998 09:33:01 -0700
  • Re: [SI-LIST] : IBIS Version 3.0 Tue, 19 May 1998 15:58:58 -0700
  • Re: [SI-LIST] : Does SSO make outputs earlier as well as later? Thu, 30 Apr 1998 09:21:57 -0700
  • Re: [SI-LIST] : HSPICE to QUAD models Thu, 29 Jan 1998 08:59:14 -0800
  • Re: [SI-LIST] : The Flight-Time/SI Effects of Trace 'Tromboning' Fri, 09 Jan 1998 09:41:50 -0800
  • Re: [SI-LIST] : How to identify SSO Wed, 07 Jan 1998 17:41:07 -0800
  • Re: [SI-LIST] : How to identify SSO Wed, 07 Jan 1998 09:00:15 -0800
  • Re: [SI-LIST] : Evaluation of Vendor tools on SI list Thu, 11 Dec 1997 16:14:27 -0800
  • Re: [SI-LIST] : Re: Guard banding Wed, 12 Nov 1997 15:36:19 -0800
  • Re: [SI-LIST] : Re: Guard banding Wed, 12 Nov 1997 13:29:42 -0800
  • Re: Inter-Symbol Interference Thu, 05 Jun 1997 08:45:41 -0700
  • Re: IBIS Models or full spice netlist...? Tue, 31 Dec 1996 14:08:28 -0800
• Jonathan Dowling
  • I/O BUFFER MODELING POSITION Tue, 27 Aug 1996 09:59:41 -0700
  • Re: Viewlogic's XTK Thu, 25 Jul 1996 14:49:53 -0700
• Jonathan Smith
  • Re: [SI-LIST] : skin effect and transmission line simulators Fri, 5 Sep 1997 11:28:50 -0700 (MST)
• Jory McKinley
  • Re: [SI-LIST] : crosstalk through resistor networks? Thu, 20 Aug 1998 18:14:13 -0400
  • Re: [SI-LIST] : crosstalk through resistor networks? Thu, 20 Aug 1998 14:25:54 -0400
• Jose Luis Gonzalez Jimenez
  • Re: [SI-LIST] : SSO noise: Through current vs. Discharge current Tue, 30 Sep 1997 09:42:11 +0100
  • [SI-LIST] : Package prices and circuit elements values Thu, 9 Oct 1997 14:07:34 +0100
  • Re: [SI-LIST] : SSO noise: Through current vs. Discharge current Mon, 29 Sep 1997 08:55:00 +0100
  • [SI-LIST] : Output driver versus internal logic switching noise Thu, 28 Aug 1997 11:34:03 +0100
  • Re: [SI-LIST] : Ground bouncing ??? Fri, 18 Jul 1997 13:40:17 +0100
• Joy Li
  • [SI-LIST] : SI engineer available Wed, 24 Jun 1998 08:49:04 -0500
• jrbarnes@lexmark.com
  • Re: [SI-LIST] : Expression for inductance of a flat conductor Tue, 28 Jul 1998 17:13:22 -0400
• Juergen von Hagen
  • NEC-LIST: test data? Fri, 30 Jan 1998 11:02:49 -0500
• Julia Nekrylova
  • [SI-LIST] : Ferrite Beads in HSPICE Thu, 23 Apr 1998 14:04:25 -0700
• Juliusz Poltz
  • [SI-LIST] : Re: Trace impedance Fri, 21 Aug 1998 14:23:09 -0700
  • [SI-LIST] : Re: SI-LIST - Self and mutual inductance Mon, 4 May 1998 15:40:06 +0000
  • [SI-LIST] : Re: attenuation calculations Fri, 24 Apr 1998 14:24:37 +0000
  • [SI-LIST] : Re: attenuation calculations Thu, 23 Apr 1998 19:31:42 +0000
  • [SI-LIST] : Re: Dual Stripline impedance Wed, 15 Apr 1998 15:02:16 +0000
• jzhao@ee1-gw.ee.binghamton.edu
  • Re: [SI-LIST] : PCB Pwr Planes Fri, 20 Mar 1998 22:45:12 -0500 (EST)
  • Re: [SI-LIST] : PCB Pwr Planes Thu, 19 Mar 1998 23:21:13 -0500 (EST)
  • Re: [SI-LIST] : Transmission Line Analysis Software Thu, 11 Dec 1997 12:10:40 -0500 (EST)
  • Re: [SI-LIST] : PCB Stacking! Wed, 10 Dec 1997 10:51:10 -0500 (EST)
• Karen Potvin
  • Re: [SI-LIST] : Books Fri, 12 Sep 1997 10:17:37 -0400
• Karthigeyan Ranganathan
  • ibis 3.0 Thu, 10 Jul 97 10:24:10 PDT
• Karthik Ethirajan
  • Re: [SI-LIST] : PCB track length and ringing Tue, 23 Sep 1997 12:14:07 -0700
  • Re: [SI-LIST] : Teaching SI Tue, 12 Aug 1997 10:18:47 -0700
  • Re: [SI-LIST] : Backplane Analysis / GTL Technology Wed, 23 Jul 1997 11:46:36 -0700
  • Re: The Criteria of overshoot, undershoot, RingBack for Tue, 08 Jul 1997 09:43:34 -0700
• Kathy Breda
  • [SI-LIST] : IBIS User Group minutes 3/19 - In future will only be sent to Wed, 08 Apr 1998 13:25:27 -0400
  • [SI-LIST] : IBIS USER Meeting - 3/19/98, 3:00PM, at DEC, Hudson, MA Wed, 18 Mar 1998 16:31:54 -0500
  • [SI-LIST] : Proposal for an IBIS Accuracy Specification Wed, 18 Mar 1998 10:15:20 -0500
  • [SI-LIST] : IBIS User Group Meeting Reminder - Thurs., 3/19/98, 3:00 PM Wed, 11 Mar 1998 09:33:52 -0500
  • [SI-LIST] : Hyperlynx IBIS Developer Tool Kit - Action Item from IBIS User Thu, 26 Feb 1998 10:00:02 -0500
  • [SI-LIST] : IBIS User Forum Meeting Minutes - 2/12/98 Sun, 22 Feb 1998 14:00:17 -0500
  • [SI-LIST] : Directions/Agenda for 2/12/98 IBIS Users' Forum Tue, 10 Feb 1998 15:25:24 -0500
  • [SI-LIST] : IBIS user group meeting minutes - 1/18/98 Thu, 22 Jan 1998 17:21:47 -0500
  • [SI-LIST] : IBIS User Meeting - Jan. 15, 1998 at 3:00pm Tue, 06 Jan 1998 16:08:04 -0500
  • [SI-LIST] : Minutes from IBIS Forum User's Meeting 12/4/97 Thu, 11 Dec 1997 16:25:59 -0500
  • [SI-LIST] : DEC 4, 1997 - IBIS User Group Meeting, Additional Topic Mon, 1 Dec 1997 18:25:12 -0500
  • [SI-LIST] : IBIS User Group Meeting - LOCATION/DIRECTIONS Wed, 26 Nov 1997 14:19:55 -0500
  • [SI-LIST] : IBIS User Group Meeting - Dec. 4, 1997 Mon, 24 Nov 1997 12:03:39 -0500
  • [SI-LIST] : Minutes from IBIS-East Forum kickoff meeting Wed, 8 Oct 1997 10:03:58 -0400
  • [SI-LIST] : 9/18/97 - IBIS FORUM - EAST Agenda & Directions Wed, 10 Sep 1997 12:58:15 -0400
• Katie Rothstein
  • [SI-LIST] : Diff measurements with VNA Wed, 25 Feb 1998 11:10:14 -0500
• Katja Zuleeg
  • Re: [SI-LIST] : Decoupling capacitor selection & placemen Mon, 10 Nov 1997 14:41:48 +0100
  • Re: [SI-LIST] : Signal Integrity of 500 MHz on PCB Mon, 10 Nov 1997 11:21:53 +0100
• Kazi Hassan
  • RE: [SI-LIST] : Driver Strength Tue, 3 Mar 1998 13:28:25 -0800
  • Re: [SI-LIST] : SI openings at Stratus -- ... last one Fri, 13 Feb 1998 02:24:46 -0800
  • Re: [SI-LIST] : Clock chip supply voltage Fri, 18 Jul 1997 14:44:24 -0700
  • [SI-LIST] : Clock chip supply voltage Fri, 18 Jul 1997 02:40:42 -0700
• KDoe@corp.adaptec.com
  • re: Formulas for Crosstalk Calculation PCB traces 03 Jul 97 13:24:00 PDT
• Kellee Crisafulli
  • Re: [SI-LIST] : IBIS Model Verification (correction) Thu, 10 Sep 1998 10:09:04 -0700
  • RE: [SI-LIST] : IBIS Modeling Wed, 25 Mar 1998 12:46:12 -0800
  • Re: [SI-LIST] : IBIS Modeling Wed, 25 Mar 1998 01:00:30 -0800
  • New version of Visual IBIS Editor V0.96 Mon, 18 Dec 1995 11:51:45 -0800
  • New shareware Visual IBIS development tool for Windows Wed, 6 Dec 1995 11:37:41 -0800
• Kelly McClellan x2393
  • [SI-LIST] : EMI Wed, 29 Oct 1997 09:54:04 -0800
• Kenneth Willis
  • Re: [SI-LIST] : Does solder mask reduce trace impedance ? Tue, 9 Dec 1997 07:10:59 -0500 (EST)
  • [SI-LIST] : software development position at Cadence Thu, 14 Aug 1997 08:51:51 -0400 (EDT)
• Kerkhoff, Kaine A.
  • [SI-LIST] : Software Engineering position at Mayo Medical Center Thu, 8 Jan 1998 16:06:17 -0600
• Kevin Chung
  • [SI-LIST] : 440BX IBIS model (help find) Thu, 15 Oct 1998 11:59:56 -0700
• Kevin Weldon
  • Re: [SI-LIST] : Output Impedance Wed, 01 Apr 1998 12:58:30 -0500
  • [SI-LIST] : Effective terminating voltage Wed, 28 Jan 1998 10:47:51 -0500
• Khalid Ansari
  • Re: [SI-LIST] : Power Supply Noise Filters Mon, 30 Mar 1998 14:56:23 -0800
  • [SI-LIST] : Power Supply Noise Filters Fri, 27 Mar 98 11:21:10 PST
• khardin@lexmark.com
  • Re: [SI-LIST] : Diodes, EMC, ESD Protection networks Tue, 12 May 1998 07:51:11 -0400
  • Re: [SI-LIST] : EMI Fri, 31 Oct 1997 15:01:42 -0500
  • Re: [SI-LIST] : EMI Fri, 31 Oct 1997 08:15:48 -0500
  • [SI-LIST] : EMI Wed, 29 Oct 1997 10:57:28 -0500
• Ki Hong Kim
  • Resume Thu, 10 Apr 1997 16:14:17 +0000
• Kihong Kim
  • [SI-LIST] : TDR formula Mon, 28 Jul 1997 10:15:37 -0400
  • [SI-LIST] : TDR formula Mon, 28 Jul 1997 10:15:37 -0400
• komerix
  • [SI-LIST] : BGA Ni-Au platting pattern. Wed, 7 Oct 1998 15:49:31 +0900
• Kon, Hon Lee
  • [SI-LIST] : GTLP16612 Termination Thu, 19 Nov 1998 20:18:00 -0800
  • [SI-LIST] : Bus bar current carrying capability Fri, 19 Jun 1998 14:21:00 -0700
  • [SI-LIST] : Bus bar current carrying capability Fri, 19 Jun 1998 14:21:00 -0700
• Krull, Nick J
  • [SI-LIST] : Do you have a web site for signal integrity stuff? Wed, 21 Jan 1998 10:00:33 -0700
• L D Miller
  • Re: [SI-LIST] : Future bus backplane Fri, 05 Dec 1997 11:28:00 -0800
  • Re: [SI-LIST] : Can floating data bus cause DRAM soft errors? Wed, 01 Oct 1997 14:51:10 -0700
  • Re: [SI-LIST] : PCB Build Wed, 27 Aug 1997 08:12:05 -0700
  • RE: [SI-LIST] : Regular Full-time Technical Positions Tue, 26 Aug 1997 06:26:40 -0700
  • Re: [SI-LIST] : "Bob Smith" Termination Mon, 11 Aug 1997 13:21:28 -0700
  • Partial Inductance - NOT Mon, 16 Jun 1997 07:43:06 -0700
• Lai, Ricky
  • [SI-LIST] : MPI: Metalized Particle Interconnect Tue, 1 Dec 1998 08:53:18 -0600
• Lam, Son H
  • [SI-LIST] : FW: SI Engineer position Thu, 30 Oct 1997 08:19:08 -0800
• Larry Miller
  • reactance of 0805 and smaller SMT resistors? preferred suppliers? Thu, 12 Jun 97 22:56:06 UT
• Larry Rubin
  • Re: [SI-LIST] : skin effect and transmission line simulators Thu, 4 Sep 97 11:47:00 PDT
  • RE: Partial Inductance (correction) Tue, 17 Jun 97 16:08:11 PDT
  • RE: Partial Inductance Tue, 17 Jun 97 15:52:12 PDT
• Larry Smith
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Wed, 12 Aug 1998 08:55:25 -0700 (PDT)
  • Re: [SI-LIST] : Decoupling capacitors Tue, 11 Aug 1998 13:02:17 -0700 (PDT)
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 10:07:45 -0700 (PDT)
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 10:07:45 -0700 (PDT)
  • RE: [SI-LIST] : Measuring Ground Noise Wed, 24 Jun 1998 08:51:28 -0700 (PDT)
  • Re: [SI-LIST] : Measuring Ground Noise Tue, 23 Jun 1998 08:14:33 -0700 (PDT)
  • Re: [SI-LIST] : High Permittivity Board Level Decoupling and related issues Mon, 15 Jun 1998 12:58:10 -0700 (PDT)
  • Re: [SI-LIST] : Diode Termination of Transmission Lines Wed, 10 Jun 1998 12:49:31 -0700 (PDT)
  • Re: [SI-LIST] : Propagation velocity / discontinuous reference plane Wed, 6 May 1998 11:36:22 -0700 (PDT)
  • Re: [SI-LIST] : Propagation velocity / discontinuous reference plane Wed, 6 May 1998 08:49:01 -0700 (PDT)
  • Re: [SI-LIST] : Decoupling:routing Thu, 30 Apr 1998 12:06:36 -0700 (PDT)
  • Re: [SI-LIST] : Output Impedance Thu, 2 Apr 1998 09:22:32 -0800 (PST)
  • Re: [SI-LIST] : Output Impedance Wed, 1 Apr 1998 13:38:06 -0800 (PST)
  • Re: [SI-LIST] : data bus clash - how bad? Sun, 11 Jan 1998 20:48:14 -0800 (PST)
  • [SI-LIST] : Power/Ground Decoupling Methods? Tue, 2 Dec 1997 16:20:46 -0800 (PST)
  • Re: [SI-LIST] : PCB track length and ringing Thu, 25 Sep 1997 08:53:05 -0700
  • Re: [SI-LIST] : PCB track length and ringing Wed, 24 Sep 1997 09:04:08 -0700
  • Re: [SI-LIST] : Output driver versus internal logic switching noise Thu, 28 Aug 1997 08:46:04 -0700
  • [SI-LIST] : PCB Benchmark '98 Thu, 21 Aug 1997 10:33:51 -0700
  • Re: [SI-LIST] : Power/ground plane models Fri, 1 Aug 1997 11:13:23 -0700
  • Re: [SI-LIST] : Power/ground plane models Fri, 1 Aug 1997 10:41:22 -0700
  • Re: [SI-LIST] : Buried Capacitors Tue, 29 Jul 1997 20:10:17 -0700
  • Re: +3.3,5-board stackup problem / return currents... Mon, 7 Jul 1997 15:53:37 -0700
  • Re: Power/ground connections/bypassing on ICs Fri, 9 May 1997 13:14:44 -0700
  • Re: did you receive this via si-list ?? Thu, 1 May 1997 14:11:47 -0700
  • Re: Power/ground connections/bypassing on ICs Mon, 28 Apr 1997 13:05:16 -0700
  • Re: Power/ground connections/bypassing on ICs Mon, 28 Apr 1997 12:31:14 -0700
  • Re: Power/ground connections/bypassing on ICs Mon, 28 Apr 1997 09:38:03 -0700
  • Re: decoupling/ bypass capacitors at connectors Wed, 5 Mar 1997 10:47:56 -0800
  • Re: decoupling/ bypass capacitors at connectors Tue, 4 Mar 1997 17:10:08 -0800
  • Re: decoupling/ bypass capacitors at connectors Tue, 4 Mar 1997 13:46:23 -0800
  • Re: PBGA packaging Thu, 19 Dec 1996 10:31:29 -0800
  • Re: PCB burried capacitance Tue, 11 Jun 1996 08:43:07 -0700
  • Re: transmission line text Mon, 10 Jun 1996 08:52:20 -0700
  • Re: Focussed on USING BC.. Fri, 7 Jun 1996 16:15:36 -0700
  • Focussed on USING BC.. Fri, 7 Jun 1996 11:09:35 -0700
  • PCB burried capacitance Fri, 7 Jun 1996 08:46:08 -0700
  • Re: limit of method of moments Wed, 29 May 1996 08:34:01 -0700
  • Re: SI- Termination Comments Wa Mon, 22 Apr 1996 09:05:20 +0800
  • drivers, recivers and power planes Mon, 26 Feb 1996 12:01:42 +0800
• Laurent BERNARD
  • [SI-LIST] : PCB design rules for Ultra 2 SCSI SE / LVD differential lines. Wed, 30 Sep 1998 14:22:07 +0200
  • [SI-LIST] : PCB design rules for Ultra 2 SCSI SE / LVD differential lines. Wed, 30 Sep 1998 14:22:07 +0200
  • [SI-LIST] : USB differential lines. Wed, 30 Sep 1998 14:22:03 +0200
  • [SI-LIST] : USB differential lines. Wed, 30 Sep 1998 14:22:03 +0200
• Lawrence Butcher
  • [SI-LIST] : bypass cap question (long, simple) Sat, 31 Jan 1998 00:58:28 -0800
• Leesa Macleod
  • [SI-LIST] : resume - signal integrity engineer Mon, 26 Jan 1998 13:35:51 -0500
  • Re: [SI-LIST] : TDR Measurements Fri, 12 Dec 1997 13:33:13 -0500
  • RE: [SI-LIST] : TDR Measurements Fri, 12 Dec 1997 09:05:08 -0500
  • Re: [SI-LIST] : EMC Issues with ASIC design Wed, 3 Dec 1997 10:43:17 -0500
• Lehew, John
  • [SI-LIST] : Differential Reflection Question Wed, 1 Apr 1998 17:02:51 -0600
• Lfresearch
  • [SI-LIST] : ASIC noise update.... Mon, 6 Apr 1998 12:46:48 EDT
  • [SI-LIST] : Lowering ASIC noise Fri, 3 Apr 1998 17:24:50 EST
  • Re: [SI-LIST] : Driver Strength Thu, 5 Mar 1998 17:47:12 EST
  • Re: [SI-LIST] : Driver Strength Thu, 5 Mar 1998 13:57:39 EST
  • Re: [SI-LIST] : How to identify SSO Mon, 12 Jan 1998 04:11:21 EST
  • Re: [SI-LIST] : How to identify SSO Sun, 11 Jan 1998 11:38:47 EST
  • [SI-LIST] : Flyback Transformer Model Fri, 12 Dec 1997 17:54:35 EST
• Lfresearch@aol.com
  • Re: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 21:04:17 EDT
  • Re: [SI-LIST] : 3.3V Design Wed, 5 Aug 1998 12:07:08 EDT
  • Re: [SI-LIST] : Design Note on Right Angle Bends Mon, 13 Jul 1998 10:55:48 EDT
  • [SI-LIST] : PC Choice Fri, 20 Feb 1998 13:15:42 EST
  • Fwd: [SI-LIST] : PCB design techniques for EMC control Thu, 19 Feb 1998 16:58:45 EST
  • Re: [SI-LIST] : Earth Ground Tue, 17 Feb 1998 13:16:31 EST
  • Re: [SI-LIST] : EMC Issues with ASIC design Wed, 3 Dec 1997 14:44:30 -0500 (EST)
  • Re: [SI-LIST] : EMI Fri, 31 Oct 1997 13:39:04 -0500 (EST)
  • [SI-LIST] : Cautious offer to test.... Wed, 29 Oct 1997 10:02:23 -0500 (EST)
  • Re: [SI-LIST] : EMI Wed, 29 Oct 1997 09:43:06 -0500 (EST)
  • Re: [SI-LIST] : SI Consulting Opportunity in Silicon Valley Sun, 19 Oct 1997 21:38:10 -0400 (EDT)
  • Re: [SI-LIST] : Regular Full-time Technical Positions Tue, 26 Aug 1997 15:52:00 -0400 (EDT)
  • Re: Shielding Wed, 2 Jul 1997 10:34:43 -0400 (EDT)
  • Re: Separate +5V Plane Thu, 27 Mar 1997 20:34:22 -0500 (EST)
• Lidu Huang
  • Re: [SI-LIST] : Self and mutual inductance Fri, 01 May 1998 16:54:34 -0400
  • [SI-LIST] : Self and mutual inductance Fri, 01 May 1998 09:57:20 -0400
  • [SI-LIST] : Final report on inductance vs. frequency Tue, 21 Apr 1998 17:02:54 -0400
  • [SI-LIST] : Cross section geometry for the previous post on inductance Tue, 21 Apr 1998 14:01:25 -0400
  • [SI-LIST] : Inductance vs. frequency Tue, 21 Apr 1998 10:52:51 -0400
• Lin, Ted
  • RE: [SI-LIST] : SPICE for SI analysis Wed, 24 Dec 1997 19:08:49 -0500
• Lisa Schaertl
  • [SI-LIST] : Books (Montrose, Johnson) Fri, 12 Sep 97 10:45:00 EDT
• Lloyd Alexander
  • Survey of Comp. Electromagnetics Professionals Tue, 26 Nov 1996 10:21:50 -0600
• Loren Koehler
  • [SI-LIST] : Re: (Differential SCSI) Thu, 05 Feb 1998 13:50:47 PST
• Lum Wee Mei
  • [SI-LIST] : High Speed Queries Fri, 06 Nov 1998 14:23:29 +0800
• Lund, Steve
  • [SI-LIST] : PCB design techniques for EMC control Wed, 18 Feb 1998 16:11:12 -0600
• M. Susan Tweeton
  • Re: [SI-LIST] : Differential Signals Fri, 23 Oct 1998 08:39:27 -0500
  • [SI-LIST] : Differential Signals Wed, 21 Oct 1998 13:25:02 -0500
  • Re: [SI-LIST] : Signal integrity simulation tool - your opinion and recommandation Wed, 02 Sep 1998 09:21:20 -0500
  • Re: [SI-LIST] : 3.3V Design Wed, 05 Aug 1998 17:07:41 -0500
  • Re: [SI-LIST] : 3.3V Design Wed, 05 Aug 1998 09:14:08 -0500
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Tue, 30 Jun 1998 11:43:48 -0500
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Thu, 25 Jun 1998 12:14:12 -0500
  • [SI-LIST] : Terminations scheme for bi-directional bus Thu, 25 Jun 1998 11:18:34 -0500
  • [SI-LIST] : Dielectric Constant Tue, 02 Jun 1998 09:46:43 -0500
• Mackillop, William J.
  • RE: [SI-LIST] : Bus bar current carrying capability Mon, 22 Jun 1998 08:12:20 -0400
  • [SI-LIST] : Spice models Thu, 9 Apr 1998 09:29:50 -0400
  • [SI-LIST] : Positions Available Fri, 19 Dec 1997 10:23:57 -0500
• Magnus Homann
  • Re: [SI-LIST] : RE: RC terminations on multidrop busses Fri, 13 Nov 1998 17:36:32 +0100
  • Re: [SI-LIST] : Diodes, EMC, ESD Protection networks Tue, 12 May 1998 08:22:44 +0200
  • Re: [SI-LIST] : Dual Stripline impedance Fri, 17 Apr 1998 10:59:44 +0200
  • [SI-LIST] : Dual Stripline impedance Wed, 15 Apr 1998 16:45:26 +0200
• Manix Velu
  • [SI-LIST] : How to identify SSO groups? Tue, 23 Dec 1997 10:21:04 +5:30
  • [SI-LIST] : EMC Issues with ASIC design Wed, 3 Dec 1997 18:15:27 +5:30
  • [SI-LIST] : EMI Wed, 29 Oct 1997 12:38:33 +5:30
• Manjunath Shamanna
  • need some info..... Tue, 9 Jan 1996 12:27:12 -0600 (CST)
• mannand@wlgore.com
  • [SI-LIST] : twisted pair attenuation Thu, 22 Oct 1998 16:08:14 -0400
• Marc Jensen
  • Signaling Technologies Thu, 10 Jul 1997 13:50:49 -0600
• Marin Sampaleanu
  • RE: [SI-LIST] : IC input impedance Wed, 14 Oct 1998 10:53:57 -0400
• MARK GAILUS
  • [SI-LIST] : Re: [SI-LIST] - Overshoot/U 24 Feb 1998 13:31:01 -0400
• Mark Gregory
  • [SI-LIST] : Signal Integrity Positions Wed, 6 May 1998 14:07:20 -0700
• Mark McKee
  • Re: [SI-LIST] : crosstalk through resistor networks? Mon, 17 Aug 1998 15:39:24 -0700
  • [SI-LIST] : Decomposing PCB elements for RF(ish) applications Fri, 10 Jul 1998 14:20:30 -0700 (PDT)
  • [doug@eskimo.com: Re: [SI-LIST] : Earth Ground] Tue, 17 Feb 1998 13:27:04 -0800 (PST)
  • Re: [SI-LIST] : TDR Measurements Fri, 12 Dec 1997 09:35:44 -0800 (PST)
  • Re: [SI-LIST] : Transmission Line Analysis Software Thu, 11 Dec 1997 09:54:00 -0800 (PST)
  • [SI-LIST] : TDR Measurements Tue, 9 Dec 1997 10:22:05 -0800 (PST)
  • Re: [SI-LIST] : Re: delay lines with PCB traces Thu, 25 Sep 1997 10:10:02 -0700 (PDT)
• Mark Nass
  • [SI-LIST] : Measuring PLL jitter Wed, 01 Jul 1998 10:06:54 -0700
  • [SI-LIST] : Measuring Ground Noise Mon, 22 Jun 1998 18:56:25 -0700
  • [SI-LIST] : QUAD Model & Device capacitance Tue, 14 Apr 1998 14:30:49 -0700
  • Re: [SI-LIST] : Driver Strength Thu, 05 Mar 1998 11:04:02 -0800
  • [SI-LIST] : Driver Strength Mon, 02 Mar 1998 19:35:53 -0800
  • [SI-LIST] : Modeling Package parasitics Mon, 16 Feb 1998 14:43:08 -0800
  • Re: [SI-LIST] : Re: (Differential SCSI) Thu, 05 Feb 1998 11:43:10 -0800
  • [SI-LIST] : More on differential impedance calculations Thu, 05 Feb 1998 15:10:50 -0800
  • Re: [SI-LIST] : HSPICE to QUAD models Thu, 29 Jan 1998 09:45:41 -0800
  • [SI-LIST] : HSPICE to QUAD models Wed, 28 Jan 1998 19:29:29 -0800
  • [SI-LIST] : Decoupling Caps and Return Currents Wed, 29 Oct 1997 09:55:45 -0800
• Mark Randol
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 15:29:42 -0700
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 11:36:17 -0700
  • Re: [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 13:04:08 -0700
  • Re: [SI-LIST] : Measuring Ground Noise Wed, 24 Jun 1998 10:03:26 -0700
  • Re: [SI-LIST] : High Permittivity Board Level Decoupling and related issues Mon, 15 Jun 1998 13:16:54 -0700
  • Re: [SI-LIST] : Decoupling Capacitors Mon, 13 Apr 1998 09:27:02 -0700
  • Re: [SI-LIST] : SPICE Buffer Models Wed, 01 Apr 1998 16:21:57 -0700
  • Re: [SI-LIST] : ?Dumb Question Regarding Multilayer Boards Fri, 27 Mar 1998 10:37:57 -0700
  • [SI-LIST] : ?Dumb Question Regarding Multilayer Boards Thu, 26 Mar 1998 15:55:59 -0700
  • Re: [SI-LIST] : PCB Pwr Planes Fri, 20 Mar 1998 09:55:05 -0700
  • Re: reactance of 0805 and smaller SMT resistors Fri, 13 Jun 1997 15:52:05 -0700
  • Re: Power/ground connections/bypassing on ICs Thu, 01 May 1997 14:41:14 -0700
• Mary Longtin
  • Jobs forum 15 Oct 1996 18:56:52 -0400
• Matt, Beverley & McKenzie Oliver
  • EM Modeling software: What works? Fri, 31 May 1996 19:22:06 -0600
• Mattan Kamon
  • Re: [SI-LIST] : Modeling Package parasitics Tue, 17 Feb 1998 11:55:19 -0500
• Maurizio Di Zenzo
  • Re: [SI-LIST] : Transmission Line Analysis Software Thu, 11 Dec 1997 11:57:12 -0800
• Mayura Ladwa
  • Example ECL driver/receiver model Fri, 11 Apr 1997 16:17:36 CDT
• MAYURA_LADWA@HP-USA-om21.om.hp.com
  • RE: Re: [SI-LIST] : IBIS AND EMC Wed, 1 Apr 1998 17:06:23 -0500
• McCormick, Robert
  • [SI-LIST] : Allowable crosstalk on VGA signals to monitor on PC ? Wed, 3 Jun 1998 10:24:03 -0400
  • [SI-LIST] : Allowable crosstalk on VGA signals to monitor on PC ? Wed, 3 Jun 1998 10:24:03 -0400
  • [SI-LIST] : Worst case VI curve for PCI spec a reality? Mon, 20 Apr 1998 09:59:47 -0400
  • [SI-LIST] : Looking for corner PCI spice models Mon, 13 Apr 1998 15:10:03 -0400
• Melinda Piket-May
  • [SI-LIST] : Earth Ground Mon, 16 Feb 1998 18:03:27 -0700 (MST)
  • [SI-LIST] : Teaching SI Tue, 12 Aug 1997 09:39:29 -0600 (MDT)
• Mellitz, Richard
  • RE: [SI-LIST] : Clock tree Thu, 6 Aug 1998 12:48:57 -0700
  • RE: [SI-LIST] : Measuring PLL jitter Thu, 2 Jul 1998 04:49:10 -0700
  • RE: [SI-LIST] : Overshoot/Undershoot: Wed, 25 Feb 1998 08:01:58 -0500
  • RE: [SI-LIST] : Overshoot/Undershoot: Tue, 24 Feb 1998 07:05:07 -0500
  • RE: [SI-LIST] : To overshoot or undershoot: ( to diode or not to diode) Mon, 23 Feb 1998 13:38:57 -0500
  • [SI-LIST] : To overshoot or undershoot: ( to diode or not to diode) Sun, 22 Feb 1998 10:11:19 -0500
  • RE: [SI-LIST] : TDR Measurements Fri, 12 Dec 1997 07:21:14 -0500
  • RE: [SI-LIST] : Other materials for GHz application Tue, 2 Dec 1997 09:13:15 -0500
  • [SI-LIST] : EMI idea or heresy Fri, 21 Nov 1997 14:40:27 -0500
  • RE: [SI-LIST] : Preferred PWB impedances Thu, 20 Nov 1997 10:24:10 -0500
  • RE: [SI-LIST] : Decoupling capacitor selection & placemen Fri, 7 Nov 1997 10:04:03 -0500
  • RE: [SI-LIST] : Re: delay lines with PCB traces Thu, 25 Sep 1997 17:47:41 -0400
  • [SI-LIST] : Books Fri, 12 Sep 1997 10:02:57 -0400
  • RE: [SI-LIST] : skin effect and transmission line simulators Tue, 9 Sep 1997 07:40:53 -0400
  • RE: [SI-LIST] : Skin effect Modeling and Verification Sun, 7 Sep 1997 20:53:10 -0400
  • RE: Twisted pair cables Fri, 30 May 1997 11:45:36 -0400
• mellitz@eagle.ColumbiaSC.NCR.COM
  • Re: continously variable delay line avail? Thu, 8 May 1997 17:51:59 -0400
  • Re: Differential Impedance Fri, 11 Apr 1997 07:17:23 -0400
  • Re: FCT806 Clock Driver Wed, 15 Jan 1997 18:15:29 -0500
  • Re: Differential Pair Skew Fri, 26 Jul 1996 16:47:42 -0400
  • Re: Buried Capacitance Mon, 3 Jun 1996 11:41:41 -0400
  • Re: SI- Termination Comment Thu, 25 Apr 1996 08:42:08 -0400
  • Re: SI- Termination Comments Wa Mon, 22 Apr 1996 21:24:54 -0400
  • Re: Ground bounce Mon, 4 Mar 1996 15:23:27 -0500
  • Re: Vias and decoupling (was Re[x]: impedance across ground plane) Mon, 26 Feb 1996 09:44:41 -0500
  • Re: shield layer connection Tue, 9 Jan 1996 07:53:09 -0500
• mfreed@wlgore.com
  • [SI-LIST] : HF SCSI connectors Mon, 8 Dec 1997 11:57:13 -0500
• Michael A. Baxter
  • RE: [SI-LIST] : Dual Stripline impedance Wed, 15 Apr 1998 13:14:34 -0400
  • Re: [SI-LIST] : SMA Impedance Matching Wed, 04 Mar 1998 15:28:04 -0500
• Michael Allen
  • [SI-LIST] : AMPredictor Thu, 18 Sep 1997 09:25:39 -0400
• Michael Chin
  • [SI-LIST] : Re: delay lines with PCB traces Wed, 24 Sep 1997 17:49:21 -0700
  • [SI-LIST] : Re: delay lines with PCB traces Wed, 24 Sep 1997 14:59:53 -0700
  • Module Hardware Design Engineer positions Tue, 1 Apr 1997 18:43:52 -0800
• Michael Cohen
  • Re: [SI-LIST] : Need your comments in selection of SI simula Thu, 16 Apr 1998 10:52:12 -0400
• Michael E Vrbanac
  • Re: [SI-LIST] : Re: Differential impedance Thu, 5 Feb 1998 14:11:55 -0800 (PST)
• Michael Flint
  • Re: SPICE model for PCI driver Wed, 16 Jul 1997 11:29:58 +0200
• Michael Freda
  • Re: [SI-LIST] : need new BGA vendor Wed, 30 Sep 1998 07:25:25 -0700 (PDT)
  • Re: [SI-LIST] : Guard Trace Effect on Impedence Wed, 6 May 1998 16:21:47 -0700 (PDT)
• Michael Gutzmann
  • [SI-LIST] : Re: CMOS off-chip driver design Thu, 26 Feb 1998 10:59:29 +0100 (MET)
  • [SI-LIST] : CMOS off-chip driver design Thu, 26 Feb 1998 10:45:12 +0100 (MET)
  • [SI-LIST] : Re: [SI-LIST]: SSO noise: Through current vs. Discharge current] Mon, 29 Sep 1997 10:19:39 +0200
• Michael Nagel
  • Re: [SI-LIST] : Decoupling capacitor selection & placement Wed, 29 Oct 1997 09:38:16 +0100
  • Re: Power/ground connections/bypassing on ICs Mon, 28 Apr 1997 19:56:48 +0200
  • Re: ATM positions in Dallas Mon, 28 Apr 1997 16:05:16 +0200
• Michael T Zhang
  • Re[2]: [SI-LIST] : Power Supply Noise Filters Mon, 30 Mar 98 16:07:00 PST
  • Re: [SI-LIST] : Power Supply Noise Filters Fri, 27 Mar 98 13:38:00 PST
  • Re: [SI-LIST] : power supply filtering and bypassing Thu, 05 Mar 98 14:18:00 PST
  • [SI-LIST] : Differential Clocking & Guard Trace Tue, 10 Feb 98 11:30:00 PST
  • Re: [SI-LIST] : Flyback Transformer Model Mon, 15 Dec 97 07:40:00 PST
• Michael Tsuk
  • RE: [SI-LIST] : How to construct guard bands in Ansoft 2D Fri, 29 May 1998 13:50:24 -0400
  • Re: [SI-LIST] : power supply filtering and bypassing Tue, 10 Mar 1998 16:54:32 -0500
• Michael Wehmeier
  • [Fwd: [SI-LIST] : IBIS AND EMC] Wed, 01 Apr 1998 16:00:55 +0200
• Michael Werner
  • [SI-LIST] : IBIS models Wed, 23 Dec 1998 14:02:42 +0000
• Mike A Schmitt
  • 2 Job Postings Thu, 06 Jun 96 17:27:00 PDT
• Mike Degerstrom
  • Re: [SI-LIST] : Some issues about fineline BGA .. Fri, 20 Nov 1998 08:31:23 -0600
  • Re: [SI-LIST] : [Fwd: (no subject)] Fri, 24 Jul 1998 14:56:49 -0500
  • Re: [SI-LIST] : Split vs. common chip busses Mon, 13 Jul 1998 12:41:46 -0500
  • Re: [SI-LIST] : Split vs. common chip busses Mon, 13 Jul 1998 11:28:30 -0500
  • [SI-LIST] : Split vs. common chip busses Fri, 10 Jul 1998 15:32:26 -0500
  • Re: [SI-LIST] : eye patterns Tue, 12 May 1998 15:07:45 -0500
  • [SI-LIST] : Modeling BGAs with floating ground plane Mon, 27 Apr 1998 16:58:39 -0500
  • [SI-LIST] : Incorporating 3-d passive circuit models into SPICE Fri, 24 Apr 1998 15:12:14 -0500
  • Re: [SI-LIST] : Dual Stripline impedance Wed, 15 Apr 1998 11:20:04 -0500
  • Re: [SI-LIST] : measuring CMOS Cin with HP4275A Fri, 10 Apr 1998 11:39:33 -0500
  • [SI-LIST] : viewing HSPICE results without awaves Thu, 9 Apr 1998 10:44:28 -0500
• Mike Dudinsky X3204
  • Re: [SI-LIST] : conductor thickness versus current Mon, 16 Nov 98 15:21:05 EST
• Mike Fleice [CONTRACTOR]
  • [SI-LIST] : EDE opportunities at Sun Thu, 29 Oct 1998 10:46:15 -0800 (PST)
  • [SI-LIST] : Great Opportunity @Sun Tue, 28 Oct 1997 14:01:52 -0800
  • [SI-LIST] : Career Opportunity Wed, 24 Sep 1997 09:02:27 -0700
• Mike Jenkins
  • Re: [SI-LIST] : Focusing on Parasitic Parameters Fri, 20 Nov 1998 19:05:02 -0800
  • Re: [SI-LIST] : Differential impedance Wed, 11 Nov 1998 17:27:12 -0800
  • Re: [SI-LIST] : Differential Signals Wed, 21 Oct 1998 15:37:12 -0700
  • [SI-LIST] : Re: eye patterns Tue, 12 May 1998 14:34:04 -0700
  • [SI-LIST] : Re: Propagation velocity / discontinuous reference plane Wed, 06 May 1998 11:11:10 -0700
  • [SI-LIST] : Re: measuring CMOS Cin with HP4275A Mon, 13 Apr 1998 12:43:51 -0700
  • Re: [SI-LIST] : Modeling Package parasitics Mon, 16 Feb 1998 15:43:49 -0800
  • Re: [SI-LIST] : Differential pairs and place splits Wed, 11 Feb 1998 11:48:42 -0800
  • Re: [SI-LIST] : Differential pairs and place splits Tue, 10 Feb 1998 19:08:54 -0800
  • Re: [SI-LIST] : Re: Differential Impedance Thu, 05 Feb 1998 17:42:44 -0800
  • [SI-LIST] : Re: Differential Impedance Thu, 05 Feb 1998 14:35:27 -0800
  • Re: [SI-LIST] : Signal Integrity of 500 MHz on PCB Thu, 06 Nov 1997 12:27:07 -0800
  • Re: [SI-LIST] : Modeling connector pin vias Wed, 29 Oct 1997 13:17:55 -0800
  • Re: [SI-LIST] : Formulas for Calculating PTH Capacitance Tue, 23 Sep 1997 10:10:23 -0700
  • Re: [SI-LIST] : differential pairs Wed, 17 Sep 1997 18:15:15 -0700
  • Re: [SI-LIST] : TDR formula Tue, 29 Jul 1997 18:20:05 -0700
  • Re: +3.3,5-board stackup problem Mon, 07 Jul 1997 11:59:42 -0700
  • Re: Inter-Symbol Interference Thu, 05 Jun 1997 18:55:48 -0700
  • Re: Inductance calculation Thu, 13 Feb 1997 18:11:09 -0800
  • Re: 1GB/s serial Diff Pairs over Backplanes and Connectors Tue, 30 Jul 1996 11:24:07 -0700
  • Re: Differential Pair Skew Fri, 26 Jul 1996 09:59:30 -0700
  • Ground bounce Mon, 4 Mar 96 09:51:02 PST
• Mike Keenly
  • Re: [SI-LIST] : GND plane heat dissipation Thu, 23 Jul 1998 12:06:34 -0700
• Mike Mayer
  • Re: [SI-LIST] : New VME Backplane -- Star Layout Wed, 16 Sep 1998 10:46:18 -0500 (CDT)
  • [SI-LIST] : New VME Backplane -- Star Layout Wed, 16 Sep 1998 09:05:53 -0500 (CDT)
  • Re: [SI-LIST] : Power-plane resonance article Tue, 15 Sep 1998 09:34:54 -0500 (CDT)
  • Re: [SI-LIST] : Power-plane resonance article Fri, 11 Sep 1998 11:27:20 -0500 (CDT)
  • Re: [SI-LIST] : 3.3V Design Tue, 4 Aug 1998 07:56:54 -0500 (CDT)
  • [SI-LIST] : Surface Mount Cap Lead Inductance Mon, 20 Jul 1998 15:40:37 -0500 (CDT)
  • [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 13:17:15 -0500 (CDT)
  • [SI-LIST] : Power Plane Thickness Thu, 7 May 1998 13:54:51 -0500 (CDT)
  • Re: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 1998 16:52:44 -0600 (CST)
  • [SI-LIST] : Oscillator or Crystal Thu, 19 Feb 1998 09:54:39 -0600 (CST)
  • Re: [SI-LIST] : Can floating data bus cause DRAM soft errors? Wed, 1 Oct 1997 13:17:08 -0500 (CDT)
  • [SI-LIST] : SI Software Fri, 5 Sep 1997 09:31:55 -0500 (CDT)
  • Re: [SI-LIST] : SSO in ASICs Fri, 22 Aug 1997 16:59:11 -0500 (CDT)
• Mike Monett
  • Re: [SI-LIST] : Schottky diode termination Thu, 29 Oct 1998 03:17:06 -0800
• Mike Ventham
  • Re: [SI-LIST] : Transmission Line Analysis Software Mon, 05 Jan 1998 14:33:59 +0000
  • Re: [SI-LIST] : Transmission Line Analysis Software Mon, 15 Dec 1997 17:04:42 +0000
• MIKE_RESSO@HP-Sonoma-om1.om.hp.com
  • [SI-LIST] : Re: Determining CMOS Cin with TDR methodology Wed, 15 Apr 1998 08:30:14 -0700
• MikonCons@aol.com
  • Re: [SI-LIST] : Simulating Tools Thu, 12 Nov 1998 15:10:58 EST
  • Re: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 16:22:49 EDT
  • Re: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 16:22:49 EDT
• MLeonard@bangate.compaq.com
  • SI positions available at Compaq Mon, 20 Jan 97 13:07:59 CST
• Mohamed Ouda
  • Position wanted Tue, 30 Apr 96 21:41:34 CDT
• Mohammad Ali
  • [SI-LIST] : Signal Integrity position open at 3Com Tue, 3 Mar 1998 07:19:23 -0600
• Moshe.Netzer@ecitele.com
  • [SI-LIST] : CBT for Signal Integrity Sun, 20 Dec 1998 09:16:06 +0200
  • [SI-LIST] : SI Models Creation Mon, 7 Sep 1998 08:43:11 +0300
  • [SI-LIST] : SI models creation. Thu, 3 Sep 1998 09:01:39 +0200
• Murali Raj
  • Re: [SI-LIST] : SI openings at Stratus -- ... last one Thu, 12 Feb 1998 16:06:53 -0800 (PST)
  • Re: [SI-LIST] : SI openings at Stratus else delete -- OBJECTIONS ... Thu, 12 Feb 1998 14:13:31 -0800 (PST)
• Muranyi, Arpad
  • RE: [SI-LIST] : Slew rate Mon, 7 Dec 1998 09:35:00 -0800
  • RE: [SI-LIST] : A timing question in high speed bus Tue, 17 Nov 1998 08:07:00 -0800
  • RE: [SI-LIST] : Schottky diode termination Fri, 30 Oct 1998 10:35:00 -0800
  • RE: [SI-LIST] : Schottky diode termination Wed, 28 Oct 1998 11:36:00 -0800
  • RE: [SI-LIST] : Re: Is feedback really EVIL? Thu, 14 May 1998 11:47:00 -0700
  • RE: [SI-LIST] : Excessive clock overshoot Thu, 14 May 1998 08:13:00 -0700
  • RE: [SI-LIST] : Does IBIS describe output transition whic Thu, 14 May 1998 08:02:00 -0700
  • RE: [SI-LIST] : Does IBIS describe output transition whic Thu, 14 May 1998 08:02:00 -0700
  • RE: [SI-LIST] : How to measure MOS capacitance Thu, 16 Apr 1998 08:39:00 -0700
• Muzahid Huda
  • [SI-LIST] : Cable skew Mon, 23 Mar 1998 18:39:55 -0800
• Myoung Jin
  • Open position Mon, 21 Apr 1997 16:17:31 -0700 (MST)
• Neibig Uwe
  • AW: [SI-LIST] : High Permittivity Board Level Decoupling and rela ted Tue, 16 Jun 1998 11:10:34 +0200
• Neven Orhanovic
  • Re: [SI-LIST] : EMI Fri, 31 Oct 1997 13:52:48 -0800 (PST)
  • [SI-LIST] : Re: Dielectric loss Thu, 18 Sep 1997 16:10:51 -0700 (PDT)
  • Re: [SI-LIST] : Digital Interconnect Position at HP Thu, 21 Aug 1997 18:33:28 -0700 (PDT)
  • Re: [SI-LIST] : Digital Interconnect Position at HP Thu, 21 Aug 1997 18:33:28 -0700 (PDT)
• Neven Pischl
  • Re: [SI-LIST] : Differential pairs and place splits Tue, 10 Feb 1998 10:43:47 -0800
  • Re: [SI-LIST] : Differential pairs and place splits Tue, 10 Feb 1998 09:29:49 -0800
  • [SI-LIST] : Differential Pairs - Different Approach Thu, 05 Feb 1998 21:27:27 -0800
• nikolai@avanticorp.com
  • Re: [SI-LIST] : IBIS Model Verification Mon, 14 Sep 1998 09:47:10 -0700 (PDT)
• Nirmal Jain
  • Re: [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 15:36:37 -0400
  • Re: [SI-LIST] : Dieletric Constant Polyimide Fri, 12 Jun 1998 11:25:33 -0400
  • Re: [SI-LIST] : Re: Differential impedance Thu, 05 Feb 1998 22:32:02 -0500
  • [SI-LIST] : Re: Differential impedance Thu, 05 Feb 1998 15:23:48 -0500
  • Re: [SI-LIST] : bypass cap question (long, simple) Tue, 03 Feb 1998 14:08:28 -0500
  • Re: [SI-LIST] : bypass cap question (long, simple) Tue, 03 Feb 1998 01:25:24 -0500
  • Re: [SI-LIST] : Polylines conversion for Maxwell SI Solver Thu, 22 Jan 1998 09:51:41 -0500
  • Re: [SI-LIST] : Dielectric loss Thu, 18 Sep 1997 17:20:21 -0400
  • Re: Alloy-42 Mon, 22 Apr 96 12:23:41 EDT
  • Re: impedance across ground plane Fri, 16 Feb 96 11:34:56 EST
  • Re: Short Course: High Speed VLSI Interconnecti Wed, 24 Jan 96 14:10:31 EST
  • Re: need some info..... Wed, 10 Jan 96 14:12:57 EST
  • Re: need some info..... Wed, 10 Jan 96 12:35:25 EST
• nirmal@ansoft.com
  • Re: [SI-LIST] : stackup impedance. Wed, 17 Sep 1997 11:10:48 -0400
  • Re: [SI-LIST] : SSO in ASICs Fri, 22 Aug 1997 12:54:34 -0400
  • Re: [SI-LIST] : SSO in ASICs Fri, 22 Aug 1997 12:54:34 -0400
  • Re: FW: reactance of 0805 and smaller SMT resistors Mon, 16 Jun 1997 10:27:22 -0400
• Norm Ebsary
  • Re: [SI-LIST] : USB differential lines. Wed, 30 Sep 1998 13:52:02 -0400
  • Re: [SI-LIST] : USB differential lines. Wed, 30 Sep 1998 10:09:26 -0400
• Norman Wong
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Wed, 30 Sep 1998 18:21:10 -0400
  • re:guide line of PCB placement to reduce EMI/SI problem 06 May 1997 10:04 EDT
  • re:animation program to show travelling wave 21 Apr 1997 11:54 EDT
  • Re: FCT806 Clock Driver 15 Jan 1997 15:52:40 -0500
  • Re: More on Ground Planes Fri, 26 Jul 1996 21:30:19 +0000
  • Re: SI- Termination Comment 24 Apr 1996 11:27:05 -0400
  • SI- Termination Comments Wa 19 Apr 1996 16:55:25 -0400
• Nozad Karim
  • [SI-LIST] : Electrical Package Characterization Engineer Thu, 12 Mar 1998 09:43:03 -0700
  • [SI-LIST] : Electrical Package Characterization Engineer Wed, 13 Aug 1997 11:23:03 -0400
  • Electrical Package Characterization Engineer Mon, 23 Jun 1997 17:06:08 -0400
• O'Donnell, John
  • [SI-LIST] : Ground bounce caused by VMEbus transceivers Fri, 17 Apr 1998 14:27:19 -0400
  • [SI-LIST] : VMEbus transceivers Thu, 16 Apr 1998 17:23:40 -0400
• Orlando Hernandez
  • CROSS-TALK Fri, 1 Mar 1996 13:06:42 -0600
  • whadya know... Mon, 22 Jan 1996 16:27:25 -0600
• Orr, Orville
  • [SI-LIST] : The Flight-Time/SI Effects of Trace 'Tromboning' Thu, 8 Jan 1998 19:26:11 -0600
• P. Manjunatha
  • [SI-LIST] : SPICE Models Sat, 12 Sep 1998 14:08:37 -0500
• Pam Headsten
  • [SI-LIST] : Fwd: EMI/SI Job Opening @Ridge Technologies Fri, 01 May 1998 17:07:34 -0700
• Papanna Manjunatha
  • [SI-LIST] : High Speed Design method Thu, 20 Aug 1998 13:07:35 IST
• Pat Zabinski
  • Re: [SI-LIST] : Transmission Line Theory Tue, 29 Dec 1998 06:42:31 -0600
  • [SI-LIST] : Re: [SI-LIST] (transmission line demo tool) Thu, 22 Oct 1998 08:03:28 -0500
  • (Fwd) RE: [SI-LIST] : IC input impedance Tue, 13 Oct 1998 13:49:49 -0500
  • [SI-LIST] : need new BGA vendor Tue, 29 Sep 1998 14:18:19 -0500
  • Re: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 13:14:20 -0500
  • Re: [SI-LIST] : Power-plane resonance article Tue, 15 Sep 1998 11:00:58 -0500
• patrick conway
  • What a disappointment... Fri, 19 Jan 96 18:20:22 CST
• Patrick Lawler
  • Re: [SI-LIST] : Contact Current Rating ? Fri, 22 May 1998 17:18:50 GMT
• Paul Franzon
  • [SI-LIST] : Short Course - 2nd announcement Tue, 29 Sep 1998 11:42:55 -0400
  • [SI-LIST] : Looking for SI consultants in the North East Thu, 16 Apr 1998 19:02:21 -0400
  • Re: [SI-LIST] : Other materials for GHz application Tue, 2 Dec 1997 09:45:11 -0500
  • [SI-LIST] : Open positions at MCNC Fri, 12 Sep 1997 13:36:30 -0400
  • Re: [SI-LIST] : Buried Capacitors Wed, 30 Jul 1997 10:00:57 -0400
• Paul Galloway
  • [SI-LIST] : IBIS User Group Sub-Committee Fri, 16 Jan 1998 09:14:22 -0800
  • Re: [SI-LIST] : Decoupling capacitor selection & placemen Fri, 7 Nov 1997 12:49:27 -0500
  • [SI-LIST] : Re: delay lines with PCB traces Wed, 24 Sep 1997 22:48:48 -0400
• Paul Taddonio
  • Re: [SI-LIST] : another stack-up question Fri, 01 May 1998 16:29:52 -0400
  • Re: [SI-LIST] : Do you have a web site for signal integrity stuff? Wed, 21 Jan 1998 12:46:07 -0500
• Paul Thompson
  • Re: [SI-LIST] : Serpentine traces Thu, 23 Apr 1998 11:01:46 -0700
  • [SI-LIST] : stackup question Mon, 13 Apr 1998 19:37:19 -0700
  • Re: [SI-LIST] : power supply filtering and bypassing Thu, 5 Mar 1998 16:14:21 -0800
  • Connector pinout question Tue, 15 Jul 1997 17:41:47 -0700
• Paul Y.F. Wu
  • [SI-LIST] : Package design position Mon, 27 Oct 1997 12:16:14 -0700
• Paul.Toffolo@GEMIS.ge.com
  • [SI-LIST] : cable grounding Wed, 14 Jan 1998 09:40:29 -0500
• paulf@eos.ncsu.edu
  • MCMC '96 Advance Program Wed, 17 Jan 96 20:17:51 EST
• Pavlak, John M
  • [SI-LIST] : Types of Bypass Caps Thu, 26 Feb 1998 13:12:57 -0500
• Per Torstein =?iso-8859-1?Q?R=F8ine?=
  • Connectors and cables for high-speed digital signals 26 Jul 1996 14:42:19 +0200
• Perez, Raul
  • RE: [SI-LIST] : bga Wed, 6 May 1998 10:07:31 -0500
• Pete Waddell
  • [SI-LIST] : call for papers - PCB West Mon, 08 Sep 97 13:46:17 -0800
  • [SI-LIST] : PLD/FPGA folks Thu, 21 Aug 97 16:56:08 -0800
  • [SI-LIST] : PCB Benchmark '98 Thu, 21 Aug 97 13:09:15 -0800
  • [SI-LIST] : PCB Benchmark '98 Thu, 21 Aug 97 13:09:15 -0800
  • [SI-LIST] : PCB Bennchmark '98 Wed, 20 Aug 97 15:21:28 -0800
  • traces as antennas Tue, 13 May 97 14:28:37 PST
• Peter Baxter
  • [SI-LIST] : Termination and Test Equipment leads Wed, 11 Nov 1998 17:27:39 +1100
  • [SI-LIST] : Diode Termination of Transmission Lines Wed, 10 Jun 98 20:09:39 +1000
  • [SI-LIST] : Diodes, EMC, ESD Protection networks Tue, 12 May 98 06:31:55 +1000
• PETER_ARNOLD@hp-santaclara-om3.om.hp.com
  • [SI-LIST] : Non-ideal return current paths Mon, 20 Jul 1998 09:44:22 -0700
  • [SI-LIST] : tying clock outputs to reduce skew? Wed, 15 Apr 1998 12:55:54 -0700
• Peterson, James F
  • RE: [SI-LIST] : Schottky diode termination Wed, 28 Oct 1998 08:48:23 -0500
  • [SI-LIST] : Schottky diode termination Wed, 28 Oct 1998 07:12:13 -0500
  • RE: [SI-LIST] : A/D and D/A Converters PWR/GND Connection Tue, 20 Oct 1998 07:48:00 -0400
  • RE: [SI-LIST] : New VME Backplane -- Star Layout Wed, 16 Sep 1998 11:06:35 -0400
  • [SI-LIST] : 3.3V Design Tue, 4 Aug 1998 07:54:03 -0400
  • RE: [SI-LIST] : Diode Termination of Transmission Lines Wed, 10 Jun 1998 10:33:30 -0400
  • [SI-LIST] : Another trace-Z question Thu, 28 May 1998 16:30:43 -0400
  • [SI-LIST] : A 10 layer stackup Mon, 4 May 1998 07:47:34 -0400
  • RE: [SI-LIST] : stackup question Wed, 15 Apr 1998 07:29:31 -0400
  • [SI-LIST] : PCB Pwr Planes Thu, 19 Mar 1998 15:55:23 -0500
  • [SI-LIST] : correction : bypass cap question (long, simple) Sat, 31 Jan 1998 13:00:08 -0500
  • RE: [SI-LIST] : bypass cap question (long, simple) Sat, 31 Jan 1998 12:19:23 -0500
  • [SI-LIST] : How to identify SSO Mon, 29 Dec 1997 21:28:25 -0000
  • FW: [SI-LIST] : How to identify SSO groups? Mon, 29 Dec 1997 12:58:06 -0000
  • RE: Re[2]: [SI-LIST] : Decoupling capacitor selection & plac Thu, 6 Nov 1997 09:35:43 -0500
  • [SI-LIST] : more on pcb stack-ups Thu, 23 Oct 1997 12:52:57 -0400
  • [SI-LIST] : Board Stack-up Tue, 21 Oct 1997 08:37:36 -0400
  • RE: [SI-LIST] : SSO noise: Through current vs. Discharge current Thu, 25 Sep 1997 13:13:33 -0400
  • [SI-LIST] : IBIS model question Fri, 5 Sep 1997 13:09:21 -0400
  • [SI-LIST] : IBIS model question Fri, 5 Sep 1997 09:09:48 -0400
  • RE: [SI-LIST] : Output driver versus internal logic switching noise Thu, 28 Aug 1997 12:40:02 -0400
  • RE: [SI-LIST] : Regular Full-time Technical Positions Tue, 26 Aug 1997 08:08:15 -0400
  • [SI-LIST] : Multi-wire boards Thu, 31 Jul 1997 07:30:40 -0400
  • RE: 3.3V/5V planes Thu, 17 Jul 1997 12:20:59 -0400
  • RE: Shielding Wed, 2 Jul 1997 08:00:54 -0400
• Petra Nordholz
  • IEEE Workshop "Signal Propagation on Interconnects" Thu, 12 Dec 96 08:47:11 +0100
• Philip Gantt
  • Re: [SI-LIST] : bypass cap question (long, simple) Mon, 02 Feb 1998 14:27:48 -0800
• Philip R. Gantt
  • Re: [SI-LIST] : IBIS to Spice Tue, 12 May 1998 16:38:18 -0700
  • [SI-LIST] : IBIS to Spice Tue, 12 May 1998 12:27:13 -0700
  • Re: [SI-LIST] : power supply filtering and bypassing Thu, 05 Mar 1998 13:19:28 -0800
• Postmaster@ichips.intel.com
  • Re: [SI-LIST] : Teaching SI Tue, 12 Aug 1997 15:56:43 -0700 (PDT)
• Poulet P.
  • [SI-LIST] : 5v and 3.3v Fri, 06 Nov 1998 10:01:11 -0800
  • Re: [SI-LIST] : Selection of Optimum Termination Tue, 20 Oct 1998 09:28:41 -0700
  • [SI-LIST] : timing design tool Thu, 27 Aug 1998 09:47:56 -0700
  • [SI-LIST] : Decoupling capacitors Tue, 11 Aug 1998 12:12:20 -0700
  • [SI-LIST] : PCB design company Tue, 21 Jul 1998 09:44:20 -0700
  • [SI-LIST] : IC DIE SHRINK Fri, 10 Jul 1998 15:10:57 -0700
  • Re: [SI-LIST] : Termination for bi-directional lines Thu, 18 Jun 1998 10:00:49 -0700
  • [SI-LIST] : Termination for bi-directional lines Tue, 16 Jun 1998 12:20:21 -0700
  • [SI-LIST] : Characteristic impedance Thu, 28 May 1998 11:53:21 -0700
• Prasad Modali - Katmai Design
  • Re: [SI-LIST] : Cross-talk Concerns Thu, 16 Jul 1998 17:16:22 -0700 (PDT)
  • Re: [SI-LIST] : SI openings at Stratus else delete -- OBJECTIONS ... Thu, 12 Feb 1998 15:20:56 -0800 (PST)
• PRASAD_VENUGOPAL@HP-SanJose-om1.om.hp.com
  • Re: [SI-LIST] : High Speed Queries Fri, 6 Nov 1998 12:23:10 -0800
• Praveen G Shekokar
  • [SI-LIST] : SSO : How to identify SSO groups? Fri, 19 Dec 1997 10:50:28 -0800
• Preston Andrew MMUk
  • [SI-LIST] : Propagation velocity / discontinuous reference plane Wed, 6 May 1998 15:29:25 +0100
  • RE: [SI-LIST] : Does solder mask reduce trace impedance ? Tue, 9 Dec 1997 14:35:12 -0000
• Purge
  • Re: [SI-LIST] : IC DIE SHRINK Sun, 19 Jul 1998 00:48:49 -0700
• R.S.Krishnan
  • Re: [SI-LIST] : Substrate modeling Thu, 19 Nov 1998 14:45:53 +0531
  • [SI-LIST] : Substrate modeling Thu, 19 Nov 1998 12:21:04 +0531
• Raghu
  • Re: [SI-LIST] : Modeling BGAs with floating ground plane Mon, 27 Apr 1998 16:28:08 -0700
  • Re: [SI-LIST] : Inductance vs. frequency Tue, 21 Apr 1998 09:10:17 -0700
• raj mittra
  • Re:Message for SI List Sat, 8 Jun 1996 10:54:37 -0500
• Raman Muthukrishnan
  • Re: [SI-LIST] : Decoupling Capacitors Mon, 13 Apr 1998 10:58:28 -0700 (PDT)
  • [SI-LIST] : Decoupling Capacitors Sun, 12 Apr 1998 12:34:29 -0700 (PDT)
• Rambus Inc.
  • [SI-LIST] : Looking for Signal Integrity Engineers Wed, 15 Apr 1998 19:13:36 -0700
• Ramzi Ammar
  • Re: [SI-LIST] : VMEbus transceivers Fri, 17 Apr 1998 10:44:53 -0500
  • Re: [SI-LIST] : VMEbus transceivers Fri, 17 Apr 1998 08:44:15 -0500
  • Re: [SI-LIST] : Backplane Analysis / GTL Technology Thu, 24 Jul 1997 04:01:06 -0500
• Randy Hamilton
  • [SI-LIST] : Spice Mode for Emacs Tue, 16 Jun 1998 09:38:20 -0700 (PDT)
  • Re: [SI-LIST] : eye patterns Tue, 12 May 1998 13:25:38 -0700 (PDT)
• Ravinder Ajmani
  • [SI-LIST] : On-board Switching Power Supply Tue, 20 Oct 1998 11:53:19 -0400
  • [SI-LIST] : Training course in SPICE Thu, 25 Jun 1998 18:13:35 -0400
  • Re: [SI-LIST] : Decoupling:routing Mon, 27 Apr 1998 11:50:57 -0400
  • Re: [SI-LIST] : Dual Stripline impedance Wed, 15 Apr 1998 11:56:34 -0400
  • Re: [SI-LIST] : stackup question Tue, 14 Apr 1998 11:26:30 -0400
  • Re: [SI-LIST] : power supply filtering and bypassing Thu, 5 Mar 1998 17:00:33 -0500
  • [SI-LIST] : Crystal Oscillator Vs Resonator Mon, 23 Feb 1998 19:57:44 -0500
  • RE: [SI-LIST] : Does solder mask reduce trace impedance ? Tue, 9 Dec 1997 15:11:49 -0500
  • Re: Re[2]: [SI-LIST] : Decoupling capacitor selection & plac Fri, 31 Oct 1997 11:50:47 -0500
  • Re: [SI-LIST] : Buried Capacitors Wed, 30 Jul 1997 11:40:55 -0400
  • Re: +3.3,5-board stackup problem Mon, 7 Jul 1997 13:18:42 -0400
• Ray Anderson
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 13:23:27 -0700 (PDT)
  • [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 09:51:16 -0700 (PDT)
  • [SI-LIST] : Power-plane resonance article Thu, 10 Sep 1998 13:48:57 -0700 (PDT)
  • Re: [SI-LIST] : IBIS Model Verification (correction) Thu, 10 Sep 1998 11:24:16 -0700 (PDT)
  • Re: [SI-LIST] : Decoupling capacitors Wed, 12 Aug 1998 09:25:10 -0700 (PDT)
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 14:30:18 -0700 (PDT)
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 12:12:19 -0700 (PDT)
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 09:17:13 -0700 (PDT)
  • Re: [SI-LIST] : Dieletric Constant Polyimide Fri, 12 Jun 1998 08:36:08 -0700 (PDT)
  • [SI-LIST] : si-list archives Wed, 10 Jun 1998 16:18:55 -0700 (PDT)
  • [SI-LIST] : si-list software modification Fri, 22 May 1998 10:07:27 -0700 (PDT)
  • [SI-LIST] : Si-List administrative trivia Tue, 19 May 1998 20:22:57 -0700 (PDT)
  • Re: [SI-LIST] : Incorporating 3-d passive circuit models into SPICE Fri, 24 Apr 1998 15:47:29 -0700 (PDT)
  • [SI-LIST] : Disconnect Requests Sent to si-list Wed, 15 Apr 1998 10:57:14 -0700 (PDT)
  • [SI-LIST] : Alternative viewer for Hspice .ac0,.tr0,.sw0 files Thu, 9 Apr 1998 14:07:09 -0700 (PDT)
  • Re: [SI-LIST] : viewing HSPICE results without awaves Thu, 9 Apr 1998 11:28:01 -0700 (PDT)
  • Re: [SI-LIST] : Crystal Question Tue, 7 Apr 1998 10:13:52 -0700 (PDT)
  • Re: [SI-LIST] : SPICE Buffer Models Tue, 31 Mar 1998 15:47:35 -0800 (PST)
  • Re: [SI-LIST] : IBIS Modeling Tue, 24 Mar 1998 13:03:09 -0800 (PST)
  • [SI-LIST] : si-list archives restored Sun, 8 Mar 1998 21:08:21 -0800 (PST)
  • Re: Re[2]: [SI-LIST] : power supply filtering and bypassing Fri, 6 Mar 1998 13:59:59 -0800 (PST)
  • Re[2]: [SI-LIST] : power supply filtering and bypassing Fri, 6 Mar 1998 09:05:45 -0800 (PST)
  • [SI-LIST] : Interesting si-list statistics Wed, 18 Feb 1998 15:51:38 -0800 (PST)
  • [SI-LIST] : Job Postings on si-list Thu, 12 Feb 1998 14:59:05 -0800 (PST)
  • [SI-LIST] : FWD: Short Courses in Applied CEM Tue, 3 Feb 1998 09:00:25 -0800 (PST)
  • [SI-LIST] : Sensitive Info on si-list Fri, 23 Jan 1998 08:59:32 -0800 (PST)
  • Re: [SI-LIST] : Do you have a web site for signal integrity stuff? Wed, 21 Jan 1998 09:21:57 -0800 (PST)
  • [SI-LIST] : OFF TOPIC: Junk Mail and what to do with it Mon, 22 Dec 1997 09:04:58 -0800 (PST)
  • Re: [SI-LIST] : Power/Ground Decoupling Methods? Tue, 2 Dec 1997 16:30:04 -0800 (PST)
  • Re: [SI-LIST] : Guard banding Tue, 11 Nov 1997 09:26:34 -0800 (PST)
  • re: [SI-LIST] : Guard banding Mon, 10 Nov 1997 16:11:10 -0800 (PST)
  • [SI-LIST] : SI Consulting Opportunity in Silicon Valley Thu, 16 Oct 1997 11:24:21 -0700 (PDT)
  • [SI-LIST] : si-list archive temporarily unavailable Tue, 30 Sep 1997 11:52:20 -0700 (PDT)
  • [SI-LIST] : delay lines Wed, 24 Sep 1997 10:01:24 -0700 (PDT)
  • [SI-LIST] : Test Message (delete before reading:) Fri, 8 Aug 1997 09:21:28 -0700 (PDT)
  • Re: [SI-LIST] : skin effect and transmission line simulators Thu, 4 Sep 1997 10:41:02 -0700 (PDT)
  • Re: [SI-LIST] : Teaching SI Tue, 12 Aug 1997 15:37:40 -0700
  • [SI-LIST] : Test Message (delete before reading:) Fri, 8 Aug 1997 09:21:28 -0700 (PDT)
  • Re: [SI-LIST] : Buried Capacitors Wed, 30 Jul 1997 10:04:25 -0700
  • SI-LIST now Automated Tue, 15 Jul 1997 15:53:43 -0700 (PDT)
  • Re: reactance of 0805 and smaller SMT resistors? preferred suppliers? Thu, 12 Jun 1997 11:25:31 -0700
  • temporary si-list outage Thu, 1 May 1997 13:29:19 -0700
  • Re: Design Engineers wanted in Pacific NW! Thu, 6 Feb 1997 09:27:53 -0800
  • Coupled Line Program available via anonymous ftp Wed, 4 Dec 1996 12:09:10 -0800
  • Re: Coupled Trans. Line Spice subckt generator program Wed, 4 Dec 1996 11:52:13 -0800
  • Coupled Trans. Line Spice subckt generator program Wed, 4 Dec 1996 09:25:27 -0800
  • Re: S-Parameter to SPICE Model Converter Wed, 6 Nov 1996 10:44:01 -0800
  • Signal Integrity Engineering Position Available at Sun Tue, 8 Oct 1996 14:15:53 -0700
  • si-list mail list back on the net. Thu, 26 Sep 1996 09:02:53 -0700
  • Announcement: si-list server to be off net for several days Mon, 16 Sep 1996 09:21:37 -0700
  • Re: S-parameters and non-linear devices Mon, 9 Sep 1996 14:27:59 -0700
  • Re: Modeling - Fast Tr Wed, 4 Sep 1996 14:31:25 -0700
  • Modeling - Fast Tr Wed, 4 Sep 1996 12:37:18 -0700
  • si-list has returned to operation Fri, 30 Aug 1996 08:44:15 -0700
  • si-list access down until tommorrow (8-29-96) Thu, 29 Aug 1996 11:08:51 -0700
  • admin test message Fri, 16 Aug 1996 13:05:07 +0800
  • Commercial Postings/Advertising on si-list Fri, 2 Aug 1996 09:30:01 +0800
  • Post articles to si-list NOT si-admin Tue, 30 Jul 1996 10:23:34 +0800
  • FWD: Impedance Software Tue, 30 Jul 1996 09:40:25 +0800
  • FWD: Re: More on Ground Planes Tue, 30 Jul 1996 08:28:50 +0800
  • FWD: ASIC DESIGNER: case temperture OR ambient temperture...? Thu, 25 Jul 1996 10:07:28 +0800
  • si-list is alive and well (really) Thu, 25 Jul 1996 09:11:43 +0800
  • Test message . . ignore and delete Thu, 25 Jul 1996 08:47:56 +0800
  • FWD from si-admin: Schottky Diode terminator SIP packages Mon, 10 Jun 1996 08:53:54 +0800
  • FORWARDED fro si-admin Re: Buried Capacitance Mon, 3 Jun 1996 16:22:48 +0800
  • FORWARDED from si-admin: Buried Capacitance Mon, 3 Jun 1996 12:40:28 +0800
  • Signal Integrity Positions Open at Sun Microsystems Wed, 1 May 1996 16:42:15 +0800
  • HFSS/Eminence User Group/Mail List Info Fri, 16 Feb 1996 14:38:42 +0800
  • Signal Integrity Position Open at Sun Microsystems Fri, 16 Feb 1996 13:39:24 +0800
  • More on Eye Patterns Fri, 26 Jan 1996 08:41:29 +0800
  • Re: Eye Patterns Mon, 22 Jan 1996 16:16:18 +0800
  • Signal Integrity Position Open at Sun Microsystems Wed, 13 Dec 1995 09:39:23 +0800
• Raymond Chen
  • [SI-LIST] : Intelligent Placement of Decoupling Capacitors Fri, 13 Feb 1998 04:26:16 +0000 (GMT)
  • [SI-LIST] : Power/ground plane models Fri, 1 Aug 1997 02:24:32 -0400 (EDT)
• raymonda@hsmpka-121.eng
  • si-list archives now available on the world wide web !!! Tue, 1 Jul 1997 03:42:22 -0700 (PDT)
• raymonda@hsmpka.eng
  • [SI-LIST] : CALL FOR PAPERS: 1998 IEEE Radio and Wireless Conference (RAWCON'98) (Fwd) Tue, 27 Jan 1998 12:54:53 -0800 (PST)
• rbmccammon@mmm.com
  • [SI-LIST] : Re: Trace impedance Fri, 21 Aug 1998 12:43:48 -0500
  • [SI-LIST] : Request to SI list Administrator Wed, 6 May 1998 15:00:23 -0500
  • Re: [SI-LIST] : Propagation velocity / discontinuous referen Wed, 6 May 1998 14:50:58 -0500
  • Re: [SI-LIST] : Inductance vs. frequency Fri, 24 Apr 1998 13:29:20 -0500
  • Re: [SI-LIST] : Inductance vs. frequency Fri, 24 Apr 1998 12:38:00 -0500
  • RE: [SI-LIST] : Inductance vs. frequency Thu, 23 Apr 1998 11:13:52 -0500
  • [SI-LIST] : NOTE 03/30/98 16:24:58 Mon, 30 Mar 1998 16:29:48 -0600
  • Re: [SI-LIST] : Controlled impedance in Flex Circuit Fri, 27 Mar 1998 09:45:56 -0600
  • [SI-LIST] : Re: Cable Skew Tue, 24 Mar 1998 14:49:53 -0600
  • [SI-LIST] : Crystal Oscillator Vs Resonator Tue, 24 Feb 1998 13:27:07 -0600
  • Re: [SI-LIST] : Crystal Oscillator Vs Resonator Tue, 24 Feb 1998 08:15:02 -0600
• reha.d
  • Job Opening at Apple Mon, 14 Oct 96 16:45:15 -0700
• RhondaX Rutledge
  • [SI-LIST] : Signal Integrity Engineering opportuinities at Intel Corp. Fri, 12 Sep 97 15:30:00 PDT
• Rich.EVANS@st.com
  • RE: [SI-LIST] : Schottky diode termination Thu, 29 Oct 1998 07:32:32 -0600
• Richard A. Schumacher
  • Re: [SI-LIST] : Evaluation of Vendor tools on SI list Fri, 12 Dec 1997 15:18:40 CST
  • Re: [SI-LIST] : Evaluation of Vendor tools on SI list Thu, 11 Dec 1997 17:11:17 CST
  • Re: [SI-LIST] : Schiffman phase shifters Mon, 29 Sep 1997 9:34:45 CDT
  • Re: Fast TR Fri, 6 Sep 1996 08:13:39 -0500
  • Re: Modeling - Fast Tr Thu, 5 Sep 1996 08:05:53 -0500
  • Re: Modeling - Fast Tr Thu, 5 Sep 1996 08:05:53 -0500
• Richard Evans
  • Re: RE: FCT806 Clock Driver Fri, 17 Jan 1997 08:25:53 -0600
• Richard Gaunt
  • [SI-LIST] : SI University programs Mon, 14 Dec 1998 09:56:10 -0800
• Richard Koshak
  • Re: [SI-LIST] : Differential Clock Routing Thu, 08 Jan 1998 15:49:44 -0500
• Richard L. Knapp
  • Re: FWD: Impedance Software Tue, 30 Jul 1996 10:04:21 -0700 (PDT)
  • Re: FWD: Impedance Software Tue, 30 Jul 1996 10:04:21 -0700 (PDT)
• Richard Wheeler
  • Re: [SI-LIST] : power supply filtering and bypassing Fri, 06 Mar 1998 20:19:21 -0800
  • Re: [SI-LIST] : Transmission Line Conductors Fri, 19 Sep 1997 19:51:37 -0700
• RICHARD_BRUSH@hp-santaclara-om3.om.hp.com
  • [SI-LIST] : SPICE for SI analysis Tue, 23 Dec 97 16:03:19 -0800
  • RE: Re[2]: [SI-LIST] : Decoupling capacitor selection & pl Thu, 6 Nov 97 13:00:06 -0800
  • Re: [SI-LIST] : Signal Integrity of 500 MHz on PCB Thu, 6 Nov 97 12:22:33 -0800
  • [SI-LIST] : Modeling connector pin vias Wed, 29 Oct 97 10:26:15 -0800
• Rick Jones
  • RE : [SI-LIST] : Need your comments in selection of SI simula Mon, 20 Apr 1998 14:04:49 -0400
• Rick Tan
  • [SI-LIST] : AGP Buffer strengths Wed, 19 Nov 1997 15:59:10 -0800
  • [SI-LIST] : Standard PCI load Mon, 20 Oct 1997 17:21:07 -0700
• Robert K Huber
  • [SI-LIST] : Guard Trace Effect on Impedence Wed, 6 May 1998 09:22:46 -0400 (EDT)
• Robert Muir
  • RE: [SI-LIST] : Schottky diode termination Thu, 29 Oct 1998 09:46:06 +1100
• Robert Tsai
  • Re: [SI-LIST] : SSO in ASICs Fri, 22 Aug 97 11:21:58 MST
• Robert Voelker
  • Re: [SI-LIST] : Re: Guard banding Wed, 12 Nov 1997 15:59:48 -0800 (PST)
  • [SI-LIST] : Re: Guard banding Wed, 12 Nov 1997 11:17:35 -0800 (PST)
  • Signal integrity opening Fri, 8 Nov 1996 14:34:05 -0800
• Robert Wenzel
  • [SI-LIST] : MECL book+ribbon cable Wed, 20 May 1998 12:09:41 -0500
• Roberto.Ciaranfi@fi.infn.it
  • [SI-LIST] : Er vs T Fri, 09 Oct 1998 15:40:08 +0100
• RodX Strange
  • Signal integrity contract position Fri, 15 Mar 96 11:03:00 PST
• Roger Gravrok
  • [SI-LIST] : Proactive SI Engineering Tue, 6 Jan 1998 12:22:30 -0800
  • [SI-LIST] : Horror stories ? Thu, 11 Sep 1997 10:24:56 -0700
  • well done Tue, 10 Sep 96 06:19:00 PDT
• Roger Marks
  • Program: 1996 Wireless Communications Conference Thu, 13 Jun 1996 16:41:55 -0600
• Roland F. Portman
  • Re: [SI-LIST] : Signal Ground at the connector Thu, 17 Dec 1998 12:39:48 -0800
  • Re: [SI-LIST] : High Speed Queries Fri, 06 Nov 1998 10:20:57 -0800
  • Re: [SI-LIST] : Mixed signal - PWR and GND configuration issue Mon, 20 Jul 1998 13:59:27 -0700
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Thu, 25 Jun 1998 11:08:50 -0700
  • Re: [SI-LIST] : Diode Termination of Transmission Lines Wed, 10 Jun 1998 09:25:28 -0700
  • Re: [SI-LIST] : bga Thu, 07 May 1998 10:17:39 -0700
  • Re: [SI-LIST] : bga Wed, 06 May 1998 10:39:13 -0700
  • [SI-LIST] : stackup question Tue, 14 Apr 1998 17:38:09 -0700
  • [SI-LIST] : Impedance of micro-strip over wide ground trace Thu, 26 Mar 1998 14:13:04 -0800
  • [SI-LIST] : Controlled impedance in Flex Circuit Mon, 23 Mar 1998 14:22:57 -0800
  • Re: [SI-LIST] : PCB design techniques for EMC control Thu, 19 Feb 1998 12:13:22 -0800
  • Re: [SI-LIST] : Transmission Line Analysis Software Thu, 11 Dec 1997 10:58:12 -0800
  • Re: [SI-LIST] : SI Software Fri, 5 Sep 1997 08:59:58 -0700
• Ron Bader
  • [SI-LIST] : Excellent Reference Book Wed, 29 Oct 1997 12:13:35 -0800
  • Re: [SI-LIST] : ¦^ĀŠ : [SI-LIST] : stackup impedance. Wed, 17 Sep 1997 10:40:07 -0700
• Ron Matthews
  • Re: [SI-LIST] : PCB design techniques for EMC control Thu, 19 Feb 1998 11:22:21 -0500
  • Re: [SI-LIST] : EMC Issues with ASIC design Wed, 3 Dec 1997 09:42:04 -0500
• Ron Mosher
  • [SI-LIST] : JOB POSTING : Signal Integrity Engineer Fri, 11 Dec 1998 19:58:28 -0500
• Ron Poon
  • Re: [SI-LIST] : differential pairs Wed, 17 Sep 1997 16:56:02 -0700
  • Re: [SI-LIST] : Teaching SI Tue, 12 Aug 1997 16:32:03 -0700
• Ron Wilhelmson
  • Re: [SI-LIST] : Diode Termination of Transmission Lines Wed, 10 Jun 1998 10:35:45 -0400
• Ron_F_Parson@notes.seagate.com
  • Re: [SI-LIST] : UltraCAD PCB Transmission Line Calculator Fri, 12 Dec 1997 08:37:45 -0600
• ronald de smedt vh41 4650
  • Re: ASIC DESIGNER: case temperature OR ambient temperature...? Thu, 1 Aug 1996 11:27:50 +0200
• Ronald Nikel
  • Re: [SI-LIST] : bypass cap question (long, simple) Sat, 31 Jan 1998 10:25:51 -0800
• Ronda Faries
  • [SI-LIST] : Printed Circuit Design's 1999 Editorial Calendar Wed, 21 Oct 1998 15:02:40 -0700
  • Re: [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 15:01:46 -0700
  • [SI-LIST] : Re: PCB Top Gun Showdown! Tue, 12 May 1998 12:00:03 -0700
  • [SI-LIST] : Guard banding Mon, 10 Nov 97 15:29:39 -0800
  • [SI-LIST] : Authors Wanted Tue, 28 Oct 97 13:55:15 -0800
• Ronen Sima
  • Re: [SI-LIST] : 3.3V Design Thu, 06 Aug 1998 10:54:07 +0200
• Roy Leventhal
  • Re: [SI-LIST] : Text Book in SI Wed, 16 Dec 1998 09:19:48 -0600
  • Re: [SI-LIST] : RE: RC terminations on multidrop busses Fri, 13 Nov 1998 13:20:32 -0600
  • [SI-LIST] : RE: RC terminations on multidrop busses Fri, 13 Nov 1998 10:09:32 -0600
  • [SI-LIST] : RC terminations on multidrop busses Thu, 12 Nov 1998 07:57:24 -0600
• Roy McCammon
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Tue, 30 Jun 1998 17:23:56 -0500
• Rudi ZURBUCHEN
  • S-Parameter to SPICE Model Converter Thu, 7 Nov 1996 18:50 +0100
  • Re: S-Parameter to SPICE Model Converter Thu, 7 Nov 1996 18:35 +0100
  • S-Parameter to SPICE Model Converter Wed, 6 Nov 1996 16:37 +0100
• Russ
  • Re: [SI-LIST] : skin effect and transmission line simulators Fri, 5 Sep 1997 09:54:29 -0400 (EDT)
• Russ LeBlanc
  • ISO Bob Canright Wed, 30 Oct 1996 15:27:03 -0500
• Russell Rapport
  • [SI-LIST] : EDA suite for Win NT Mon, 13 Oct 1997 13:41:01 -0700
• Ryszard Vogel
  • Re: [SI-LIST] : Diff measurements with VNA Thu, 26 Feb 1998 15:36:29 +0100 (MET)
  • [SI-LIST] : Re: delay lines with PCB traces Fri, 26 Sep 1997 07:58:41 +0200
• s_vetter@littonacdipe.com
  • SI Mailing List Fri, 9 Oct 1998 16:34:39 -0500
• Salvador Aguinaga
  • [SI-LIST] : Re: DIFFERENTIAL ROUTING-- what to do? -- Thu, 12 Nov 1998 15:02:06 -0600
  • [SI-LIST] : Switching Current in a high-speed digital pcb: How to calculate Thu, 30 Jul 1998 14:25:00 -0500
  • [SI-LIST] : Expression for inductance of a flat conductor Tue, 28 Jul 1998 14:44:05 -0500
• Salvador Iranzo
  • Re: [SI-LIST] : Incorporating 3-d passive circuit models into SPICE Thu, 30 Apr 1998 11:57:01 +0200 (MET DST)
• Samie Samaan
  • Re: [SI-LIST] : PCB Pwr Planes Thu, 19 Mar 98 14:55:00 PST
  • Re: pc board AC noisemap standards Mon, 11 Mar 96 14:07:00 PST
• Sandy Taylor
  • Re: FW: [SI-LIST] : FIXED: curve tracers and Output Impedance Mon, 6 Apr 1998 10:49:25 -0700 (PDT)
  • [SI-LIST] : FIXED: curve tracers and Output Impedance Fri, 3 Apr 1998 10:41:34 -0800 (PST)
  • [SI-LIST] : curve tracers and Output Impedance Fri, 3 Apr 1998 09:04:27 -0800 (PST)
  • Re: Inductance calculation Fri, 14 Feb 1997 11:40:04 -0800
• Saurabh Tewari
  • ATM positions in Dallas Mon, 28 Apr 1997 08:41:23 -0500
• Savithri
  • Re: [SI-LIST] : query Fri, 13 Nov 1998 10:56:05 +0500
  • [SI-LIST] : query Mon, 09 Nov 1998 11:19:01 +0500
• Savithri S.
  • [SI-LIST] : SI in cells. Wed, 2 Sep 98 12:08:59 IST
  • Re: [SI-LIST] : SPICE Buffer Models Thu, 2 Apr 1998 13:42:06 +0000
  • Re: [SI-LIST] : SPICE Buffer Models Wed, 1 Apr 1998 10:08:30 +0000
• Scott Bronson
  • Re: [SI-LIST] : Decoupling:routing Mon, 27 Apr 1998 10:47:53 -0700
  • [SI-LIST] : Unconnected headers and connectors Thu, 23 Apr 1998 14:15:10 -0700
• Scott Lin
  • (no subject) Wed, 23 Oct 1996 22:40:37 -0700
• Scott McMorrow
  • Re: [SI-LIST] : Focusing on Parasitic Parameters and ISI Tue, 01 Dec 1998 13:06:03 -0800
  • Re: [SI-LIST] : Focusing on Parasitic Parameters Tue, 01 Dec 1998 08:55:04 -0800
  • RE: [SI-LIST] : A timing question in high speed bus Wed, 18 Nov 1998 14:06:29 -0800
  • Re: [SI-LIST] : =?iso-8859-1?Q?=BB=D8=B8=B4?=: [SI-LIST] : A timing Tue, 17 Nov 1998 18:57:46 -0800
  • Re: [SI-LIST] : 440BX IBIS model (help find) Thu, 15 Oct 1998 13:19:50 -0700
  • Re: [SI-LIST] : Clock tree Thu, 06 Aug 1998 12:29:37 -0700
  • Re: [SI-LIST] : IC DIE SHRINK Fri, 10 Jul 1998 15:40:46 -0700
  • Re: [SI-LIST] : Design Note on Right Angle Bends Fri, 10 Jul 1998 12:04:09 -0700
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Tue, 30 Jun 1998 12:29:53 -0700
  • Re: [SI-LIST] : Terminations scheme for bi-directional bus Thu, 25 Jun 1998 15:11:25 -0700
  • Re: [SI-LIST] : Definition for rise time? Tue, 09 Jun 1998 21:45:34 -0700
  • Re: [SI-LIST] : Re: Is feedback really EVIL? Thu, 14 May 1998 10:36:47 -0700
  • Re: [SI-LIST] : Worst case VI curve for PCI spec a reality? Mon, 20 Apr 1998 14:53:07 -0700
  • Re: [SI-LIST] : Worst case VI curve for PCI spec a reality? Mon, 20 Apr 1998 11:51:28 -0700
  • Re: [SI-LIST] : Worst case VI curve for PCI spec a reality? Mon, 20 Apr 1998 10:01:14 -0700
  • [SI-LIST] : uBGA high frequency characteristics Wed, 15 Apr 1998 18:20:52 -0700
  • Re: FW: [SI-LIST] : How to identify SSO groups? Mon, 29 Dec 1997 11:58:36 -0800
  • Re: [SI-LIST] : EMI Tue, 28 Oct 1997 23:41:37 -0800
  • Schottky Diode terminator SIP packages Fri, 7 Jun 96 13:44 PDT
  • Re[2]: Wanted...PCI bus 3V driver/receiver models Wed, 28 Feb 96 15:02:00 PST
  • Signal integrity mail list Sat, 24 Feb 1996 17:32:46 PST
• Sean Murray
  • Shielding Tue, 1 Jul 1997 15:26:11 +0100
• Seung Ho Hwang
  • participation on the SI group Mon, 05 May 1997 16:53:23 -0700
• Shankar
  • Re: [SI-LIST] : Backplane Analysis / GTL Technology Mon, 28 Jul 1997 18:32:34 -0500
• Shawn Carpenter
  • Re: [SI-LIST] : Controlled impedance in Flex Circuit Fri, 27 Mar 1998 23:21:37 -0500
  • Re: [SI-LIST] : Controlled impedance in Flex Circuit Thu, 26 Mar 1998 17:16:31 -0500
  • Re: [SI-LIST] : Controlled impedance in Flex Circuit Thu, 26 Mar 1998 14:13:33 -0500
• Shawn Drumgo
  • [SI-LIST] : Apology Wed, 27 Aug 1997 00:48:44 -0400
• Shenoy, Jay
  • RE: [SI-LIST] : Schottky diode termination Fri, 30 Oct 1998 07:51:01 -0800
  • RE: [SI-LIST] : measuring CMOS Cin with HP4275A Fri, 10 Apr 1998 14:46:03 -0700
• Shimon_Turgeman@amat.com
  • [SI-LIST] : Clock skew Sun, 8 Nov 1998 11:59:05 +0200
  • [SI-LIST] : IC input impedance Tue, 13 Oct 1998 10:54:40 +0300
  • [SI-LIST] : Signal integrity simulation tool - your opinion and recommandation Wed, 2 Sep 1998 08:11:36 +0300
  • [SI-LIST] : daisy chain Sun, 9 Aug 1998 10:57:38 +0300
  • [SI-LIST] : Clock tree Thu, 6 Aug 1998 20:57:02 +0300
• Shirley Dipert
  • Packaging Short Course flyer Fri, 31 May 1996 16:28:23 -0500
  • Announcement of Short Course Thu, 4 Apr 1996 11:06:27 -0600
• Shreeram Siddhaye
  • Re: [SI-LIST] : Transmission Line Theory Mon, 28 Dec 1998 17:51:12 -0800
• Silbert, Steven F.
  • [SI-LIST] : field solver for differential pairs Thu, 7 May 1998 07:32:36 -0400
  • RE: [SI-LIST] : Dual Stripline impedance Wed, 15 Apr 1998 11:33:47 -0400
  • RE: [SI-LIST] : stackup question Wed, 15 Apr 1998 07:42:44 -0400
• Simon Amir - SMCC Desktop
  • Re: Controlled Impedance Connectors Thu, 20 Mar 1997 12:40:51 -0500
• skaufer@ix.netcom.com
  • Re: FW: [SI-LIST] : Output Impedance Fri, 3 Apr 1998 02:50:47 -0600 (CST)
• Skey, Kevin
  • RE: Re[2]: [SI-LIST] : power supply filtering and bypassing Fri, 06 Mar 1998 1:31pm
  • [SI-LIST] : power supply filtering and bypassing Thu, 05 Mar 1998 2:41pm
• skolli@smartm.com
  • [SI-LIST] : Jitter Measurement Wed, 30 Sep 1998 17:43:27 -0700
  • [SI-LIST] : IBIS Modeling Tue, 24 Mar 1998 08:44:51 -0700
  • [SI-LIST] : Signal Integrity Engineer Position Available Fri, 9 Jan 1998 08:38:54 -0700
  • [SI-LIST] : Differential Clock Routing Thu, 8 Jan 1998 09:02:19 -0700
• smithh@VNET.IBM.COM
  • [SI-LIST] : delay lines Wed, 24 Sep 97 15:38:41 EDT
• Somsubhro Palchaudhury
  • [SI-LIST] : My Resume.. Tue, 18 Nov 1997 13:35:06 -0500
• Soon Young Lee
  • [SI-LIST] : Substrate modeling and analysis tool Mon, 10 Nov 97 08:46:46 EST
• stefan@pad.incases.com
  • split plane/micro-island Thu, 3 Apr 1997 10:41:36 +0200
  • RE: Re: vias in ECL @ >1Ghz Thu, 3 Apr 1997 09:25:36 +0200
• Stephen Peters
  • Re: [SI-LIST] : IBIS Model Verification Wed, 09 Sep 1998 18:48:29 -0700
  • Re: [SI-LIST] : SI models creation. Thu, 03 Sep 1998 08:32:24 -0700
  • Re: [SI-LIST] : IC DIE SHRINK Fri, 10 Jul 1998 16:12:12 -0700
  • [SI-LIST] : Re: Fw: Spice models??? Fri, 12 Jun 1998 14:36:30 -0700
  • Re: [SI-LIST] : IBIS Version 3.0 Tue, 19 May 1998 14:46:23 -0700
  • [SI-LIST] : Re: How to do correlation with two extra Rising/Falling waveforms? Fri, 10 Apr 1998 14:25:53 -0700
  • Re: [SI-LIST] : transmission line theory Tue, 03 Mar 1998 09:54:58 -0800
  • I/O Model opening at Intel Fri, 15 Dec 1995 11:30:55 -0800
• Steve Corey
  • Re: [SI-LIST] : Substrate modeling Thu, 19 Nov 1998 00:06:07 -0800
• Steve Krenitsky
  • Signal Integrity advertisement Wed, 8 Jan 1997 14:12:08 -0500
• Steve Majors
  • Alloy-42 Fri, 19 Apr 96 16:32:03 EDT
• Steve Williams
  • Re: [SI-LIST] : Overshoot/Undershoot Mon, 23 Feb 1998 15:51:10 -0800
• Steve_Mango@stratus.com
  • [SI-LIST] : SI openings at Stratus else delete Thu, 12 Feb 1998 14:31:22 -0500
  • [SI-LIST] : Stratus looking for Signal Fidelity Engineers Fri, 7 Nov 97 14:47:57 -0500
  • [SI-LIST] : Books Fri, 12 Sep 97 10:38:23 -0400
  • [SI-LIST] : Challenging Signal Integrity Engineer Positions @ Stratus! Mon, 8 Sep 97 09:12:10 -0400
  • [SI-LIST] : need accurate diode model at low current Fri, 29 Aug 97 07:44:01 -0400
  • [SI-LIST] : 2 great Signal Fidelity positions open at Stratus!!! Fri, 8 Aug 97 18:04:31 -0400
• Steven Ray
  • [SI-LIST] : Looking for Signal Integrity Engineers Wed, 04 Mar 1998 17:22:08 -0800
  • Looking for Signal Integrity Engineer Tue, 20 May 1997 14:16:11 -0700
• Stuart P. MacEachern
  • +3.3,5-board stackup problem Mon, 7 Jul 1997 10:22:50 -0400
• Syed Huq
  • Re: [SI-LIST] : High Speed Queries Fri, 6 Nov 1998 15:35:05 -0800 (PST)
  • Re: [SI-LIST] : Training course in SPICE Tue, 30 Jun 1998 17:02:16 -0700
  • Re: [SI-LIST] : IBIS to Spice Tue, 12 May 1998 14:49:59 -0700
  • Re: [SI-LIST] : Re: measuring CMOS Cin with HP4275A - IPA510 Mon, 13 Apr 1998 13:53:44 -0700
  • Re: [SI-LIST] : SPICE or IBIS SI models Fri, 27 Mar 98 10:04:51 PST
  • Re: [SI-LIST] : USB modeling Thu, 11 Dec 97 17:03:09 PST
  • Re: [SI-LIST] : skin effect and transmission line simulators Fri, 5 Sep 97 13:13:40 PDT
  • s2ibis questions Tue, 3 Jun 97 17:02:38 PDT
• Takashi Yanagimoto
  • [SI-LIST] : About multilayer Board Thu, 4 Dec 1997 18:53:02 +0900
• Tan, Chun Chiat
  • RE: [SI-LIST] : Transmission line model in Pspice Sun, 17 May 1998 18:05:00 -0700
• Tan, Tat Hin
  • [SI-LIST] : microwave radiation due to network analyzers Thu, 21 May 1998 02:17:00 -0700
• Tat Hin Tan
  • Re: [SI-LIST] : Modeling connector pin vias Wed, 05 Nov 97 10:48:00 PST
  • Re: [SI-LIST] : low-cost 2-D field solver Wed, 05 Nov 97 10:49:00 PST
  • Re: [SI-LIST] : low-cost 2-D field solver Wed, 05 Nov 97 08:52:00 PST
  • Re: [SI-LIST] : Modeling connector pin vias Fri, 31 Oct 97 08:30:00 PST
  • Formula for Via Self-Capacitance and Self-Inductance Tue, 29 Apr 97 08:41:00 PDT
• tderego@hadco.com
  • [SI-LIST] : Power/Ground Decoupling Methods? Tue, 02 Dec 97 14:34:05 EST
  • Re[4]: [SI-LIST] : Decoupling capacitor selection & plac Thu, 30 Oct 97 08:20:21 EST
  • Re[2]: [SI-LIST] : Decoupling capacitor selection & placemen Wed, 29 Oct 97 07:43:46 EST
• Tedd K. Stickel
  • [SI-LIST] : Test Message (delete before reading:) Mon, 11 Aug 1997 17:52:14 -0400
  • Diff Skew 29 Jul 96 17:13:56 EDT
• Terry Morris
  • Position Available Tue, 17 Dec 1996 15:57:46 -0600
  • Position Available Tue, 6 Feb 1996 11:10:05 -0600
• the shadow
  • Design Engineers wanted in Pacific NW! Wed, 5 Feb 1997 07:39:22 -0800
• Thomas Ngo
  • Re: [SI-LIST] : Dieletric Constant Polyimide Fri, 12 Jun 1998 08:20:06 -0700
• Tieng Nguyen
  • RE: [SI-LIST] : mpc68360 Motorola IBIS models Tue, 15 Sep 1998 09:45:00 -0400
• Tim McKinney
  • s2ibis questions Tue, 3 Jun 1997 15:11:09 -0500
  • s2ibis questions Tue, 03 Jun 1997 15:10:23 CDT
• Tim Morley
  • RE: [SI-LIST] : 3.3V Design Mon, 17 Aug 1998 09:47:13 +0100
• Tim Nustad x7-4361
  • Re: Connectors and cables for high-speed digital signals Fri, 26 Jul 96 10:22:59 CDT
• Tim Parks
  • [SI-LIST] : conductor thickness versus current Mon, 16 Nov 1998 17:35:28 +0000
  • [SI-LIST] : Priority of test pads Fri, 04 Sep 1998 12:56:38 +0100
  • RE: [SI-LIST] : GND plane heat dissipation Fri, 24 Jul 1998 09:09:13 +0100
  • [SI-LIST] : GND plane heat dissipation Thu, 23 Jul 1998 16:42:49 +0100
• Tim Postel
  • Re: [SI-LIST] : Some questions about capacitor reliability Thu, 11 Dec 1997 18:16:32 -0800
  • Re: Relative Permeability and Resistivity of Eutectic Solder Ball Mon, 14 Jul 1997 10:27:43 -0700
  • Re: Relative Permeability and Resistivity of Eutectic Solder Ball Mon, 14 Jul 1997 10:27:43 -0700
  • Re: Eye Patterns Mon, 22 Jan 96 18:27:55 PST
• Timothy.Nustad@amermsx.med.ge.com
  • RE: continously variable delay line avail? Fri, 9 May 1997 10:23:35 -0500
• Tina Engel
  • [SI-LIST] : Clock Verification Seminar Wed, 06 May 1998 15:41:27 -0700
• Todd Hubing
  • Re[3]: impedance across ground plane Thu, 22 Feb 1996 14:09:13 GMT+0600
• Todd Nichols
  • [SI-LIST] : Re: FS: Book (numerical electromagnetics) Fri, 10 Jul 1998 09:14:23 -0400
  • [SI-LIST] : Book for sale Fri, 12 Sep 1997 13:26:51 -0400
• Todd Westerhoff
  • Re: [SI-LIST] : Design Note on Right Angle Bends Sat, 11 Jul 1998 17:34:40 -0400
  • Re: [SI-LIST] : Excessive clock overshoot] Fri, 15 May 1998 18:37:07 -0400
• Tom Giovannini
  • [SI-LIST] : bga Wed, 6 May 98 07:38:58 PDT
  • Re: vias in ECL @ >1Ghz Wed, 2 Apr 97 13:04:43 PST
  • Coupled Line Program available via anonymous ftp Tue, 10 Dec 96 10:37:42 PST
• Tom Warneke
  • Re: [SI-LIST] : Signal Integrity In General Tue, 15 Sep 1998 15:48:56 -0400
  • Re: [SI-LIST] : SI Software Fri, 05 Sep 1997 11:29:15 -0400
  • Re: Line Parameters of Twisted Cables ? Wed, 09 Apr 1997 11:34:53 -0400
  • re: Impedance Software Wed, 31 Jul 1996 08:00:58 -0400
  • re: Impedance Software Wed, 31 Jul 1996 07:53:41 -0400
• Tom Zimmerman
  • Re: [SI-LIST] : Decoupling:routing Thu, 30 Apr 1998 09:14:07 -0500 (CDT)
  • Re: [SI-LIST] : Decoupling:routing Wed, 29 Apr 1998 09:12:19 -0500 (CDT)
• Tomm V Aldridge
  • Re[4]: impedance across ground plane Fri, 23 Feb 96 16:38:00 PST
  • JOB POSTING Thu, 21 Dec 95 10:56:00 PST
• Torsten Maeser
  • Re: [SI-LIST] : Burst noise simulation Thu, 18 Sep 1997 16:02:28 +0200
  • Re: [SI-LIST] : stackup impedance. Thu, 18 Sep 1997 11:28:33 +0200
  • Re: [SI-LIST] : skin effect and transmission line simulators Tue, 09 Sep 1997 09:16:34 +0200
• torsten@pad.incases.com
  • Re: Line Parameters of twisted cables Thu, 10 Apr 1997 08:35:01 +0200
• treytnar
  • Re: [SI-LIST] : SI University programs Tue, 15 Dec 1998 11:32:28 +0100
  • [SI-LIST] : Call for participation: Workshop on Signal Propagation in Interconnects Mon, 15 Dec 1997 15:06:40 +0100
• Treytnar Dieter
  • [SI-LIST] : =?ISO-8859-1?Q?[SI-LIST]:_2nd_IEEE_Workshop_=22Signal_Propagation_on_Interconnects=22?= Tue, 17 Mar 1998 17:15:38 +0100
  • [SI-LIST] : CALL FOR PAPERS, 2nd International Workshop on SIGNAL Wed, 22 Oct 1997 14:39:45 +0100
• Unger Bernhard
  • AW: [SI-LIST] : How to measure MOS capacitance Fri, 17 Apr 1998 12:03:49 +-200
  • AW: AW: [SI-LIST] : Burst noise simulation Mon, 22 Sep 1997 10:57:33 +-200
  • AW: [SI-LIST] : Burst noise simulation Fri, 19 Sep 1997 17:35:36 +-200
  • [SI-LIST] : Burst noise simulation Fri, 12 Sep 1997 18:08:54 +-200
• Uwe Keller
  • Re: Newbie question Re: PCB SI simulation tools Mon, 14 Jul 1997 19:31:54 +0200 (MET DST)
  • Re: Vertical Transmission Line ... Mon, 9 Jun 1997 09:41:24 +0200 (MET DST)
  • Re: math sw for Unix??? Wed, 30 Apr 1997 12:53:01 +0200 (MET DST)
  • Re: L/R response time Tue, 18 Feb 1997 09:50:18 +0100 (MET)
  • Re: Inductance calculation Tue, 18 Feb 1997 09:20:18 +0100 (MET)
• Vadim Heyfitch
  • Re: [SI-LIST] : The Flight-Time/SI Effects of Trace 'Trombon Thu, 08 Jan 98 19:02:00 PST
  • [SI-LIST] : from SPICE to EDIF Thu, 11 Dec 97 18:58:00 PST
  • [SI-LIST] : [SI-LIST]:Re: dielectric loss Thu, 18 Sep 97 18:49:00 PDT
• Valerie Allen
  • Circuit Design Consultant Thu, 6 Jun 1996 12:40:16 -0600
  • Junior Hardware Design Engineer Thu, 6 Jun 1996 12:35:26 -0600
  • Signal Integrity-Senior Hardware Desing Engineer Thu, 6 Jun 1996 12:32:32 -0600
  • Signal Integrity Job:Austin,Texas-Hardware Design Wed, 15 May 1996 13:21:43 -0600
  • Signal Integrity Job:Austin,Texas-Hardware Design Wed, 20 Mar 1996 13:36:27 -0600
  • Signal Integrity Job:Austin,Texas-Hardware Design Mon, 4 Mar 1996 22:20:59 -0600
  • Signal Integrity Job:Austin,Texas-Hardware Design Thu, 22 Feb 1996 10:07:23 -0600
  • TX-Austin-Hardware Design Engineer Tue, 20 Feb 1996 15:37:36 -0600
• Van T. Hua
  • [SI-LIST] : Signal Integrity In General Thu, 30 Jul 1998 17:18:30 -0700
• Vigliarolo Roberto
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Wed, 12 Aug 1998 10:47:41 +0200
  • Re: [SI-LIST] : Surface Mount Cap Lead Inductance Tue, 11 Aug 1998 17:55:15 +0200
  • Re: [SI-LIST] : Non-ideal return current paths Thu, 6 Aug 1998 18:32:04 +0200
• Vince Harradine
  • [SI-LIST] : PCB Build Wed, 27 Aug 1997 13:33:58 +0100
• Vinu Arumugham
  • Re: [SI-LIST] : Clock tree Mon, 17 Aug 1998 12:07:35 -0700
  • Re: [SI-LIST] : Crow bar current (dc switching current) vs power Wed, 15 Jul 1998 12:33:15 -0700
  • Re: [SI-LIST] : Does IBIS describe output transition which both MOS turned on? Tue, 12 May 1998 22:56:12 -0700
  • Re: [SI-LIST] : another stack-up question Fri, 01 May 1998 17:05:44 -0700
  • Re: [SI-LIST] : tying clock outputs to reduce skew? Wed, 15 Apr 1998 14:26:44 -0700
  • Re: [SI-LIST] : Dual Stripline impedance Wed, 15 Apr 1998 10:22:23 -0700
  • Re: [SI-LIST] : Controlled impedance in Flex Circuit Mon, 30 Mar 1998 10:05:29 -0800
  • Re: [SI-LIST] : Differential pairs and place splits Wed, 11 Feb 1998 10:08:38 -0800
  • Re: [SI-LIST] : Differential pairs and place splits Tue, 10 Feb 1998 09:17:18 -0800
  • Re: [SI-LIST] : bypass cap question (long, simple) Sun, 01 Feb 1998 11:12:33 -0800
• Volk, Andrew M
  • [SI-LIST] : Making trace impedance tolerance range Tue, 1 Sep 1998 09:58:00 -0700
  • RE: [SI-LIST] : AGP impedance compensated drivers? Wed, 10 Jun 1998 08:49:00 -0700
• W. C. Kreiger
  • Electromechanical relays Fri, 9 Aug 96 09:46:26 EDT
  • Electromechanical relays Thu, 8 Aug 96 09:38:12 EDT
• Wade H. Nelson
  • [SI-LIST] : Backplanes, connectors, cables - Simulating? Fri, 6 Feb 1998 14:25:59 -0600
• Wai Yeung Yip
  • Ansoft mesh generation Fri, 8 Nov 96 17:52:11 PST
  • Re: Modeling - Fast Tr Fri, 6 Sep 96 13:36:05 PDT
  • Re: Modeling - Fast Tr Thu, 5 Sep 96 09:08:53 PDT
  • pkg elect char job op Mon, 26 Aug 96 17:39:58 PDT
• Wai-Yeung Yip
  • Re: [SI-LIST] : Inductance vs. frequency Tue, 21 Apr 1998 09:05:11 -0700 (PDT)
  • Re: [SI-LIST] : More on differential impedance calculations Thu, 5 Feb 1998 18:45:10 -0800 (PST)
• Walid Chamma
  • ANTEM'96 Fri, 23 Feb 1996 16:12:49 +0600
  • Call for Papers ( EM Simuation Tools ) Mon, 5 Feb 1996 10:14:01 +0600
• Walker, Jim
  • RE: [SI-LIST] : field solver for differential pairs Thu, 7 May 1998 10:43:01 -0500
• Walt Kreiger
  • Dual stripline Thu, 27 Mar 1997 11:11:23 -0600
  • Dual Stripline Tue, 4 Mar 1997 16:17:42 -0600
• Wang Lin
  • [SI-LIST] : ibis,si-list,looking for ibis models Wed, 01 Apr 1998 09:47:56 +0800
• Warren Sande
  • [SI-LIST] : RE: Freeware for demonstration of transmission line reflections Wed, 21 Oct 1998 16:24:44 -0400
• wbecker@us.ibm.com
  • [SI-LIST] : SI University programs Tue, 15 Dec 1998 08:27:37 -0500
• Weber Chuang
  • RE : [SI-LIST] : RE: TDR modeling Wed, 25 Nov 1998 10:29:31 +0800
  • RE : [SI-LIST] : RE: TDR modeling Mon, 23 Nov 1998 10:24:14 +0800
  • RE : RE : [SI-LIST] : RE: Models & EDA Vendors Fri, 20 Nov 1998 10:50:39 +0800
  • RE : [SI-LIST] : RE: Models & EDA Vendors Fri, 20 Nov 1998 10:25:10 +0800
  • [SI-LIST] : Definition for rise time? Wed, 10 Jun 1998 11:40:41 +0800
  • [SI-LIST] : method for identifying Xtalk and SSO noise ? Sun, 31 May 1998 14:54:44 +0800
  • [SI-LIST] : Switching current and pull-down current Mon, 20 Apr 1998 15:36:41 +0800
  • [SI-LIST] : Switching current and pull-down current Mon, 20 Apr 1998 15:36:41 +0800
  • RE : [SI-LIST] : Need your comments in selection of SI simula Mon, 20 Apr 1998 15:03:03 +0800
  • RE : [SI-LIST] : IBIS Modeling Wed, 25 Mar 1998 17:34:58 +0800
  • Re: [SI-LIST] : Effective Dielectric Tue, 24 Mar 1998 09:47:32 +0800
  • Re : [SI-LIST] : Modeling Package parasitics Tue, 17 Feb 1998 10:48:26 +0800
  • [SI-LIST] : internal layer routing and EMI issues Wed, 4 Feb 1998 11:09:43 +0800
  • Re: [SI-LIST] : How to identify SSO Thu, 8 Jan 1998 12:34:04 +0800
  • Re: [SI-LIST] : How to identify SSO Thu, 8 Jan 1998 12:34:04 +0800
  • [SI-LIST] : RF experience VS SI issues Sat, 22 Nov 1997 10:31:04 +0800
  • [SI-LIST] : ¦^ĀŠ : [SI-LIST] : stackup impedance. Fri, 19 Sep 1997 10:18:21 +0800
  • [SI-LIST] : ¦^ĀŠ : [SI-LIST] : stackup impedance. Wed, 17 Sep 1997 14:57:53 +0800
• West, Todd
  • RE: Re[2]: [SI-LIST] : USB & LVDS Differential signals routing Fri, 6 Nov 1998 09:04:15 -0800
  • RE: [SI-LIST] : No subject given Thu, 5 Nov 1998 18:45:18 -0800
• Weston Beal
  • Re: [SI-LIST] : Clock skew Mon, 9 Nov 98 10:13 CST
  • Re: [SI-LIST] : IBIS Model Verification Mon, 14 Sep 98 08:59 CDT
  • Re: [SI-LIST] : IBIS Model Verification Wed, 9 Sep 98 14:28 CDT
  • Re: [SI-LIST] : Propagation velocity / discontinuous reference plane Wed, 6 May 98 13:22 CDT
  • Re: [SI-LIST] : SI openings at Stratus else delete -- OBJECTIONS ... Thu, 12 Feb 98 16:57 CST
  • Re: [SI-LIST] : Re: Differential impedance Thu, 5 Feb 98 16:41 CST
  • Re: [SI-LIST] : Embedded microstrip calculations, Ultracad Calculator Wed, 10 Dec 97 13:30 CST
  • Re: Line Parameters of Twisted Cables ? Wed, 9 Apr 97 12:03 CDT
  • differential impedance Wed, 9 Apr 97 11:26 CDT
• Wojciech Babij/UB Networks
  • RE: Xtalk/Zo tools 18 Apr 96 11:18:32 EDT
• Wojciech_Babij@nmss.com
  • Re: [SI-LIST] : Schottky diode termination Mon, 26 Oct 1998 15:43:30 -0500
  • Re: [SI-LIST] : Diode Termination of Transmission Lines Wed, 10 Jun 1998 09:06:17 -0400
• Wojciech_Babij@UB.com
  • Re: [SI-LIST] : (unknown chars) : [SI-LIST] : stackup impedance. Wed, 17 Sep 1997 08:53:49 -0400
• WonSae Sim
  • [SI-LIST] : Contact Current Rating ? Fri, 22 May 1998 11:30:59 +0900
  • [SI-LIST] : Pinout of 2mm HM Backplane Connector Mon, 29 Sep 1997 18:19:31 +0900
• Xavier Aragones
  • Re: [SI-LIST] : Substrate modeling Thu, 19 Nov 1998 15:14:29 +0100 (MET)
  • Re: [SI-LIST] : Substrate modeling and analysis tool Tue, 11 Nov 1997 17:25:40 +0000
• Xiaojun Zhu
  • Re: [SI-LIST] : Propagation velocity / discontinuous reference plane Wed, 6 May 1998 16:27:53 -0700 (PDT)
  • Re: [SI-LIST] : Propagation velocity / discontinuous reference plane Wed, 6 May 1998 12:15:40 -0700 (PDT)
• Xingchao Yuan
  • Re: [SI-LIST] : Re: delay lines with PCB traces Thu, 25 Sep 1997 11:58:25 -0400 (EDT)
  • Re: [SI-LIST] : Re: delay lines with PCB traces Thu, 25 Sep 1997 10:12:10 -0400 (EDT)
  • Re: vias in ECL @ >1Ghz Wed, 2 Apr 1997 10:22:49 -0500
• ycchien
  • Re: [SI-LIST] : Signal Ground at the connector Fri, 18 Dec 1998 09:23:52 +0800
  • [SI-LIST] : Signal Ground at the connector Thu, 17 Dec 1998 16:50:55 +0800
• Yeap Swee Cheong
  • [SI-LIST] : Crosstlak in ultra high speed pcb Thu, 10 Sep 1998 01:14:17 +0800
  • [SI-LIST] : [Fwd: (no subject)] Sat, 25 Jul 1998 00:04:13 +0000
• Yee Pak Hong
  • [SI-LIST] : Extraction of mutual inductance and mutual capacitance from VNA Mon, 27 Apr 1998 11:38:32 -0700
  • [SI-LIST] : Polylines conversion for Maxwell SI Solver Fri, 23 Jan 1998 09:37:24 -0800
  • [SI-LIST] : Polylines conversion for Maxwell SI Solver Thu, 22 Jan 1998 09:02:59 -0800
  • Relative Permeability and Resistivity of Eutectic Solder Ball Sun, 13 Jul 1997 21:28:59 -0500 (CDT)
  • Relative Permeability and Resistivity of Eutectic Solder Ball Sun, 13 Jul 1997 20:14:18 -0500 (CDT)
  • Relative Permeability and Resistivity of Eutectic Solder Ball Sun, 13 Jul 1997 21:28:59 -0500 (CDT)
  • Relative Permeability and Resistivity of Eutectic Solder Ball Sun, 13 Jul 1997 20:14:18 -0500 (CDT)
• Yehuda D. Yizraeli
  • Re: [SI-LIST] : High Speed Queries Sun, 8 Nov 1998 07:28:14 +0200 (EET)
  • [SI-LIST] : How to model chip to SDRAM pc board Tue, 13 Oct 1998 19:00:15 +0200 (EET)
  • [SI-LIST] : Power-Down effect on power supply voltage and Clocks Sun, 2 Aug 1998 11:38:55 +0200 (EET DST)
  • [SI-LIST] : How substrate noise influence input levels..??? Sun, 5 Jul 1998 13:01:51 +0200 (EET DST)
  • Re: [SI-LIST] : Worst case VI curve for PCI spec a reality? Mon, 20 Apr 1998 17:43:19 +0200 (EET DST)
  • RE: [SI-LIST] : How to measure MOS capacitance Mon, 20 Apr 1998 11:29:28 +0200 (EET DST)
  • [SI-LIST] : How to measure MOS capacitance Thu, 16 Apr 1998 11:27:17 +0200 (EET DST)
  • Re: [SI-LIST] : Driver Strength Tue, 3 Mar 1998 08:54:37 +0200 (EET)
  • Re: [SI-LIST] : CMOS off-chip driver design Thu, 26 Feb 1998 13:05:49 +0200 (EET)
  • Re: [SI-LIST] : Down-bond in chip packaging Wed, 11 Feb 1998 23:15:45 +0200 (EET)
  • Re: [SI-LIST] : Down-bond in chip packaging Tue, 10 Feb 1998 08:41:29 +0200 (EET)
  • [SI-LIST] : Down-bond in chip packaging Mon, 9 Feb 1998 00:17:45 +0200 (EET)
  • Re: [SI-LIST] : How to identify SSO Mon, 12 Jan 1998 11:30:12 +0200 (EET)
  • Re: [SI-LIST] : How to identify SSO Mon, 12 Jan 1998 07:27:47 +0200 (EET)
  • Re: [SI-LIST] : How to identify SSO Mon, 12 Jan 1998 07:18:39 +0200 (EET)
  • Re: Spice to IBIS Tue, 11 Mar 97 16:06:05 IST
  • IBIS Models or full spice netlist...? Sun, 29 Dec 96 9:53:48 IST
  • Re: Ansoft mesh generation Sun, 10 Nov 96 15:05:06 IST
  • Package charcterization SW, S-I needs etc... Mon, 30 Sep 96 16:23:31 EET
  • Modeling for packages (Electrical and thermal). Fri, 12 Apr 96 0:26:34 ISR
• Yoon Kim
  • [SI-LIST] : job opening Tue, 17 Mar 1998 19:59:00 -0800 (PST)
• Young, Randy
  • [SI-LIST] : Differential pairs and place splits Tue, 10 Feb 1998 09:50:21 -0500
• yuan
  • Re: [SI-LIST] : Conducted EMC Testing of PLL jitter Mon, 5 Oct 1998 09:19:41 -0700 (PDT)
• Yun Li
  • hiring Mon, 15 Jan 96 18:44:37 PST
  • Need free 2D mesh Generation Software Fri, 12 Jan 96 14:36:08 PST
• Yusuf Attarwala
  • [SI-LIST] : New 3-D Inductance Extraction Software : CAPRI3D Wed, 12 Nov 1997 13:43:10 -0500
• Zeelan Technology
  • Re: Example ECL driver/receiver model Sat, 12 Apr 1997 18:10:25 -0700 (PDT)
  • Zeelan Technology Thu, 5 Sep 1996 08:23:38 -0700 (PDT)
• Zenklusen, Fred
  • FW: [SI-LIST] : Output Impedance Wed, 1 Apr 1998 13:46:14 -0800
• Zhang, Michael T
  • RE: [SI-LIST] : Conducted EMC Testing of PLL jitter Tue, 29 Sep 1998 14:44:19 -0700
  • RE: [SI-LIST] : Measuring PLL jitter Thu, 2 Jul 1998 08:29:57 -0700