I will have on the new design I am working on a single component (FPGA)
at VCC3.3V. The rest of the board is 5V. Board size is "small" 3"x5",
frequencies are under 40Mhz although rise time may be a problem. The
amount of current on the 3.3v is estimated under 200mA so we plan to use
a simple reg to generate 3.3v for 5V. We project 6 layers including Gnd
and VCC5v plane. How would be the more efficient way to route the 3.3V.
We obviously don't want to have a specific 3.3v plane just for 1
I plan to build under the FPGA a small 3.3V plane placed inside the 5V
Any input on this subject greatly appreciated.
3001 Orchard Pkwy
San Jose CA95134-2088
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