<Just to make sure: are you talking about logic upset or hard failure?
Most CMOS outputs have the same number of drains connected to the
pad regardless, but adjust strength by tieing off gates to keep the
devices OFF all the time. That way, ESD transients still have the
full device complement to share the energy.>
I rarely see direct damage to any chip these days once it's in circuit. Most
ESD damage I see usually occurrs during assembly, and shows up during a
products HALT. The problems I have to resolve are mainly upset.
<For logic upsets, OTOH, the problem is that current into a
output will produce higher voltage responses than current into a
What we observe is not current into the output, because we can show the output
does not move. What we have is the case where the trace isolates the output
from the driven input. The susceptibility of the input now depends on the
pull-up/down mechanism. With stronger drivers, designers tend to use lower
values for their pull-up/down mechanism, making the very high impedance input
become more dominated by the pull-up/down mechanism. The lower the value, the
stronger the input is held in its intended state.
<Well, the EMC problem isn't so much driver strength as Ldi/dt noise.
be addressed by:
1) Reducing max I independently of dt and L (the weak driver approach)
2) Reducing L independently of dt and max I (packaging solutions)
3) Increasing dt independently of max I and L (custom drivers)
4) Isolating the supply paths for high-speed I/O from victim lines
In an ideal world a lot of this can be done. In my experience, I see more and
more where the size of the box ( usually plastic ) is fixed, the circuitry to
go in it is fixed, and traces are routed where ever possible to make the thing
function first, then pass agency approvals next.
<As is almost always the case in EMI/susceptibility engineering a
combination approach works best. Drivers with no more static drive
than necessary should be used with predrivers as slow as the application
will stand, with lots of low-inductance supply connections split between
noise generating and noise susceptible I/O groups.>
Wise words. However, size, cost, agency approvals, time to market etc., all
make this difficult to achieve. I was hoping that we could evolve some ideas
on how much was enough, rather than just generalise....
Best regards to all,
Owner L F Research EMC Design and Test Facility