RE: [SI-LIST] : Selection of Optimum Termination

Bob Davis (bob@scsi.com)
Tue, 20 Oct 1998 11:03:28 -0700

Phillipe -

You are a super straight man. This is the reason for the study group for
the P1537 Electronic data format project. This project is not about the
electronic version of a data sheet but about the specific data needed for
the simulation environments that we use on a day by day basis.

I have your name on the distribution for the next meeting, which will be on
the November 10th or 11th at Santa Clara University. I will be getting the
notice out in the next day or so.

Thanks,

Bob Davis
Summit Computer Systems, Inc
Signal Integrity Specialists - High Speed, Critical PCB Design
408-353-2706
bob@scsi.com , www.scsi.com

-----Original Message-----
From: Poulet P. [mailto:poulet@fax.ussj.ricoh.com]
Sent: Tuesday, October 20, 1998 9:29 AM
To: bob@scsi.com
Cc: si-list
Subject: Re: [SI-LIST] : Selection of Optimum Termination

Bob,

I like very much this physics way of describing the problem many
engineers are dealing with those days. Because thinking of SI issues
during the design stage is becoming more and more critical (even if
frequencies at play are not that high). Don't you think we should find
in every data sheet some parameters related to SI, the same way we find
easily information about power dissipation or timing. How many data
sheet have you seen with a clear value for rise and fall time? This in
my opinion would help new designers be more aware of all this SI stuff
at the source..

Great list

Philippe Poulet
Hardware Engineer
RICOH Corp
3001 Orchard Pkwy
San Jose CA95134-2088

Bob Davis wrote:

> Abe,
>
> Signal Integrity is about energy control, from the source of energy to
> the
> one or more destinations.
>
> Series termination schemes absorb the excess energy early, while
> parallel
> termination schemes absorb it later. The topology directs the energy
> to
> where it is needed, when it is needed. Excessive energy ends up going
> where
> it is not wanted and coming back to bite you later. A 100ma 1ns
> driver with
> a 3 volt edge from a CMOS device pushes much more energy (~6-9 times)
> into
> the topology than an ECL/PECL driver does. Almost all modern
> technology
> receivers require input currents ranging from 1 nanoamp to 1 microamp
> to
> cover the leakage of the input protection diodes, which is 5 to 8
> orders of
> magnitude below what the driver is capable of driving. The remaining
> energy, with high spectral content, is either absorbed in the
> termination,
> the lossy board material, protection diodes, nearby lines or is
> radiated for
> the FCC to look for.
>
> As a circuit must work with both strong case and weak case drivers,
> the
> starting energy varies from a low ratio of 2:1 to as much as 5:1 with
> some
> loosely controlled processes and still must make a reasonably clean,
> timely,
> transition of the receiver threshold.
>
> Think spectral energy control. Remember the energy is in the fields
> between
> the signal and the return path.
>
> I hope this provide a simpler way of thinking about SI.
>
> Bob Davis
> Summit Computer Systems, Inc
> Signal Integrity Specialists - High Speed, Critical PCB Design
> 408-353-2706
> bob@scsi.com , www.scsi.com
>
> -----Original Message-----
> From: owner-si-list@silab.Eng.Sun.COM
> [mailto:owner-si-list@silab.Eng.Sun.COM] On Behalf Of Abe Riazi
> Sent: Monday, October 19, 1998 8:59 PM
> To: 'si-list@silab.eng.sun.com'
> Subject: [SI-LIST] : Selection of Optimum Termination
>
> Hi Everyone:
>
> Termination constitutes an important topic of signal integrity. I
> have been interested in reviewing articles which describe the required
>
> steps for determination of optimum termination for a high speed
> digital
> design.
>
> Many papers written on this subject, include an excellent
> description
> of various types of termination (i.e. Series, Parallel, Thevenin,
> Diode,
> etc.). Some of the articles illustrate that to select the correct
> termination for a high speed digital design, it is necessary to take
> into consideration the technology (i.e. CMOS, TTL, ECL, etc.) of the
> components. This is due to the fact that several characteristics of
> the
> drivers and receivers (for example rise and fall times, input and
> output
> impedances) play a critical role in determination of the optimum
> termination method and component values. I was impressed by a more
> recent publication which discussed another significant element, namely
>
> the routing scheme (i.e. daisy chain, star, point to point, etc.) or
> topology, which should be also carefully evaluated when choosing a
> termination technique. For instance, parallel termination is well
> suited for daisy chain routing, and series termination is frequently a
>
> superior choice for the star topology.
>
> Topology, Termination, and Technology are at times referred to as
> the three "T"s of signal integrity. A careful appraisal of each of
> the
> three is often a necessity when determining the most effective
> termination type.
>
> I would appreciate your comments and suggestions related to
> required
> considerations, computations, or steps towards selection of optimum
> termination.
>
> Best Regards,
>
> Abe Riazi
> SI Engineer
> Anigma, Inc.
>
> email: ariazi@anigma.com
>
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