This is a second call to the European IBIS Summit Meeting for participation.
While we tentatively have 10 presentations (see below), we do have room for
several more. We have nearly 30 people signed up so far and we anticipate a
very interesting and informative exchange of ideas. So if you are interested
in doing a presentation or in participating, please respond to the notice
below. Note, some of the information in the Announcement is updated from the
original announcement.
Best Regards
Bob Ross
Interconnectix BU of Mentor Graphics
E U R O P E A N I B I S S U M M I T M E E T I N G
S E C O N D A N N O U N C E M E N T
Time/Date: 9 AM - 5 PM, Thursday, February 26, 1998
Location: Concorde-Lafayette Hotel (Adjacent to Le Palais des Congress
de Paris Porte Mailot - Site of the DATE98 Conference)
Paris, France
Content: Presentations and Discussions
Purpose: Solicit and Exchange IBIS Model Related Information and Ideas.
Sponsors: Mentor Graphics, Cadence, High Design Technology
DATE98 Show: DATE98 - February 23-26, 1998. The IBIS meeting is scheduled
the day following the last day of the trade show portion of the
Conference.
See www.date-conference.com for more information.
PCB Symposium: An all day symposium is scheduled Wednesday, February 25, 1998,
10 AM - 4 PM on PCB design issues. This is being co-organized
by seven EDA vendors: Cadence, Incases, Mentor Graphics,
VeriBest, Viewlogic, Xynetix, and Zuken-Redac. An informative,
vendor-neutral program and panel sesson is scheduled. Plan to
include DATE98, the PCB Symposium, and the IBIS Summit Meeting
in your visit. Registration is required. You can register
through several EDA vendors in Europe, through the DATE98
web site or else by e-mail to [email protected]
BACKGROUND
As a result of regular EIA IBIS Open Forum meetings since 1993, IBIS Version
2.1 has been ratified both nationaly (in the United States of America)
as ANSI/EIA-656 and internationally as IEC 62014-1. Most of the IBIS
are conducted on a regular basis via teleconferencing, but the EIA IBIS
Open Forum also conducts two face-to-face meetings every year at the Design
Automation Conference (DAC) and DesignCon locations. While some of the IBIS
Summits focused on resolving standards issues, others have been used for
general IBIS information exchange. Historically, some of the IBIS advances
have come from such exchanges.
Because of wide-spread international usage and acceptance of IBIS, the
EIA IBIS Open Forum will hold a European IBIS Summit at the same time as the
DATE98 Conference and PCB Symposium in Paris, France. We are particularly
interested the international experiences and ideas at this IBIS Summit.
CALL FOR PARTICIPANTS
People involved in IBIS Model development, EDA tool development, and digital
circuit design are invited to participate in the European IBIS Summit meeting.
If you plan to participate, please register with the information below
(deadline, February 13, 1998):
Name:
E-mail address:
Company:
Telephone:
Send to:
Bob Ross ([email protected]) or
Karine Loudet ([email protected]) +33-1-3067-1912
CALL FOR PRESENTATIONS
We are seeking presentations from individuals who have IBIS experiences
or issues. We currently have about 10 tentively planned presentation,
but can accept several more. See below for what is currently planned.
Format of Presentation: Overhead Projections
Time: 15-30 Minutes
Electronic Archival: We request electronic versions so that the
presentations can be archived and also made
available to non-attendees. Formats used in
the past have been text, Power Point, Word,
Postscript, and Acrobat. Electronic presentations
should be made available by February 13, 1998.
Otherwise the presentor will be expected to provide
50 copies for distribution.
If you plan a presentation, please supply
Title:
Presenter:
E-mail address:
Company:
Telephone:
Estimate Time:
Send this to:
Bob Ross ([email protected])
AGENDA
The agenda includes presentations, discussions, breaks, and a buffet luncheon (which will be provided). Our tenative set of presentations include:
Bob Ross, Interconnectix BU of Mentor Graphics, USA
Welcome, EIA IBIS Open Forum Overview
Christian Marot, Siemens, France
IBIS Models and EMC Simulation Standardization Status
Werner Rissiek, Incases, Germany
IBIS and Radiation Analysis
Razvan Ene, High Design Technology, Italy
IBIS Models for EMC and High-Frequency Devices
Prakash Radhakrishnan, Intel, USA
Challenges in Using IBIS in High Frequency Applications
Bernhard Unger, Siemens, Germany
SI-Analysis with HSPICE Based on IBIS Behavioral Models
C. Kumar, Cadence, USA
Problems in V-T Curve Modeling and Simulation
Syed Huq, National Semiconductor, USA
IBIS Model Development at National Semiconductor
John Fitzpatrick, Alcatel, France
Use of IBIS in Alcatel
Gerald Bannert, Siemens, Germany
Required IBIS Enhancements
FOR FURTHER INFORMATION:
Bob Ross,
Chair, EIA/IBIS Open Forum
Interconnectix Business Unit, Mentor Graphics
8005 S.W. Boeckman Road
Wilsonville, Oregon 97070
USA
(503) 685-0732
[email protected]