Having a look at new fineline BGA packages and the task of breaking out
their signals onto a PCB - it appears that unless expensive blind vias
are used, it is necessary to increase the number of signal layers
considerably. Altera recommends 9 signal layers unless you can fit 2
traces between vias (which needs 5 mil traces and very small vias -
cheaper to add layers). Any recommendations on board stack-ups for these
requirements?
Also - I believe - that in normal situations, as long as decoupling caps
and supply pins have their connections to PWR/GND planes made with very
short trace lengths, it is not very important to get the cap really
close to the supply pins - the inductance of the power planes is so low
it doesn't matter much - better to make routing life easier by shifting
them away a bit if needed.
For the fineline BGA packages they seem to have lots of VCC, GND pins
clustered in the centre of the chip (well at least the Altera FLEX10KE
devices do). All decoupling caps will have to be placed around the
outside of the device. Breaking out the device signals with through-hole
vias is much cheaper - but this leaves the power planes looking like
Swiss cheese.
Has anyone looked at this and worked out how much it affects plane
inductance? How critical is the placement of decoupling caps with these
packages??
Any help = much appreciation ..
Andy Phillips
Supercomputing Systems AG
Zurich Switzerland
**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****