[SI-LIST] : Preferred PWB impedances

D. C. Sessions (dc.sessions@tempe.vlsi.com)
Tue, 18 Nov 1997 09:04:25 -0700

I had an interesting meeting late last week. VLSI is
drafting the specs for our newest I/O library and rather
than wet-finger it, we're asking for a little help in
making them meet real-world needs.

Here's the question for the floor:

If you could have only four 3.3v CMOS driver types, what
would you have. (Aside from HSTL, SSTL, etc.) One obvious
candidate is a reflected-wave driver for 50-ohm nominal
lines; that comes to about 10mA at 350mV from the rails
under worst case conditions. A 65-ohm reflected-wave
driver would run about 25% lighter, or about 8mA.
Incident-wave is another matter entirely.

SO! the floor is open for nominations. Keep in mind that
excessively strong drivers are both inherently slower and
more vulnerable to SSO degradation.

D. C. Sessions