Re: [SI-LIST] : SMA Impedance Matching

[email protected]
Wed, 04 Mar 1998 13:16:15 -0800

Hi Bruce,

I have done simulations of the interface between SMA connectors and boards
using Ansoft's Quick 3D Parameter Extractor tool. I agree with Chris that
the problem is the excess capacitance between the center conductor and the
mounting structure of the connector. Another source of excess capacitance
that Chris did not mention is between the body of the connector and the
signal trace on the board; in my experience this can be as significant as
the capacitance to the pin. So if you are going to model the situation, I
recommend that you include the signal trace in the model and not just the

I agree with Chris that the solution to this problem is to reduce the excess
shunt capacitance by appropriate changes to the board and/or to add some
compensating inductance near the connector. Depending on your frequency of
operation, this could be accomplished by reducing the width of the signal
trace and/or placing a small piece of ferrite on or near the signal trace;
there are other methods as well.

Best regards,

Eric Wheatley

Eric Wheatley Ph.D. (760) 942-9426 (phone)
Alterra Technology Co. (760) 942-2366 (fax)
435 Dunsmore Ct. [email protected]
Encinitas, CA 92024 US

At 01:59 PM 3/4/98 EST, you wrote:
>I installed a Straight Jack Receptacle (SMA female connector) on an
>FR-4 PCB. TDR measurements indicate that the impedance goes down to
>25-30 ohms where the connector pin actually goes through the board.
>I am concerned about this mismatch. Does anyone have any input as to
>how I can minimize the size of this discontinuity?
>Thanks for any and all help,
>Bruce Wallick