FW: [SI-LIST] : How to identify SSO groups?

Peterson, James F (jfpeterson@space.honeywell.com)
Mon, 29 Dec 1997 12:58:06 -0000

Manix makes a good point in regards to Praveen's question on SSO. But
can you really lump all of that load capacitance together? It seems that
with a bus that is large enough to contain 500pF, then to be accurate,
the load has to be distributed, at least somewhat.
best regards,
Jim Peterson
jfpeterson@space.honeywell.com

> ----------
> From: Manix Velu[SMTP:manix@shuttletech.co.in]
> Sent: Monday, December 22, 1997 11:51 PM
> To: si-list@silab.Eng.Sun.COM
> Cc: alaa@lsil.com
> Subject: [SI-LIST] : How to identify SSO groups?
>
> Hi Alaa F.Alani,
>
> It is not even 1ns. Even switching within 10nsec width also may be
> considered as SSO. What our vendors propose thus is to use a delay of
> around half-a-clock (say for about 40 to 60 ns) to skew the outputs
> of around 12mA typ sinking a load capa of 500pF!!!
>
> Regards,
> Manix Velu.
>
> > Date: Mon, 22 Dec 1997 09:39:01 GMT
> > From: alaa@lsil.com (alaa alani)
> > To: praveen@comit.com
> > Subject: Re: [SI-LIST] : SSO : How to identify SSO groups?
> > Cc: si-list@silab.Eng.Sun.COM
>
> >
> > Hi Praveen,
> >
> > It depends on how long it takes for the current to drop to a certain
> level (eg 0mA)
> > but 1nsec seems to be acceptable (i.e. those i/o buffers switching
> within 1nsec
> > are considered as simultaneously switching).
> >
> > Rgds,
> >
> > Dr. Alaa F. Alani
> > Senior Signal Integrity Eng.
> > LSI Logic
> > UK
> >
> >
> >
> > > From si-list-approval@silab.Eng.Sun.COM Fri Dec 19 23:15:02 1997
> > > X-From: uucp Fri Dec 19 15:13 PST 1997
> > > >Received: from mars.Sun.COM (mars.Sun.COM [192.9.22.1]) by
> mail1.lsil.com with ESMTP id LAA10882
> > > (8.6.12/IDA-1.6); Fri, 19 Dec 1997 11:31:22 -0800
> > > Date: Fri, 19 Dec 1997 10:50:28 -0800
> > > From: praveen@comit.com (Praveen G Shekokar)
> > > To: si-list@silab.Eng.Sun.COM
> > > Subject: [SI-LIST] : SSO : How to identify SSO groups?
> > > Sender: owner-si-list@silab.Eng.Sun.COM
> > > Content-Length: 1126
> > >
> > >
> > > We are using our foundaries SSO rules to calculate number of
> VDD/VSS
> > > pins required for our ASIC. Before we can use the SSO rules we
> need to
> > > identify signals that form a SSO group. The conventional technique
> I know
> > > of is to group signals of similar functionality into a SSO group
> e.g.
> > > Address/Data bus.
> > >
> > > In practice we have noticed that not all the signals of such a
> group have
> > > identical delays. Further they may not have identical output
> loads. Variable
> > > delays implies that not all the outputs switch at the same. E.g.
> > >
> > > Let output1 switch at time T and output2 at time T+t1. If t1 is
> small then the
> > > switching current for output1, say I1, will overlap with switching
> current
> > > for output2, say I2, leading to overall increase in the switching
> current.
> > > But if t1 is more than the time required for I1 to reduce to 0
> then the
> > > overall switching current is going to be limited to max of I1 and
> I2.
> > >
> > > I want to know whether there are any guide lines for value of t1
> that one
> > > can use to decide whether a signal is part of a SSO group.
> > >
> > > Value of t1 is also required in designing address/data stepping.
> > >
> > > thanks,
> > >
> > > - Praveen Shekokar
> > >
> > >
> >
> >
>
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