RE: [SI-LIST] : Clock tree

Andrew Ingraham (Andrew.Ingraham@digital.com)
Fri, 14 Aug 1998 16:37:45 -0400

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>what is the best way to build the clock tree ?

It is best to be consistent (equal loading on all clock lines),
and one load per line usually works best.

>I connect the same clock to few consumers which are very close ?

I have seen a case where a "T" junction to two loads (one trace
to a point between the loads, then equal very short stubs to the
loads) caused a bad glitch or plateau, exactly at the threshold
voltage where you can't afford it.

IN THIS CASE it was actually better to route first to one load,
then from there with a short trace to the second. Except that
the resulting waveforms had different rise times, they actually
had little skew this way. The simulated waveforms both crossed
threshold almost simultaneously, and more importantly, were
glitch-free.

Other cases I've tried, with different ICs, behaved entirely
differently!

It is important to get good SPICE models and simulate it.
Vary the clock frequency too. Your clock tree may work
great at one frequency but fail at another.

Depending on your clock drivers, lots of series terminations
or clamp diodes may be needed.

Regards,
Andy Ingraham

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