So it comes down to the application. IBIS models are fine to predict reflections and
crosstalk in digital circuitry where the noise margins are typically in hundreds of
millivolts. IBIS data is based on DC I/V curves. The rise/fall times are included in the
data sheet. This is fine for gross approximations but has many limitations. As mentioned
in a previous email if the I/O stage has ramp control circuitry or feedback forget about
using IBIS. Spice transistor level models work fine for this. Despite what you may have
heard, Spice transistor level models are much more accurate than IBIS can ever hope to
be. If the proper transistor level model is obtained from the vendor (usually propietary)
this would be the most accurate model one could use. Even when hundreds of data points
are used for IBIS, it still cannot match the Spice accuracy. This is for several reasons.
First IBIS assumes DC I/V curves at one bias point. Secondly IBIS approximates the
shape of the rise and falling edges from Spice or measurement data. Doing this assures
inaccuracies during the transistors switching times. Unfortunetly this is precisely what
we are interested in. IBIS has worked around this problem by incorporating voltage time
points under a certain loading condition. Again, the problem with this is only one data
point. This makes the IBIS data applicable only for that condition. The rest is
interpolated. One hopes that the I/V curve is enough to get one close. In many instances
it is. But in some its not. The point is the user does not know when IBIS is accurate
or not because of this. And since the topology is not included there is no way of telling
if there is feedback or ramp control circuitry.
IBIS falls short in another very important area, Ground bounce. As mentioned IBIS is
based on DC I/V curves measured under certain power supply levels. During simutaneous
switching one cannot count on the power supplies being stable. In fact two things are
happening. The power supplies cannot be counted on and at the same time the voltage at
the gate that controls the transistors on/off transistion is not stable because of the
PS problem. When several I/O's are switching then the bias points of the transistors
are not known with an IBIS model. More importantly there is no way to account for this
with an IBIS type model. The only way to properly model this condition is with Spice
transistor level models or rely on the semiconductor vendors data concerning simutaneous
switching. So although IBIS models can be used for ground bounce the results are largely
unknown. My experience is that IBIS models tend to over estimate the ground bounce
voltage.
And lastly because of the above and more I would tend not to trust IBIS models at 100Mhz
or above. There are some redeeming factors to IBIS. If one can get the IBIS models it is
a good starting point to at least check the designs in a rather fast manner. The data
can be incorporated into a higher level simulator as mentioned previously. Again
accuracy is the key. Crosstalk at the hundreds of millivolt levels is ok with IBIS.
Critical timing and ground bounce issues need to be resolved by using a more robust model
such as Spice transistor level.
Best Regards,
Fred Balistreri
current email address that works is [email protected]