This position is a hardware design responsibility within the Computer Systems
Division of Sun. It is part of the Power Desktop Hardware Engineering Group
and reports into the manager of System Design Engineering (SDE). SDE is
responsible for logic design and board assemblies which go into the SUN desktop
workstation product line.
The primary job function is Electrical Design Engineering (EDE) of circuit
boards and interconnect methods to assure adequate Signal Integrity and Timing
(SIT) margins. The engineer will design, develop, and validate board designs
by writing circuit routing rules, power distribution and bypass rules, and by
measuring SIT performance in the lab environment.
The secondary job function is responsibility for logic design of circuit board
assemblies, including schematic capture, vendor interface, component selection,
circuit prototyping, and product release.
The candidate should understand transmission line theory and high speed digital
logic interconnect methods. He/She must have SPICE experience and be familiar
with signal integrity tools such as Cadence Boardquest, View Logic XTK, and
Ansoft Maxwell. He/She should be able to go into the lab to conduct design
validation testing (DVT).
The candidate may be skilled in Electro-Magnetic Compliance (EMC) of electronic
appliances and computers. He/She may be an experienced hardware engineer who
has had logic design and system integration responsibility for workstation
board designs.
Electrical Design Engineering Charter
-------------------------------------
Several engineering disciplines have been combined under a single charter known
as Electrical Design Engineering (EDE). EDE is founded in the traditional
principles of Signal Integrity and Timing (SIT) design. It goes beyond this
simple model, however, to view the problem of system design from a holistic
standpoint. This means that other elements of design such as power
distribution, bypass strategy, Electro-Magnetic Compliance (EMC), clock
generation and distribution, I/O cell design, and validation become equally
important to the overall success of the design effort.
The role of EDE is twofold. The group owns the responsibility of providing
electrical designs for the systems under development in SMCC desktop
engineering. An EDE engineer is assigned to each active program and works with
the team to impliment the electrical design. In the longer term and in a
general sense, EDE will develop methodologies, boilerplates, and templates
which make the process of electrical design better understood and more
consistently executed. The goal of this process is to acheive higher quality
in shorter development cycles by a deversified group of design engineers.
EDE leadership has specifically been assigned to a staff engineer who is
committed to developing the charter into a world class organization. Long term
vision comes from within the organization.
Product Support / Ownership
---------------------------
Abstract
The EDE charter supports each workstation development by providing
electrical design guidance. Design decisions are collaborative and
may involve the PCB CAD layout person and the board design
engineer. The EDE engineer has ultimate responsibility for the
electrical performance of the system.
Deliverables
System interconnect
Connector pinouts
Routing Document
Net topologies
Net lengths
Termination schemes
Stackup
Trace / Space geometries
Transmission line impedence
Parallelism
Clock distribution
Power Distribution
Bulk bypass
Signal integrity bypass
EMC bypass
ASIC
I/O driver selection / development
Methodologies / boilerplates / templates
----------------------------------------
Abstract
The EDE charter is committed to developing the infrastructure and
methods which will allow a broader cross section of engineers to
achieve excellence in the area of electrical design. The
strategy creates a structured environment and uses comercially
available tools to do a more thorough job of design validation. In
some cases, proprietery tools must be developed and qualified.
Deliverables
Methodologies
Boardquest
DCAP
Bulk bypass
Templates / boilerplates
Routing documents
Bypass cap worksheets
Timing spreadsheets
Priorities
----------
Deliverables
First priority - platform support
Second priority - Methodology development
Please send your resume to:
[email protected]
or Fax: (650) 786-6452 Attn. Mike Fleice
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