Re: [SI-LIST] : Re: MEASURING POWER GROUND IMPEDANCE

Howard Johnson (howiej@sigcon.com)
Tue, 09 Jun 1998 13:10:55 -0700

NOTE: Since this question was copied to the S.I. list reflector,
I will copy my answer there as well. I of course always welcome
any other comments on the subject, pro or con. Measuring the
power and ground impedance on a complex board is never easy.

Hello Istvan,

Regarding the comment below about "polluting your measurement",
the issue is that we are trying to measure a very small signal (the
Vcc noise voltage), and any direct crosstalk between the signal
source and the probe may overwhelm the signal you are trying to
measure.

Example: suppose we have a 50-ohm sinewave source, and a 50-ohm probe.
Adjust the sinewave source so we see 1V p-p when the source is plugged
straight into the probe (no power system connected).
The total driving point impedance at the probe point is 25 ohms (fifty
from the source in parallel with fifty from the probe).
Now connect both probe and scope to the power system on your bare
board (no active parts installed - just the bypass caps).
If the Vcc-ground impedance is 0.1 ohms (a reasonable value for a good
power system), then the Vcc-ground impedance will reduce the voltage
received at the scope by a ratio of (0.1)/(25) -- that's the
resistor divider theorem. (In the analysis below I just converted this
number to a dB figure.)
The voltage at the scope will now be about 4 mV. This is a small,
but clearly visible and easily measured amount of noise.

Now let's look at the direct coupling between the source and the probe.
Couple both source and probe to the board using coax (I
like to use RG-174, because it's thin, flexible, and easy to solder
to the board). Let's say that at the source attachment point, the
distance between the coax shield attach point (to board ground) and
the coax signal attach point (to board Vcc) is about 1/2 inch,
and that the coax signal conductor stands up about
1/8 inch above the surface of the board. The total exposed area of this
loop between the signal conductor and the ground conductor
is (1/2)*(1/8) = 0.0625 square inches.
Assume the same for the probe connection.

If the source and probe coax cables are connected to points
separated by about 1 inch, the mutual inductive coupling between
these two loops will be on the order of 0.02 nH. The total
di/dt flowing through the source loop, times the mutual inductance
between loops, will coupled crosstalk noise voltages directly
into the probe loop.

At a frequency of, say, 500 MHz, the total noise voltage
will be: Lmutual*(di/dt = 0.02nH*2*(pi)*500MHz*(1V/25ohms) = 2.5 mV

The noise voltage is almost as large as the signal you are trying to
measure. Keep the source and probe cables searated by at least
an inches, and keep the length of the exposed coax signal conductor
as short as practical.

Also, at frequencies in the multiple-megahertz range and beyond,
you will notice that the impedance is a function of the
position of the source and probe cables, due to various resonance
effects between the power and ground planes. If you're interested
in that topic, check out the cool simulations from SIGRITY (and probably
many others) on the subject.

Best regards,
Dr. Howard Johnson

At 08:08 AM 6/1/98 -0400, you wrote:
>Dr. Johnson,
>
>I am following with great interest the On-line Newsletters of High-Speed
>Digital Design. Inj one of your recent responses regarding the measurement
>of power/ground planes, you are suggesting not to connect the probes to
>nearby points.
>Can you elaborate somewhat further your reasoning for that ('local crosstalk
>will pollute your measurement')?
>Also, can you give some more reasoning behind your suggestion of using the
>resistance divider theorem in this case? Do you mean here the magnitudes of
>impedances?
>
>Thank you
>
>Istvan Novak, SI Engineer, SUN Microsystems
>
>-----Original Message-----
>From: High-Speed Digital Design Mailing List <hsdd@accessone.com>
>To: High-Speed Digital Design Newsletter Subscriber(4) : ; <High-Speed
>Digital Design Newsletter Subscriber(4) : ;>
>Date: Tuesday, May 26, 1998 4:28 PM
>Subject: MEASURING POWER GROUND IMPEDANCE
>
>
>>*---------------------------------------------------------------*
>> H i g h - S p e e d D i g i t a l D e s i g n
>>
>> *On-Line Newsletter*
>>
>> Dr. Howard Johnson, Vol. 2 Issue 14
>>*---------------------------------------------------------------*
>>
>>*------------------------(ANNOUNCEMENTS)------------------------*
>>
>>Next Public High-Speed Digital Design Seminars:
>>
>> U. of Oxford, UK June 22-23, 1998
>> San Jose, CA September 21-22, 1998
>>
>>Registration & information at:
>>http://signalintegrity.com/seminar.htm
>>
>>Tell Your Co-Workers!
>>
>>*--------------------------(QUESTION)---------------------------*
>>
>>MEASURING POWER GROUND IMPEDANCE
>>Larry Smith of Sun Microsystems writes:
>>
>> Dr. Johnson - thanks for your newsletter, I have just
>> subscribed. I completely agree with the comments pertaining
>> to power plane impedance and the 'single node' assumption
>> below the frequency where the board resonates (Volume 2 Issue
>> 14). We have checked the impedance of power planes with a
>> network analyzer. With no capacitors present, you can see
>> interesting resonances that depend on the 1/4 wavelength from
>> the probes to the card edge (valleys) and half wavelengths
>> that fit into the card dimensions. But these measurements
>> always come in dB and my spice simulations come out in ohms
>> (after I force 1 Amp). Do you have any ideas on how to
>> correlate between them? I would like to be able to measure
>> the plane impedance in Ohms!
>>
>> A minor point... We are looking at using HIGHer dielectric
>> constants for the material between power planes in order to
>> gain more decoupling capacitance. That is going to lower the
>> resonant frequencies of the power planes, possibly into
>> frequencies of interest (near the clock).
>>
>> Best Regards,
>>
>>*-------------------(REPLY FROM DR. JOHNSON)--------------------*
>>
>> Thanks for your interest in High-Speed Digital Design.
>>
>> When using a network analyzer to measure power and ground
>> impedance, we drive the power and ground planes at one point
>> on the board with a sine wave, and the measure how much
>> voltage appears at a different point.
>>
>> Don't set the IN and OUT cable attachment points on the board
>> too close together or else their local crosstalk will pollute
>> your measurement.
>>
>> In this setup, we can relate ohms to dB if (1) we know the
>> driving point impedance of the network analyzer test setup
>> and (2) the network analyzer is calibrated in terms of dB
>> gain, where 0 dB means there is no device under test
>> connected (that is, the IN cable is directly connected to the
>> OUT cable).
>>
>> To establish this relation, we just use the resistance
>> divider theorem:
>>
>> dB gain = 20*log(Vmeasured / Vreference)
>>
>> dB gain = 20*log( Rpwr-gnd / (Rpwr-gnd + Rsource) )
>>
>> where Rsource is the driving point impedance of the test
>> setup.
>>
>> If your network analyzer has a 50-ohm output, and a 50-ohm
>> input, then the driving point impedance at the device-under-
>> test point is 25 ohms. Rsource = 25 ohms.
>>
>> Now we can simplify things a little if we use the fact that,
>> even when resonating, the power and ground planes have an
>> impedance much less than 25 ohms (if they didn't the whole
>> system wouldn't even come close to working). Therefore we can
>> ignore the term Rpwr-gnd in the denominator, and just use the
>> approximation:
>>
>> dB gain = 20*log( Rpwr-gnd / Rsource )
>>
>> Converting this formula to express Rpwr-gnd in terms of dB,
>> we get:
>>
>> Rpwr-gnd = Rsource *{10 <raised to the power of> [(dB
>> gain)/20]}
>>
>>
>>Best regards,
>>Dr. Howard Johnson
>>
>>*---------------------------------------------------------------*
>>
>> Comments welcome! hsdd@signalintegrity.com
>>
>> Newsletter Archives:
>> http://signalintegrity.com/newsletter.htm
>>
>
_________________________________________________
Dr. Howard Johnson, Signal Consulting, Inc.
tel 425.556.0800 fax 425.881.6149 email howiej@sigcon.com

High-Speed Digital Design seminars:
June 22-23 at Oxford U., in the U.K.,
September 21-22 in San Jose, CA
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