> The idea is first to get the impedance of all layers quite close, and
> secondly to get as much of the return currents as possible in the ground
> planes rather than the power planes (this is obviously not the case for
> signal layers 3 and 4, but I can keep my critical signals off them.
I *really* don't understand the "get as much of the return currents as
possible in the ground planes rather than the power planes" part.
Unless your rising edges are very slow and the only critical edges
are falling ones? (Rhetorical question.)
> Can anyone think of a better stackup, or are my priorities mixed up for a
> high speed (~100 MHz) digital board? Am I sacrificing high speed
> decoupling by not putting power and ground planes right next to each other?
Yup. And Paul, I'm hurt -- HURT, I tell you -- that we're having this
discussion in public :-)
-- D. C. Sessions email@example.com